···10541054{10551055 struct pci_dev *pci_dev = efx->pci_dev;10561056 dma_addr_t dma_mask = efx->type->max_dma_mask;10571057+ bool use_wc;10571058 int rc;1058105910591060 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");···11051104 rc = -EIO;11061105 goto fail3;11071106 }11081108- efx->membase = ioremap_wc(efx->membase_phys,11091109- efx->type->mem_map_size);11071107+11081108+ /* bug22643: If SR-IOV is enabled then tx push over a write combined11091109+ * mapping is unsafe. We need to disable write combining in this case.11101110+ * MSI is unsupported when SR-IOV is enabled, and the firmware will11111111+ * have removed the MSI capability. So write combining is safe if11121112+ * there is an MSI capability.11131113+ */11141114+ use_wc = (!EFX_WORKAROUND_22643(efx) ||11151115+ pci_find_capability(pci_dev, PCI_CAP_ID_MSI));11161116+ if (use_wc)11171117+ efx->membase = ioremap_wc(efx->membase_phys,11181118+ efx->type->mem_map_size);11191119+ else11201120+ efx->membase = ioremap_nocache(efx->membase_phys,11211121+ efx->type->mem_map_size);11101122 if (!efx->membase) {11111123 netif_err(efx, probe, efx->net_dev,11121124 "could not map memory BAR at %llx+%x\n",
+2
drivers/net/sfc/workarounds.h
···3838#define EFX_WORKAROUND_15783 EFX_WORKAROUND_ALWAYS3939/* Legacy interrupt storm when interrupt fifo fills */4040#define EFX_WORKAROUND_17213 EFX_WORKAROUND_SIENA4141+/* Write combining and sriov=enabled are incompatible */4242+#define EFX_WORKAROUND_22643 EFX_WORKAROUND_SIENA41434244/* Spurious parity errors in TSORT buffers */4345#define EFX_WORKAROUND_5129 EFX_WORKAROUND_FALCON_A