[MIPS] Momentum: Resurrect after things were moved around a while ago. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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arch/mips/kernel/irq-mv6434x.c
··· 11 11 #include <linux/module.h> 12 12 #include <linux/interrupt.h> 13 13 #include <linux/kernel.h> 14 - #include <asm/ptrace.h> 15 - #include <linux/sched.h> 16 14 #include <linux/kernel_stat.h> 15 + #include <linux/mv643xx.h> 16 + #include <linux/sched.h> 17 + 18 + #include <asm/ptrace.h> 17 19 #include <asm/io.h> 18 20 #include <asm/irq.h> 19 - #include <linux/mv643xx.h> 21 + #include <asm/marvell.h> 20 22 21 23 static unsigned int irq_base; 22 24
+1 -1
arch/mips/momentum/jaguar_atx/prom.c
··· 21 21 #include <linux/mm.h> 22 22 #include <linux/sched.h> 23 23 #include <linux/bootmem.h> 24 + #include <linux/mv643xx.h> 24 25 25 26 #include <asm/addrspace.h> 26 27 #include <asm/bootinfo.h> 27 - #include <asm/mv64340.h> 28 28 #include <asm/pmon.h> 29 29 30 30 #include "jaguar_atx_fpga.h"
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arch/mips/momentum/jaguar_atx/setup.c
··· 2 2 * BRIEF MODULE DESCRIPTION 3 3 * Momentum Computer Jaguar-ATX board dependent boot routines 4 4 * 5 - * Copyright (C) 1996, 1997, 2001, 2004 Ralf Baechle (ralf@linux-mips.org) 5 + * Copyright (C) 1996, 1997, 2001, 04, 06 Ralf Baechle (ralf@linux-mips.org) 6 6 * Copyright (C) 2000 RidgeRun, Inc. 7 7 * Copyright (C) 2001 Red Hat, Inc. 8 8 * Copyright (C) 2002 Momentum Computer ··· 55 55 #include <linux/interrupt.h> 56 56 #include <linux/timex.h> 57 57 #include <linux/vmalloc.h> 58 + #include <linux/mv643xx.h> 59 + 58 60 #include <asm/time.h> 59 61 #include <asm/bootinfo.h> 60 62 #include <asm/page.h> ··· 66 64 #include <asm/ptrace.h> 67 65 #include <asm/reboot.h> 68 66 #include <asm/tlbflush.h> 69 - #include <asm/mv64340.h> 70 67 71 68 #include "jaguar_atx_fpga.h" 72 69
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arch/mips/momentum/ocelot_c/irq.c
··· 41 41 #include <linux/slab.h> 42 42 #include <linux/random.h> 43 43 #include <linux/bitops.h> 44 + #include <linux/mv643xx.h> 44 45 #include <asm/bootinfo.h> 45 46 #include <asm/io.h> 46 47 #include <asm/irq_cpu.h> 47 48 #include <asm/mipsregs.h> 48 - #include <asm/mv64340.h> 49 49 #include <asm/system.h> 50 50 51 51 extern asmlinkage void ocelot_handle_int(void);
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arch/mips/momentum/ocelot_c/prom.c
··· 19 19 #include <linux/mm.h> 20 20 #include <linux/sched.h> 21 21 #include <linux/bootmem.h> 22 + #include <linux/mv643xx.h> 22 23 23 24 #include <asm/addrspace.h> 24 25 #include <asm/bootinfo.h> 25 - #include <asm/mv64340.h> 26 26 #include <asm/pmon.h> 27 27 28 28 #include "ocelot_c_fpga.h"
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arch/mips/momentum/ocelot_c/setup.c
··· 54 54 #include <linux/pm.h> 55 55 #include <linux/timex.h> 56 56 #include <linux/vmalloc.h> 57 + #include <linux/mv643xx.h> 57 58 58 59 #include <asm/time.h> 59 60 #include <asm/bootinfo.h> ··· 65 64 #include <asm/processor.h> 66 65 #include <asm/ptrace.h> 67 66 #include <asm/reboot.h> 67 + #include <asm/marvell.h> 68 68 #include <linux/bootmem.h> 69 69 #include <linux/blkdev.h> 70 - #include <asm/mv64340.h> 71 70 #include "ocelot_c_fpga.h" 72 71 73 72 unsigned long marvell_base; ··· 253 252 /* shut down ethernet ports, just to be sure our memory doesn't get 254 253 * corrupted by random ethernet traffic. 255 254 */ 256 - MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8); 257 - MV_WRITE(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8); 258 - MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8); 259 - MV_WRITE(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8); 255 + MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0), 0xff << 8); 256 + MV_WRITE(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1), 0xff << 8); 257 + MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0), 0xff << 8); 258 + MV_WRITE(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1), 0xff << 8); 260 259 do {} 261 - while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff); 260 + while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(0)) & 0xff); 262 261 do {} 263 - while (MV_READ(MV64340_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff); 262 + while (MV_READ(MV643XX_ETH_RECEIVE_QUEUE_COMMAND_REG(1)) & 0xff); 264 263 do {} 265 - while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff); 264 + while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(0)) & 0xff); 266 265 do {} 267 - while (MV_READ(MV64340_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff); 268 - MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0), 269 - MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1); 270 - MV_WRITE(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1), 271 - MV_READ(MV64340_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1); 266 + while (MV_READ(MV643XX_ETH_TRANSMIT_QUEUE_COMMAND_REG(1)) & 0xff); 267 + MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0), 268 + MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(0)) & ~1); 269 + MV_WRITE(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1), 270 + MV_READ(MV643XX_ETH_PORT_SERIAL_CONTROL_REG(1)) & ~1); 272 271 273 272 /* Turn off the Bit-Error LED */ 274 273 OCELOT_FPGA_WRITE(0x80, CLR);
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arch/mips/pci/pci-ocelot-c.c
··· 3 3 * License. See the file "COPYING" in the main directory of this archive 4 4 * for more details. 5 5 * 6 - * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) 6 + * Copyright (C) 2004, 06 by Ralf Baechle (ralf@linux-mips.org) 7 7 */ 8 8 9 9 #include <linux/types.h> 10 10 #include <linux/pci.h> 11 - #include <asm/mv64340.h> 11 + #include <linux/mv643xx.h> 12 12 13 13 #include <linux/init.h> 14 + 15 + #include <asm/marvell.h> 14 16 15 17 /* 16 18 * We assume the address ranges have already been setup appropriately by