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pinctrl: mvebu: armada-{370,375}: normalize audio pins

This commit aligns the naming of the audio 'lrclk' pin accross Marvell
SoCs.

Since only the subname is changed, the DT backward compatibility is
not affected.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Thomas Petazzoni and committed by
Linus Walleij f32f01e1 d4974c16

+4 -4
+1 -1
Documentation/devicetree/bindings/pinctrl/marvell,armada-370-pinctrl.txt
··· 88 88 mpp59 59 gpo, dev(ale0), uart1(rts), uart0(rts), audio(bclk) 89 89 mpp60 60 gpio, dev(ale1), uart1(rxd), sata0(prsnt), pcie(rstout), 90 90 audio(sdi) 91 - mpp61 61 gpo, dev(we1), uart1(txd), audio(rclk) 91 + mpp61 61 gpo, dev(we1), uart1(txd), audio(lrclk) 92 92 mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0), 93 93 audio(mclk), uart0(cts) 94 94 mpp63 63 gpo, spi0(sck), tclk
+1 -1
Documentation/devicetree/bindings/pinctrl/marvell,armada-375-pinctrl.txt
··· 19 19 mpp3 3 gpio, dev(ad5), ptp(trig), led(p3), audio(mclk) 20 20 mpp4 4 gpio, dev(ad6), spi0(miso), spi1(miso) 21 21 mpp5 5 gpio, dev(ad7), spi0(cs2), spi1(cs2) 22 - mpp6 6 gpio, dev(ad0), led(p1), audio(rclk) 22 + mpp6 6 gpio, dev(ad0), led(p1), audio(lrclk) 23 23 mpp7 7 gpio, dev(ad1), ptp(clk), led(p2), audio(extclk) 24 24 mpp8 8 gpio, dev (bootcs), spi0(cs0), spi1(cs0) 25 25 mpp9 9 gpio, spi0(sck), spi1(sck), nand(we)
+1 -1
drivers/pinctrl/mvebu/pinctrl-armada-370.c
··· 354 354 MPP_FUNCTION(0x0, "gpo", NULL), 355 355 MPP_FUNCTION(0x1, "dev", "we1"), 356 356 MPP_FUNCTION(0x2, "uart1", "txd"), 357 - MPP_FUNCTION(0x5, "audio", "rclk")), 357 + MPP_FUNCTION(0x5, "audio", "lrclk")), 358 358 MPP_MODE(62, 359 359 MPP_FUNCTION(0x0, "gpio", NULL), 360 360 MPP_FUNCTION(0x1, "dev", "a2"),
+1 -1
drivers/pinctrl/mvebu/pinctrl-armada-375.c
··· 81 81 MPP_FUNCTION(0x0, "gpio", NULL), 82 82 MPP_FUNCTION(0x1, "dev", "ad0"), 83 83 MPP_FUNCTION(0x3, "led", "p1"), 84 - MPP_FUNCTION(0x4, "audio", "rclk"), 84 + MPP_FUNCTION(0x4, "audio", "lrclk"), 85 85 MPP_FUNCTION(0x5, "nand", "io0")), 86 86 MPP_MODE(7, 87 87 MPP_FUNCTION(0x0, "gpio", NULL),