tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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net: ipa: add a parameter to suspend registers

The SUSPEND_INFO, SUSPEND_EN, SUSPEND_CLR registers represent
endpoint IDs in a bit mask. When more than 32 endpoints are
supported, these registers will be replicated as needed to represent
the number of supported endpoints. Update the definitions of these
registers to have a stride of 4 bytes, and update the code that
operates them to select the proper offset and bit.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Alex Elder and committed by
David S. Miller f298ba78 1d8f16db

+55 -29
+19 -11
drivers/net/ipa/ipa_interrupt.c
··· 132 132 u32 endpoint_id, bool enable) 133 133 { 134 134 struct ipa *ipa = interrupt->ipa; 135 - u32 mask = BIT(endpoint_id); 135 + u32 mask = BIT(endpoint_id % 32); 136 + u32 unit = endpoint_id / 32; 136 137 const struct ipa_reg *reg; 137 138 u32 offset; 138 139 u32 val; 139 140 141 + /* This works until we actually have more than 32 endpoints */ 140 142 WARN_ON(!(mask & ipa->available)); 141 143 142 144 /* IPA version 3.0 does not support TX_SUSPEND interrupt control */ ··· 146 144 return; 147 145 148 146 reg = ipa_reg(ipa, IRQ_SUSPEND_EN); 149 - offset = ipa_reg_offset(reg); 147 + offset = ipa_reg_n_offset(reg, unit); 150 148 val = ioread32(ipa->reg_virt + offset); 151 149 if (enable) 152 150 val |= mask; ··· 173 171 void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt) 174 172 { 175 173 struct ipa *ipa = interrupt->ipa; 176 - const struct ipa_reg *reg; 177 - u32 val; 174 + u32 unit_count; 175 + u32 unit; 178 176 179 - reg = ipa_reg(ipa, IRQ_SUSPEND_INFO); 180 - val = ioread32(ipa->reg_virt + ipa_reg_offset(reg)); 177 + unit_count = roundup(ipa->endpoint_count, 32); 178 + for (unit = 0; unit < unit_count; unit++) { 179 + const struct ipa_reg *reg; 180 + u32 val; 181 181 182 - /* SUSPEND interrupt status isn't cleared on IPA version 3.0 */ 183 - if (ipa->version == IPA_VERSION_3_0) 184 - return; 182 + reg = ipa_reg(ipa, IRQ_SUSPEND_INFO); 183 + val = ioread32(ipa->reg_virt + ipa_reg_n_offset(reg, unit)); 185 184 186 - reg = ipa_reg(ipa, IRQ_SUSPEND_CLR); 187 - iowrite32(val, ipa->reg_virt + ipa_reg_offset(reg)); 185 + /* SUSPEND interrupt status isn't cleared on IPA version 3.0 */ 186 + if (ipa->version == IPA_VERSION_3_0) 187 + continue; 188 + 189 + reg = ipa_reg(ipa, IRQ_SUSPEND_CLR); 190 + iowrite32(val, ipa->reg_virt + ipa_reg_n_offset(reg, unit)); 191 + } 188 192 } 189 193 190 194 /* Simulate arrival of an IPA TX_SUSPEND interrupt */
+6 -3
drivers/net/ipa/reg/ipa_reg-v3.1.c
··· 386 386 IPA_REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000301c + 0x1000 * GSI_EE_AP); 387 387 388 388 /* Valid bits defined by ipa->available */ 389 - IPA_REG(IRQ_SUSPEND_INFO, irq_suspend_info, 0x00003030 + 0x1000 * GSI_EE_AP); 389 + IPA_REG_STRIDE(IRQ_SUSPEND_INFO, irq_suspend_info, 390 + 0x00003030 + 0x1000 * GSI_EE_AP, 0x0004); 390 391 391 392 /* Valid bits defined by ipa->available */ 392 - IPA_REG(IRQ_SUSPEND_EN, irq_suspend_en, 0x00003034 + 0x1000 * GSI_EE_AP); 393 + IPA_REG_STRIDE(IRQ_SUSPEND_EN, irq_suspend_en, 394 + 0x00003034 + 0x1000 * GSI_EE_AP, 0x0004); 393 395 394 396 /* Valid bits defined by ipa->available */ 395 - IPA_REG(IRQ_SUSPEND_CLR, irq_suspend_clr, 0x00003038 + 0x1000 * GSI_EE_AP); 397 + IPA_REG_STRIDE(IRQ_SUSPEND_CLR, irq_suspend_clr, 398 + 0x00003038 + 0x1000 * GSI_EE_AP, 0x0004); 396 399 397 400 static const struct ipa_reg *ipa_reg_array[] = { 398 401 [COMP_CFG] = &ipa_reg_comp_cfg,
+6 -3
drivers/net/ipa/reg/ipa_reg-v3.5.1.c
··· 397 397 IPA_REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000301c + 0x1000 * GSI_EE_AP); 398 398 399 399 /* Valid bits defined by ipa->available */ 400 - IPA_REG(IRQ_SUSPEND_INFO, irq_suspend_info, 0x00003030 + 0x1000 * GSI_EE_AP); 400 + IPA_REG_STRIDE(IRQ_SUSPEND_INFO, irq_suspend_info, 401 + 0x00003030 + 0x1000 * GSI_EE_AP, 0x0004); 401 402 402 403 /* Valid bits defined by ipa->available */ 403 - IPA_REG(IRQ_SUSPEND_EN, irq_suspend_en, 0x00003034 + 0x1000 * GSI_EE_AP); 404 + IPA_REG_STRIDE(IRQ_SUSPEND_EN, irq_suspend_en, 405 + 0x00003034 + 0x1000 * GSI_EE_AP, 0x0004); 404 406 405 407 /* Valid bits defined by ipa->available */ 406 - IPA_REG(IRQ_SUSPEND_CLR, irq_suspend_clr, 0x00003038 + 0x1000 * GSI_EE_AP); 408 + IPA_REG_STRIDE(IRQ_SUSPEND_CLR, irq_suspend_clr, 409 + 0x00003038 + 0x1000 * GSI_EE_AP, 0x0004); 407 410 408 411 static const struct ipa_reg *ipa_reg_array[] = { 409 412 [COMP_CFG] = &ipa_reg_comp_cfg,
+6 -3
drivers/net/ipa/reg/ipa_reg-v4.11.c
··· 453 453 IPA_REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000401c + 0x1000 * GSI_EE_AP); 454 454 455 455 /* Valid bits defined by ipa->available */ 456 - IPA_REG(IRQ_SUSPEND_INFO, irq_suspend_info, 0x00004030 + 0x1000 * GSI_EE_AP); 456 + IPA_REG_STRIDE(IRQ_SUSPEND_INFO, irq_suspend_info, 457 + 0x00004030 + 0x1000 * GSI_EE_AP, 0x0004); 457 458 458 459 /* Valid bits defined by ipa->available */ 459 - IPA_REG(IRQ_SUSPEND_EN, irq_suspend_en, 0x00004034 + 0x1000 * GSI_EE_AP); 460 + IPA_REG_STRIDE(IRQ_SUSPEND_EN, irq_suspend_en, 461 + 0x00004034 + 0x1000 * GSI_EE_AP, 0x0004); 460 462 461 463 /* Valid bits defined by ipa->available */ 462 - IPA_REG(IRQ_SUSPEND_CLR, irq_suspend_clr, 0x00004038 + 0x1000 * GSI_EE_AP); 464 + IPA_REG_STRIDE(IRQ_SUSPEND_CLR, irq_suspend_clr, 465 + 0x00004038 + 0x1000 * GSI_EE_AP, 0x0004); 463 466 464 467 static const struct ipa_reg *ipa_reg_array[] = { 465 468 [COMP_CFG] = &ipa_reg_comp_cfg,
+6 -3
drivers/net/ipa/reg/ipa_reg-v4.2.c
··· 399 399 IPA_REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000301c + 0x1000 * GSI_EE_AP); 400 400 401 401 /* Valid bits defined by ipa->available */ 402 - IPA_REG(IRQ_SUSPEND_INFO, irq_suspend_info, 0x00003030 + 0x1000 * GSI_EE_AP); 402 + IPA_REG_STRIDE(IRQ_SUSPEND_INFO, irq_suspend_info, 403 + 0x00003030 + 0x1000 * GSI_EE_AP, 0x0004); 403 404 404 405 /* Valid bits defined by ipa->available */ 405 - IPA_REG(IRQ_SUSPEND_EN, irq_suspend_en, 0x00003034 + 0x1000 * GSI_EE_AP); 406 + IPA_REG_STRIDE(IRQ_SUSPEND_EN, irq_suspend_en, 407 + 0x00003034 + 0x1000 * GSI_EE_AP, 0x0004); 406 408 407 409 /* Valid bits defined by ipa->available */ 408 - IPA_REG(IRQ_SUSPEND_CLR, irq_suspend_clr, 0x00003038 + 0x1000 * GSI_EE_AP); 410 + IPA_REG_STRIDE(IRQ_SUSPEND_CLR, irq_suspend_clr, 411 + 0x00003038 + 0x1000 * GSI_EE_AP, 0x0004); 409 412 410 413 static const struct ipa_reg *ipa_reg_array[] = { 411 414 [COMP_CFG] = &ipa_reg_comp_cfg,
+6 -3
drivers/net/ipa/reg/ipa_reg-v4.5.c
··· 472 472 IPA_REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000301c + 0x1000 * GSI_EE_AP); 473 473 474 474 /* Valid bits defined by ipa->available */ 475 - IPA_REG(IRQ_SUSPEND_INFO, irq_suspend_info, 0x00003030 + 0x1000 * GSI_EE_AP); 475 + IPA_REG_STRIDE(IRQ_SUSPEND_INFO, irq_suspend_info, 476 + 0x00003030 + 0x1000 * GSI_EE_AP, 0x0004); 476 477 477 478 /* Valid bits defined by ipa->available */ 478 - IPA_REG(IRQ_SUSPEND_EN, irq_suspend_en, 0x00003034 + 0x1000 * GSI_EE_AP); 479 + IPA_REG_STRIDE(IRQ_SUSPEND_EN, irq_suspend_en, 480 + 0x00003034 + 0x1000 * GSI_EE_AP, 0x0004); 479 481 480 482 /* Valid bits defined by ipa->available */ 481 - IPA_REG(IRQ_SUSPEND_CLR, irq_suspend_clr, 0x00003038 + 0x1000 * GSI_EE_AP); 483 + IPA_REG_STRIDE(IRQ_SUSPEND_CLR, irq_suspend_clr, 484 + 0x00003038 + 0x1000 * GSI_EE_AP, 0x0004); 482 485 483 486 static const struct ipa_reg *ipa_reg_array[] = { 484 487 [COMP_CFG] = &ipa_reg_comp_cfg,
+6 -3
drivers/net/ipa/reg/ipa_reg-v4.9.c
··· 450 450 IPA_REG_FIELDS(IPA_IRQ_UC, ipa_irq_uc, 0x0000401c + 0x1000 * GSI_EE_AP); 451 451 452 452 /* Valid bits defined by ipa->available */ 453 - IPA_REG(IRQ_SUSPEND_INFO, irq_suspend_info, 0x00004030 + 0x1000 * GSI_EE_AP); 453 + IPA_REG_STRIDE(IRQ_SUSPEND_INFO, irq_suspend_info, 454 + 0x00004030 + 0x1000 * GSI_EE_AP, 0x0004); 454 455 455 456 /* Valid bits defined by ipa->available */ 456 - IPA_REG(IRQ_SUSPEND_EN, irq_suspend_en, 0x00004034 + 0x1000 * GSI_EE_AP); 457 + IPA_REG_STRIDE(IRQ_SUSPEND_EN, irq_suspend_en, 458 + 0x00004034 + 0x1000 * GSI_EE_AP, 0x0004); 457 459 458 460 /* Valid bits defined by ipa->available */ 459 - IPA_REG(IRQ_SUSPEND_CLR, irq_suspend_clr, 0x00004038 + 0x1000 * GSI_EE_AP); 461 + IPA_REG_STRIDE(IRQ_SUSPEND_CLR, irq_suspend_clr, 462 + 0x00004038 + 0x1000 * GSI_EE_AP, 0x0004); 460 463 461 464 static const struct ipa_reg *ipa_reg_array[] = { 462 465 [COMP_CFG] = &ipa_reg_comp_cfg,