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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/xe/execlist: Convert register access to use xe_mmio
Stop using GT pointers for register access.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-78-matthew.d.roper@intel.com
+10
-9
+10
-9
drivers/gpu/drm/xe/xe_execlist.c
+10
-9
drivers/gpu/drm/xe/xe_execlist.c
···
44
44
u32 ctx_id)
45
45
{
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struct xe_gt *gt = hwe->gt;
47
+
struct xe_mmio *mmio = >->mmio;
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struct xe_device *xe = gt_to_xe(gt);
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u64 lrc_desc;
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50
···
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}
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59
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if (hwe->class == XE_ENGINE_CLASS_COMPUTE)
62
-
xe_mmio_write32(hwe->gt, RCU_MODE,
61
+
xe_mmio_write32(mmio, RCU_MODE,
63
62
_MASKED_BIT_ENABLE(RCU_MODE_CCS_ENABLE));
64
63
65
64
xe_lrc_write_ctx_reg(lrc, CTX_RING_TAIL, lrc->ring.tail);
···
77
76
*/
78
77
wmb();
79
78
80
-
xe_mmio_write32(gt, RING_HWS_PGA(hwe->mmio_base),
79
+
xe_mmio_write32(mmio, RING_HWS_PGA(hwe->mmio_base),
81
80
xe_bo_ggtt_addr(hwe->hwsp));
82
-
xe_mmio_read32(gt, RING_HWS_PGA(hwe->mmio_base));
83
-
xe_mmio_write32(gt, RING_MODE(hwe->mmio_base),
81
+
xe_mmio_read32(mmio, RING_HWS_PGA(hwe->mmio_base));
82
+
xe_mmio_write32(mmio, RING_MODE(hwe->mmio_base),
84
83
_MASKED_BIT_ENABLE(GFX_DISABLE_LEGACY_MODE));
85
84
86
-
xe_mmio_write32(gt, RING_EXECLIST_SQ_CONTENTS_LO(hwe->mmio_base),
85
+
xe_mmio_write32(mmio, RING_EXECLIST_SQ_CONTENTS_LO(hwe->mmio_base),
87
86
lower_32_bits(lrc_desc));
88
-
xe_mmio_write32(gt, RING_EXECLIST_SQ_CONTENTS_HI(hwe->mmio_base),
87
+
xe_mmio_write32(mmio, RING_EXECLIST_SQ_CONTENTS_HI(hwe->mmio_base),
89
88
upper_32_bits(lrc_desc));
90
-
xe_mmio_write32(gt, RING_EXECLIST_CONTROL(hwe->mmio_base),
89
+
xe_mmio_write32(mmio, RING_EXECLIST_CONTROL(hwe->mmio_base),
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90
EL_CTRL_LOAD);
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91
}
93
92
···
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168
struct xe_gt *gt = hwe->gt;
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u32 hi, lo;
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170
172
-
lo = xe_mmio_read32(gt, RING_EXECLIST_STATUS_LO(hwe->mmio_base));
173
-
hi = xe_mmio_read32(gt, RING_EXECLIST_STATUS_HI(hwe->mmio_base));
171
+
lo = xe_mmio_read32(>->mmio, RING_EXECLIST_STATUS_LO(hwe->mmio_base));
172
+
hi = xe_mmio_read32(>->mmio, RING_EXECLIST_STATUS_HI(hwe->mmio_base));
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return lo | (u64)hi << 32;
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}