tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/xe/topology: Convert register access to use xe_mmio
Stop using GT pointers for register access.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240910234719.3335472-77-matthew.d.roper@intel.com
+4
-4
+4
-4
drivers/gpu/drm/xe/xe_gt_topology.c
+4
-4
drivers/gpu/drm/xe/xe_gt_topology.c
···
25
25
26
26
va_start(argp, numregs);
27
27
for (i = 0; i < numregs; i++)
28
-
fuse_val[i] = xe_mmio_read32(gt, va_arg(argp, struct xe_reg));
28
+
fuse_val[i] = xe_mmio_read32(>->mmio, va_arg(argp, struct xe_reg));
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va_end(argp);
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31
bitmap_from_arr32(mask, fuse_val, numregs * 32);
···
35
35
load_eu_mask(struct xe_gt *gt, xe_eu_mask_t mask, enum xe_gt_eu_type *eu_type)
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36
{
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struct xe_device *xe = gt_to_xe(gt);
38
-
u32 reg_val = xe_mmio_read32(gt, XELP_EU_ENABLE);
38
+
u32 reg_val = xe_mmio_read32(>->mmio, XELP_EU_ENABLE);
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u32 val = 0;
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int i;
41
41
···
127
127
load_l3_bank_mask(struct xe_gt *gt, xe_l3_bank_mask_t l3_bank_mask)
128
128
{
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129
struct xe_device *xe = gt_to_xe(gt);
130
-
u32 fuse3 = xe_mmio_read32(gt, MIRROR_FUSE3);
130
+
u32 fuse3 = xe_mmio_read32(>->mmio, MIRROR_FUSE3);
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131
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if (GRAPHICS_VER(xe) >= 20) {
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xe_l3_bank_mask_t per_node = {};
···
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xe_l3_bank_mask_t per_node = {};
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xe_l3_bank_mask_t per_mask_bit = {};
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u32 meml3_en = REG_FIELD_GET(MEML3_EN_MASK, fuse3);
144
-
u32 fuse4 = xe_mmio_read32(gt, XEHP_FUSE4);
144
+
u32 fuse4 = xe_mmio_read32(>->mmio, XEHP_FUSE4);
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u32 bank_val = REG_FIELD_GET(GT_L3_EXC_MASK, fuse4);
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bitmap_set_value8(per_mask_bit, 0x3, 0);