···11+Binding for a ST multiplexed clock driver.22+33+This binding supports only simple indexed multiplexers, it does not44+support table based parent index to hardware value translations.55+66+This binding uses the common clock binding[1].77+88+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt99+1010+Required properties:1111+1212+- compatible : shall be:1313+ "st,stih416-clkgenc-vcc-hd", "st,clkgen-mux"1414+ "st,stih416-clkgenf-vcc-fvdp", "st,clkgen-mux"1515+ "st,stih416-clkgenf-vcc-hva", "st,clkgen-mux"1616+ "st,stih416-clkgenf-vcc-hd", "st,clkgen-mux"1717+ "st,stih416-clkgenf-vcc-sd", "st,clkgen-mux"1818+ "st,stih415-clkgen-a9-mux", "st,clkgen-mux"1919+ "st,stih416-clkgen-a9-mux", "st,clkgen-mux"2020+2121+2222+- #clock-cells : from common clock binding; shall be set to 0.2323+2424+- reg : A Base address and length of the register set.2525+2626+- clocks : from common clock binding2727+2828+Example:2929+3030+ CLK_M_HVA: CLK_M_HVA {3131+ #clock-cells = <0>;3232+ compatible = "st,stih416-clkgenf-vcc-hva", "st,clkgen-mux";3333+ reg = <0xfd690868 4>;3434+3535+ clocks = <&CLOCKGEN_F 1>, <&CLK_M_A1_DIV0 3>;3636+ };
···11+Binding for a type of STMicroelectronics clock crossbar (VCC).22+33+The crossbar can take up to 4 input clocks and control up to 1644+output clocks. Not all inputs or outputs have to be in use in a55+particular instantiation. Each output can be individually enabled,66+select any of the input clocks and apply a divide (by 1,2,4 or 8) to77+that selected clock.88+99+This binding uses the common clock binding[1].1010+1111+[1] Documentation/devicetree/bindings/clock/clock-bindings.txt1212+1313+Required properties:1414+1515+- compatible : shall be:1616+ "st,stih416-clkgenc", "st,vcc"1717+ "st,stih416-clkgenf", "st,vcc"1818+1919+- #clock-cells : from common clock binding; shall be set to 1.2020+2121+- reg : A Base address and length of the register set.2222+2323+- clocks : from common clock binding2424+2525+- clock-output-names : From common clock binding. The block has 162626+ clock outputs but not all of them in a specific instance2727+ have to be used in the SoC. If a clock name is left as2828+ an empty string then no clock will be created for the2929+ output associated with that string index. If fewer than3030+ 16 strings are provided then no clocks will be created3131+ for the remaining outputs.3232+3333+Example:3434+3535+ CLOCKGEN_C_VCC: CLOCKGEN_C_VCC {3636+ #clock-cells = <1>;3737+ compatible = "st,stih416-clkgenc", "st,clkgen-vcc";3838+ reg = <0xfe8308ac 12>;3939+4040+ clocks = <&CLK_S_VCC_HD>, <&CLOCKGEN_C 1>,4141+ <&CLK_S_TMDS_FROMPHY>, <&CLOCKGEN_C 2>;4242+4343+ clock-output-names =4444+ "CLK_S_PIX_HDMI", "CLK_S_PIX_DVO",4545+ "CLK_S_OUT_DVO", "CLK_S_PIX_HD",4646+ "CLK_S_HDDAC", "CLK_S_DENC",4747+ "CLK_S_SDDAC", "CLK_S_PIX_MAIN",4848+ "CLK_S_PIX_AUX", "CLK_S_STFE_FRC_0",4949+ "CLK_S_REF_MCRU", "CLK_S_SLAVE_MCRU",5050+ "CLK_S_TMDS_HDMI", "CLK_S_HDMI_REJECT_PLL",5151+ "CLK_S_THSENS";5252+ };5353+