Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: st: Adds clockgen-vcc and clockgen-mux clock binding

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

authored by

Gabriel FERNANDEZ and committed by
Mike Turquette
e83c4e4d 8b221488

+89
+36
Documentation/devicetree/bindings/clock/st/st,clkgen-mux.txt
··· 1 + Binding for a ST multiplexed clock driver. 2 + 3 + This binding supports only simple indexed multiplexers, it does not 4 + support table based parent index to hardware value translations. 5 + 6 + This binding uses the common clock binding[1]. 7 + 8 + [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 9 + 10 + Required properties: 11 + 12 + - compatible : shall be: 13 + "st,stih416-clkgenc-vcc-hd", "st,clkgen-mux" 14 + "st,stih416-clkgenf-vcc-fvdp", "st,clkgen-mux" 15 + "st,stih416-clkgenf-vcc-hva", "st,clkgen-mux" 16 + "st,stih416-clkgenf-vcc-hd", "st,clkgen-mux" 17 + "st,stih416-clkgenf-vcc-sd", "st,clkgen-mux" 18 + "st,stih415-clkgen-a9-mux", "st,clkgen-mux" 19 + "st,stih416-clkgen-a9-mux", "st,clkgen-mux" 20 + 21 + 22 + - #clock-cells : from common clock binding; shall be set to 0. 23 + 24 + - reg : A Base address and length of the register set. 25 + 26 + - clocks : from common clock binding 27 + 28 + Example: 29 + 30 + CLK_M_HVA: CLK_M_HVA { 31 + #clock-cells = <0>; 32 + compatible = "st,stih416-clkgenf-vcc-hva", "st,clkgen-mux"; 33 + reg = <0xfd690868 4>; 34 + 35 + clocks = <&CLOCKGEN_F 1>, <&CLK_M_A1_DIV0 3>; 36 + };
+53
Documentation/devicetree/bindings/clock/st/st,clkgen-vcc.txt
··· 1 + Binding for a type of STMicroelectronics clock crossbar (VCC). 2 + 3 + The crossbar can take up to 4 input clocks and control up to 16 4 + output clocks. Not all inputs or outputs have to be in use in a 5 + particular instantiation. Each output can be individually enabled, 6 + select any of the input clocks and apply a divide (by 1,2,4 or 8) to 7 + that selected clock. 8 + 9 + This binding uses the common clock binding[1]. 10 + 11 + [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 12 + 13 + Required properties: 14 + 15 + - compatible : shall be: 16 + "st,stih416-clkgenc", "st,vcc" 17 + "st,stih416-clkgenf", "st,vcc" 18 + 19 + - #clock-cells : from common clock binding; shall be set to 1. 20 + 21 + - reg : A Base address and length of the register set. 22 + 23 + - clocks : from common clock binding 24 + 25 + - clock-output-names : From common clock binding. The block has 16 26 + clock outputs but not all of them in a specific instance 27 + have to be used in the SoC. If a clock name is left as 28 + an empty string then no clock will be created for the 29 + output associated with that string index. If fewer than 30 + 16 strings are provided then no clocks will be created 31 + for the remaining outputs. 32 + 33 + Example: 34 + 35 + CLOCKGEN_C_VCC: CLOCKGEN_C_VCC { 36 + #clock-cells = <1>; 37 + compatible = "st,stih416-clkgenc", "st,clkgen-vcc"; 38 + reg = <0xfe8308ac 12>; 39 + 40 + clocks = <&CLK_S_VCC_HD>, <&CLOCKGEN_C 1>, 41 + <&CLK_S_TMDS_FROMPHY>, <&CLOCKGEN_C 2>; 42 + 43 + clock-output-names = 44 + "CLK_S_PIX_HDMI", "CLK_S_PIX_DVO", 45 + "CLK_S_OUT_DVO", "CLK_S_PIX_HD", 46 + "CLK_S_HDDAC", "CLK_S_DENC", 47 + "CLK_S_SDDAC", "CLK_S_PIX_MAIN", 48 + "CLK_S_PIX_AUX", "CLK_S_STFE_FRC_0", 49 + "CLK_S_REF_MCRU", "CLK_S_SLAVE_MCRU", 50 + "CLK_S_TMDS_HDMI", "CLK_S_HDMI_REJECT_PLL", 51 + "CLK_S_THSENS"; 52 + }; 53 +