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ARM: dts: sunxi: h3-h5: Move pinctrl of mmc1 from dts to dtsi

Most of the boards use the mmc1 pins and their attributes defined in
mmc1_pins_a. Let's default to that by moving the pinctrl attributes to
the dtsi file. This makes it easier to modify device trees in the
future as there is only one place to change the pinctrl attributes.

Signed-off-by: Joonas Kylmälä <joonas.kylmala@iki.fi>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

authored by

Joonas Kylmälä and committed by
Maxime Ripard e607b605 50caa756

+2 -24
-2
arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
··· 72 72 }; 73 73 74 74 &mmc1 { 75 - pinctrl-names = "default"; 76 - pinctrl-0 = <&mmc1_pins_a>; 77 75 vmmc-supply = <&reg_vcc3v3>; 78 76 vqmmc-supply = <&reg_vcc3v3>; 79 77 mmc-pwrseq = <&wifi_pwrseq>;
-2
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
··· 119 119 }; 120 120 121 121 &mmc1 { 122 - pinctrl-names = "default"; 123 - pinctrl-0 = <&mmc1_pins_a>; 124 122 vmmc-supply = <&reg_vcc_wifi>; 125 123 mmc-pwrseq = <&wifi_pwrseq>; 126 124 bus-width = <4>;
-2
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
··· 143 143 }; 144 144 145 145 &mmc1 { 146 - pinctrl-names = "default"; 147 - pinctrl-0 = <&mmc1_pins_a>; 148 146 vmmc-supply = <&reg_vcc3v3>; 149 147 vqmmc-supply = <&reg_vcc3v3>; 150 148 mmc-pwrseq = <&wifi_pwrseq>;
-2
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
··· 101 101 }; 102 102 103 103 &mmc1 { 104 - pinctrl-names = "default"; 105 - pinctrl-0 = <&mmc1_pins_a>; 106 104 vmmc-supply = <&reg_vcc3v3>; 107 105 vqmmc-supply = <&reg_vcc3v3>; 108 106 mmc-pwrseq = <&wifi_pwrseq>;
-2
arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
··· 87 87 }; 88 88 89 89 &mmc1 { 90 - pinctrl-names = "default"; 91 - pinctrl-0 = <&mmc1_pins_a>; 92 90 vmmc-supply = <&reg_vcc3v3>; 93 91 vqmmc-supply = <&reg_vcc3v3>; 94 92 mmc-pwrseq = <&wifi_pwrseq>;
-2
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
··· 139 139 }; 140 140 141 141 &mmc1 { 142 - pinctrl-names = "default"; 143 - pinctrl-0 = <&mmc1_pins_a>; 144 142 vmmc-supply = <&reg_vcc3v3>; 145 143 mmc-pwrseq = <&wifi_pwrseq>; 146 144 bus-width = <4>;
-2
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
··· 113 113 }; 114 114 115 115 &mmc1 { 116 - pinctrl-names = "default"; 117 - pinctrl-0 = <&mmc1_pins_a>; 118 116 vmmc-supply = <&reg_vcc3v3>; 119 117 bus-width = <4>; 120 118 non-removable;
-2
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
··· 59 59 }; 60 60 61 61 &mmc1 { 62 - pinctrl-names = "default"; 63 - pinctrl-0 = <&mmc1_pins_a>; 64 62 vmmc-supply = <&reg_vcc3v3>; 65 63 bus-width = <4>; 66 64 non-removable;
+2
arch/arm/boot/dts/sunxi-h3-h5.dtsi
··· 154 154 mmc1: mmc@1c10000 { 155 155 /* compatible and clocks are in per SoC .dtsi file */ 156 156 reg = <0x01c10000 0x1000>; 157 + pinctrl-names = "default"; 158 + pinctrl-0 = <&mmc1_pins_a>; 157 159 resets = <&ccu RST_BUS_MMC1>; 158 160 reset-names = "ahb"; 159 161 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
-2
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
··· 158 158 }; 159 159 160 160 &mmc1 { 161 - pinctrl-names = "default"; 162 - pinctrl-0 = <&mmc1_pins_a>; 163 161 vmmc-supply = <&reg_vcc3v3>; 164 162 vqmmc-supply = <&reg_vcc3v3>; 165 163 mmc-pwrseq = <&wifi_pwrseq>;
-2
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
··· 174 174 }; 175 175 176 176 &mmc1 { 177 - pinctrl-names = "default"; 178 - pinctrl-0 = <&mmc1_pins_a>; 179 177 vmmc-supply = <&reg_vcc3v3>; 180 178 mmc-pwrseq = <&wifi_pwrseq>; 181 179 bus-width = <4>;
-2
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
··· 81 81 }; 82 82 83 83 &mmc1 { 84 - pinctrl-names = "default"; 85 - pinctrl-0 = <&mmc1_pins_a>; 86 84 vmmc-supply = <&reg_vcc3v3>; 87 85 vqmmc-supply = <&reg_vcc3v3>; 88 86 mmc-pwrseq = <&wifi_pwrseq>;