Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd: Duplicate DC_FEATURE_MASK and DC_DEBUG_MASK enum values into kdoc

[Why]
When kernel documentation is generated the enum values themselves don't
end up in the documentation. This makes browsing them in HTML a lot
less useful.

[How]
Copy DC_DEBUG_MASK and DC_FEATURE_MASK enum values into matching kdoc
comments.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Mario Limonciello and committed by
Alex Deucher
e0dd9b8e efbacd8a

+67 -33
+1 -1
Documentation/gpu/amdgpu/driver-core.rst
··· 210 210 :doc: IP Blocks 211 211 212 212 .. kernel-doc:: drivers/gpu/drm/amd/include/amd_shared.h 213 - :identifiers: amd_ip_block_type amd_ip_funcs DC_DEBUG_MASK 213 + :identifiers: amd_ip_block_type amd_ip_funcs DC_FEATURE_MASK DC_DEBUG_MASK
+66 -32
drivers/gpu/drm/amd/include/amd_shared.h
··· 239 239 AMD_HARVEST_IP_DMU_MASK = 0x4, 240 240 }; 241 241 242 + /** 243 + * enum DC_FEATURE_MASK - Bits that control DC feature defaults 244 + */ 242 245 enum DC_FEATURE_MASK { 243 246 //Default value can be found at "uint amdgpu_dc_feature_mask" 244 - DC_FBC_MASK = (1 << 0), //0x1, disabled by default 245 - DC_MULTI_MON_PP_MCLK_SWITCH_MASK = (1 << 1), //0x2, enabled by default 246 - DC_DISABLE_FRACTIONAL_PWM_MASK = (1 << 2), //0x4, disabled by default 247 - DC_PSR_MASK = (1 << 3), //0x8, disabled by default for dcn < 3.1 248 - DC_EDP_NO_POWER_SEQUENCING = (1 << 4), //0x10, disabled by default 249 - DC_DISABLE_LTTPR_DP1_4A = (1 << 5), //0x20, disabled by default 250 - DC_DISABLE_LTTPR_DP2_0 = (1 << 6), //0x40, disabled by default 251 - DC_PSR_ALLOW_SMU_OPT = (1 << 7), //0x80, disabled by default 252 - DC_PSR_ALLOW_MULTI_DISP_OPT = (1 << 8), //0x100, disabled by default 253 - DC_REPLAY_MASK = (1 << 9), //0x200, disabled by default for dcn < 3.1.4 247 + /** 248 + * @DC_FBC_MASK: (0x1) disabled by default 249 + */ 250 + DC_FBC_MASK = (1 << 0), 251 + /** 252 + * @DC_MULTI_MON_PP_MCLK_SWITCH_MASK: (0x2) enabled by default 253 + */ 254 + DC_MULTI_MON_PP_MCLK_SWITCH_MASK = (1 << 1), 255 + /** 256 + * @DC_DISABLE_FRACTIONAL_PWM_MASK: (0x4) disabled by default 257 + */ 258 + DC_DISABLE_FRACTIONAL_PWM_MASK = (1 << 2), 259 + /** 260 + * @DC_PSR_MASK: (0x8) disabled by default for DCN < 3.1 261 + */ 262 + DC_PSR_MASK = (1 << 3), 263 + /** 264 + * @DC_EDP_NO_POWER_SEQUENCING: (0x10) disabled by default 265 + */ 266 + DC_EDP_NO_POWER_SEQUENCING = (1 << 4), 267 + /** 268 + * @DC_DISABLE_LTTPR_DP1_4A: (0x20) disabled by default 269 + */ 270 + DC_DISABLE_LTTPR_DP1_4A = (1 << 5), 271 + /** 272 + * @DC_DISABLE_LTTPR_DP2_0: (0x40) disabled by default 273 + */ 274 + DC_DISABLE_LTTPR_DP2_0 = (1 << 6), 275 + /** 276 + * @DC_PSR_ALLOW_SMU_OPT: (0x80) disabled by default 277 + */ 278 + DC_PSR_ALLOW_SMU_OPT = (1 << 7), 279 + /** 280 + * @DC_PSR_ALLOW_MULTI_DISP_OPT: (0x100) disabled by default 281 + */ 282 + DC_PSR_ALLOW_MULTI_DISP_OPT = (1 << 8), 283 + /** 284 + * @DC_REPLAY_MASK: (0x200) disabled by default for DCN < 3.1.4 285 + */ 286 + DC_REPLAY_MASK = (1 << 9), 254 287 }; 255 288 256 289 /** ··· 291 258 */ 292 259 enum DC_DEBUG_MASK { 293 260 /** 294 - * @DC_DISABLE_PIPE_SPLIT: If set, disable pipe-splitting 261 + * @DC_DISABLE_PIPE_SPLIT: (0x1) If set, disable pipe-splitting 295 262 */ 296 263 DC_DISABLE_PIPE_SPLIT = 0x1, 297 264 298 265 /** 299 - * @DC_DISABLE_STUTTER: If set, disable memory stutter mode 266 + * @DC_DISABLE_STUTTER: (0x2) If set, disable memory stutter mode 300 267 */ 301 268 DC_DISABLE_STUTTER = 0x2, 302 269 303 270 /** 304 - * @DC_DISABLE_DSC: If set, disable display stream compression 271 + * @DC_DISABLE_DSC: (0x4) If set, disable display stream compression 305 272 */ 306 273 DC_DISABLE_DSC = 0x4, 307 274 308 275 /** 309 - * @DC_DISABLE_CLOCK_GATING: If set, disable clock gating optimizations 276 + * @DC_DISABLE_CLOCK_GATING: (0x8) If set, disable clock gating optimizations 310 277 */ 311 278 DC_DISABLE_CLOCK_GATING = 0x8, 312 279 313 280 /** 314 - * @DC_DISABLE_PSR: If set, disable Panel self refresh v1 and PSR-SU 281 + * @DC_DISABLE_PSR: (0x10) If set, disable Panel self refresh v1 and PSR-SU 315 282 */ 316 283 DC_DISABLE_PSR = 0x10, 317 284 318 285 /** 319 - * @DC_FORCE_SUBVP_MCLK_SWITCH: If set, force mclk switch in subvp, even 286 + * @DC_FORCE_SUBVP_MCLK_SWITCH: (0x20) If set, force mclk switch in subvp, even 320 287 * if mclk switch in vblank is possible 321 288 */ 322 289 DC_FORCE_SUBVP_MCLK_SWITCH = 0x20, 323 290 324 291 /** 325 - * @DC_DISABLE_MPO: If set, disable multi-plane offloading 292 + * @DC_DISABLE_MPO: (0x40) If set, disable multi-plane offloading 326 293 */ 327 294 DC_DISABLE_MPO = 0x40, 328 295 329 296 /** 330 - * @DC_ENABLE_DPIA_TRACE: If set, enable trace logging for DPIA 297 + * @DC_ENABLE_DPIA_TRACE: (0x80) If set, enable trace logging for DPIA 331 298 */ 332 299 DC_ENABLE_DPIA_TRACE = 0x80, 333 300 334 301 /** 335 - * @DC_ENABLE_DML2: If set, force usage of DML2, even if the DCN version 302 + * @DC_ENABLE_DML2: (0x100) If set, force usage of DML2, even if the DCN version 336 303 * does not default to it. 337 304 */ 338 305 DC_ENABLE_DML2 = 0x100, 339 306 340 307 /** 341 - * @DC_DISABLE_PSR_SU: If set, disable PSR SU 308 + * @DC_DISABLE_PSR_SU: (0x200) If set, disable PSR SU 342 309 */ 343 310 DC_DISABLE_PSR_SU = 0x200, 344 311 345 312 /** 346 - * @DC_DISABLE_REPLAY: If set, disable Panel Replay 313 + * @DC_DISABLE_REPLAY: (0x400) If set, disable Panel Replay 347 314 */ 348 315 DC_DISABLE_REPLAY = 0x400, 349 316 350 317 /** 351 - * @DC_DISABLE_IPS: If set, disable all Idle Power States, all the time. 318 + * @DC_DISABLE_IPS: (0x800) If set, disable all Idle Power States, all the time. 352 319 * If more than one IPS debug bit is set, the lowest bit takes 353 320 * precedence. For example, if DC_FORCE_IPS_ENABLE and 354 321 * DC_DISABLE_IPS_DYNAMIC are set, then DC_DISABLE_IPS_DYNAMIC takes ··· 357 324 DC_DISABLE_IPS = 0x800, 358 325 359 326 /** 360 - * @DC_DISABLE_IPS_DYNAMIC: If set, disable all IPS, all the time, 327 + * @DC_DISABLE_IPS_DYNAMIC: (0x1000) If set, disable all IPS, all the time, 361 328 * *except* when driver goes into suspend. 362 329 */ 363 330 DC_DISABLE_IPS_DYNAMIC = 0x1000, 364 331 365 332 /** 366 - * @DC_DISABLE_IPS2_DYNAMIC: If set, disable IPS2 (IPS1 allowed) if 333 + * @DC_DISABLE_IPS2_DYNAMIC: (0x2000) If set, disable IPS2 (IPS1 allowed) if 367 334 * there is an enabled display. Otherwise, enable all IPS. 368 335 */ 369 336 DC_DISABLE_IPS2_DYNAMIC = 0x2000, 370 337 371 338 /** 372 - * @DC_FORCE_IPS_ENABLE: If set, force enable all IPS, all the time. 339 + * @DC_FORCE_IPS_ENABLE: (0x4000) If set, force enable all IPS, all the time. 373 340 */ 374 341 DC_FORCE_IPS_ENABLE = 0x4000, 375 342 /** 376 - * @DC_DISABLE_ACPI_EDID: If set, don't attempt to fetch EDID for 343 + * @DC_DISABLE_ACPI_EDID: (0x8000) If set, don't attempt to fetch EDID for 377 344 * eDP display from ACPI _DDC method. 378 345 */ 379 346 DC_DISABLE_ACPI_EDID = 0x8000, 380 347 381 348 /** 382 - * @DC_DISABLE_HDMI_CEC: If set, disable HDMI-CEC feature in amdgpu driver. 349 + * @DC_DISABLE_HDMI_CEC: (0x10000) If set, disable HDMI-CEC feature in amdgpu driver. 383 350 */ 384 351 DC_DISABLE_HDMI_CEC = 0x10000, 385 352 386 353 /** 387 - * @DC_DISABLE_SUBVP_FAMS: If set, disable DCN Sub-Viewport & Firmware Assisted 354 + * @DC_DISABLE_SUBVP_FAMS: (0x20000) If set, disable DCN Sub-Viewport & Firmware Assisted 388 355 * Memory Clock Switching (FAMS) feature in amdgpu driver. 389 356 */ 390 357 DC_DISABLE_SUBVP_FAMS = 0x20000, 391 358 /** 392 - * @DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE: If set, disable support for custom brightness curves 359 + * @DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE: (0x40000) If set, disable support for custom 360 + * brightness curves 393 361 */ 394 362 DC_DISABLE_CUSTOM_BRIGHTNESS_CURVE = 0x40000, 395 363 396 364 /** 397 - * @DC_HDCP_LC_FORCE_FW_ENABLE: If set, use HDCP Locality Check FW 365 + * @DC_HDCP_LC_FORCE_FW_ENABLE: (0x80000) If set, use HDCP Locality Check FW 398 366 * path regardless of reported HW capabilities. 399 367 */ 400 368 DC_HDCP_LC_FORCE_FW_ENABLE = 0x80000, 401 369 402 370 /** 403 - * @DC_HDCP_LC_ENABLE_SW_FALLBACK: If set, upon HDCP Locality Check FW 371 + * @DC_HDCP_LC_ENABLE_SW_FALLBACK: (0x100000) If set, upon HDCP Locality Check FW 404 372 * path failure, retry using legacy SW path. 405 373 */ 406 374 DC_HDCP_LC_ENABLE_SW_FALLBACK = 0x100000, 407 375 408 376 /** 409 - * @DC_SKIP_DETECTION_LT: If set, skip detection link training 377 + * @DC_SKIP_DETECTION_LT: (0x200000) If set, skip detection link training 410 378 */ 411 379 DC_SKIP_DETECTION_LT = 0x200000, 412 380 };