Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd/pm: unified smu feature cap interface

add a unified interface to provide smu feature cap set.

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Yang Wang and committed by
Alex Deucher
efbacd8a 10a9c09a

+41
+29
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
··· 1315 1315 smu_power_profile_mode_get(smu, smu->power_profile_mode); 1316 1316 } 1317 1317 1318 + void smu_feature_cap_set(struct smu_context *smu, enum smu_feature_cap_id fea_id) 1319 + { 1320 + struct smu_feature_cap *fea_cap = &smu->fea_cap; 1321 + 1322 + if (fea_id >= SMU_FEATURE_CAP_ID__COUNT) 1323 + return; 1324 + 1325 + set_bit(fea_id, fea_cap->cap_map); 1326 + } 1327 + 1328 + bool smu_feature_cap_test(struct smu_context *smu, enum smu_feature_cap_id fea_id) 1329 + { 1330 + struct smu_feature_cap *fea_cap = &smu->fea_cap; 1331 + 1332 + if (fea_id >= SMU_FEATURE_CAP_ID__COUNT) 1333 + return false; 1334 + 1335 + return test_bit(fea_id, fea_cap->cap_map); 1336 + } 1337 + 1338 + static void smu_feature_cap_init(struct smu_context *smu) 1339 + { 1340 + struct smu_feature_cap *fea_cap = &smu->fea_cap; 1341 + 1342 + bitmap_zero(fea_cap->cap_map, SMU_FEATURE_CAP_ID__COUNT); 1343 + } 1344 + 1318 1345 static int smu_sw_init(struct amdgpu_ip_block *ip_block) 1319 1346 { 1320 1347 struct amdgpu_device *adev = ip_block->adev; ··· 1373 1346 1374 1347 INIT_DELAYED_WORK(&smu->swctf_delayed_work, 1375 1348 smu_swctf_delayed_work_handler); 1349 + 1350 + smu_feature_cap_init(smu); 1376 1351 1377 1352 ret = smu_smc_table_sw_init(smu); 1378 1353 if (ret) {
+12
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
··· 528 528 */ 529 529 #define SMU_WBRF_EVENT_HANDLING_PACE 10 530 530 531 + enum smu_feature_cap_id { 532 + SMU_FEATURE_CAP_ID__COUNT, 533 + }; 534 + 535 + struct smu_feature_cap { 536 + DECLARE_BITMAP(cap_map, SMU_FEATURE_CAP_ID__COUNT); 537 + }; 538 + 531 539 struct smu_context { 532 540 struct amdgpu_device *adev; 533 541 struct amdgpu_irq_src irq_source; ··· 558 550 struct amd_pp_display_configuration *display_config; 559 551 struct smu_baco_context smu_baco; 560 552 struct smu_temperature_range thermal_range; 553 + struct smu_feature_cap fea_cap; 561 554 void *od_settings; 562 555 563 556 struct smu_umd_pstate_table pstate_table; ··· 1797 1788 enum pp_pm_policy p_type, char *sysbuf); 1798 1789 1799 1790 #endif 1791 + 1792 + void smu_feature_cap_set(struct smu_context *smu, enum smu_feature_cap_id fea_id); 1793 + bool smu_feature_cap_test(struct smu_context *smu, enum smu_feature_cap_id fea_id); 1800 1794 #endif