···337 uint scc_tcrc; /* Internal */338} sccp_t;339340+/* Function code bits.341+*/342+#define SCC_EB ((u_char) 0x10) /* Set big endian byte order */343+#define SCC_GBL ((u_char) 0x20) /* Snooping enabled */344+345/* CPM Ethernet through SCC1.346 */347typedef struct scc_enet {
+3-3
drivers/net/Kconfig
···822 will be called smc-ultra32.823824config BFIN_MAC825- tristate "Blackfin 527/536/537 on-chip mac support"826- depends on NET_ETHERNET && (BF527 || BF537 || BF536)827 select CRC32828 select MII829 select PHYLIB830 select BFIN_MAC_USE_L1 if DMA_UNCACHED_NONE831 help832- This is the driver for blackfin on-chip mac device. Say Y if you want it833 compiled into the kernel. This driver is also available as a module834 ( = code which can be inserted in and removed from the running kernel835 whenever you want). The module will be called bfin_mac.
···822 will be called smc-ultra32.823824config BFIN_MAC825+ tristate "Blackfin on-chip MAC support"826+ depends on NET_ETHERNET && (BF526 || BF527 || BF536 || BF537)827 select CRC32828 select MII829 select PHYLIB830 select BFIN_MAC_USE_L1 if DMA_UNCACHED_NONE831 help832+ This is the driver for Blackfin on-chip mac device. Say Y if you want it833 compiled into the kernel. This driver is also available as a module834 ( = code which can be inserted in and removed from the running kernel835 whenever you want). The module will be called bfin_mac.
+2-1
drivers/net/atl1e/atl1e_main.c
···22322233 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);22342235- if (netif_running(netdev))2236 err = atl1e_request_irq(adapter);2237 if (err)2238 return err;022392240 atl1e_reset_hw(&adapter->hw);2241
···22322233 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);22342235+ if (netif_running(netdev)) {2236 err = atl1e_request_irq(adapter);2237 if (err)2238 return err;2239+ }22402241 atl1e_reset_hw(&adapter->hw);2242
···792 int r;793 int err;7940000795 if (fep->fpi->use_napi)796 napi_enable(&fep->napi);797···1169#ifdef CONFIG_FS_ENET_HAS_SCC1170 {1171 .compatible = "fsl,cpm1-scc-enet",00001172 .data = (void *)&fs_scc_ops,1173 },1174#endif
···792 int r;793 int err;794795+ /* to initialize the fep->cur_rx,... */796+ /* not doing this, will cause a crash in fs_enet_rx_napi */797+ fs_init_bds(fep->ndev);798+799 if (fep->fpi->use_napi)800 napi_enable(&fep->napi);801···1165#ifdef CONFIG_FS_ENET_HAS_SCC1166 {1167 .compatible = "fsl,cpm1-scc-enet",1168+ .data = (void *)&fs_scc_ops,1169+ },1170+ {1171+ .compatible = "fsl,cpm2-scc-enet",1172 .data = (void *)&fs_scc_ops,1173 },1174#endif
+7-1
drivers/net/fs_enet/mac-scc.c
···47#include "fs_enet.h"4849/*************************************************/50-51#if defined(CONFIG_CPM1)52/* for a 8xx __raw_xxx's are sufficient */53#define __fs_out32(addr, x) __raw_writel(x, addr)···61#define __fs_out16(addr, x) out_be16(addr, x)62#define __fs_in32(addr) in_be32(addr)63#define __fs_in16(addr) in_be16(addr)0064#endif6566/* write, read, set bits, clear bits */···263264 /* Initialize function code registers for big-endian.265 */0000266 W8(ep, sen_genscc.scc_rfcr, SCC_EB);267 W8(ep, sen_genscc.scc_tfcr, SCC_EB);0268269 /* Set maximum bytes per receive buffer.270 * This appears to be an Ethernet frame size, not the buffer
···47#include "fs_enet.h"4849/*************************************************/050#if defined(CONFIG_CPM1)51/* for a 8xx __raw_xxx's are sufficient */52#define __fs_out32(addr, x) __raw_writel(x, addr)···62#define __fs_out16(addr, x) out_be16(addr, x)63#define __fs_in32(addr) in_be32(addr)64#define __fs_in16(addr) in_be16(addr)65+#define __fs_out8(addr, x) out_8(addr, x)66+#define __fs_in8(addr) in_8(addr)67#endif6869/* write, read, set bits, clear bits */···262263 /* Initialize function code registers for big-endian.264 */265+#ifndef CONFIG_NOT_COHERENT_CACHE266+ W8(ep, sen_genscc.scc_rfcr, SCC_EB | SCC_GBL);267+ W8(ep, sen_genscc.scc_tfcr, SCC_EB | SCC_GBL);268+#else269 W8(ep, sen_genscc.scc_rfcr, SCC_EB);270 W8(ep, sen_genscc.scc_tfcr, SCC_EB);271+#endif272273 /* Set maximum bytes per receive buffer.274 * This appears to be an Ethernet frame size, not the buffer
+18-4
drivers/net/gianfar.c
···105106static int gfar_enet_open(struct net_device *dev);107static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev);0108static void gfar_timeout(struct net_device *dev);109static int gfar_close(struct net_device *dev);110struct sk_buff *gfar_new_skb(struct net_device *dev);···210 spin_lock_init(&priv->txlock);211 spin_lock_init(&priv->rxlock);212 spin_lock_init(&priv->bflock);0213214 platform_set_drvdata(pdev, dev);215···12141215 napi_disable(&priv->napi);121601217 stop_gfar(dev);12181219 /* Disconnect from the PHY */···1329 return 0;1330}13311332-/* gfar_timeout gets called when a packet has not been1333 * transmitted after a set amount of time.1334 * For now, assume that clearing out all the structures, and1335- * starting over will fix the problem. */1336-static void gfar_timeout(struct net_device *dev)01337{1338- dev->stats.tx_errors++;0013391340 if (dev->flags & IFF_UP) {1341 stop_gfar(dev);···1346 }13471348 netif_tx_schedule_all(dev);000000001349}13501351/* Interrupt Handler for Transmit complete */
···105106static int gfar_enet_open(struct net_device *dev);107static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev);108+static void gfar_reset_task(struct work_struct *work);109static void gfar_timeout(struct net_device *dev);110static int gfar_close(struct net_device *dev);111struct sk_buff *gfar_new_skb(struct net_device *dev);···209 spin_lock_init(&priv->txlock);210 spin_lock_init(&priv->rxlock);211 spin_lock_init(&priv->bflock);212+ INIT_WORK(&priv->reset_task, gfar_reset_task);213214 platform_set_drvdata(pdev, dev);215···12121213 napi_disable(&priv->napi);12141215+ cancel_work_sync(&priv->reset_task);1216 stop_gfar(dev);12171218 /* Disconnect from the PHY */···1326 return 0;1327}13281329+/* gfar_reset_task gets scheduled when a packet has not been1330 * transmitted after a set amount of time.1331 * For now, assume that clearing out all the structures, and1332+ * starting over will fix the problem.1333+ */1334+static void gfar_reset_task(struct work_struct *work)1335{1336+ struct gfar_private *priv = container_of(work, struct gfar_private,1337+ reset_task);1338+ struct net_device *dev = priv->dev;13391340 if (dev->flags & IFF_UP) {1341 stop_gfar(dev);···1340 }13411342 netif_tx_schedule_all(dev);1343+}1344+1345+static void gfar_timeout(struct net_device *dev)1346+{1347+ struct gfar_private *priv = netdev_priv(dev);1348+1349+ dev->stats.tx_errors++;1350+ schedule_work(&priv->reset_task);1351}13521353/* Interrupt Handler for Transmit complete */
···87 case E1000_DEV_ID_82576:88 case E1000_DEV_ID_82576_FIBER:89 case E1000_DEV_ID_82576_SERDES:90- case E1000_DEV_ID_82576_QUAD_COPPER:91 mac->type = e1000_82576;92 break;93 default:
···87 case E1000_DEV_ID_82576:88 case E1000_DEV_ID_82576_FIBER:89 case E1000_DEV_ID_82576_SERDES:090 mac->type = e1000_82576;91 break;92 default:
···373 regs_buff[12] = rd32(E1000_EECD);374375 /* Interrupt */376- regs_buff[13] = rd32(E1000_EICR);00377 regs_buff[14] = rd32(E1000_EICS);378 regs_buff[15] = rd32(E1000_EIMS);379 regs_buff[16] = rd32(E1000_EIMC);380 regs_buff[17] = rd32(E1000_EIAC);381 regs_buff[18] = rd32(E1000_EIAM);382- regs_buff[19] = rd32(E1000_ICR);00383 regs_buff[20] = rd32(E1000_ICS);384 regs_buff[21] = rd32(E1000_IMS);385 regs_buff[22] = rd32(E1000_IMC);···1744 case E1000_DEV_ID_82576_SERDES:1745 /* Wake events not supported on port B */1746 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1) {1747- wol->supported = 0;1748- break;1749- }1750- /* return success for non excluded adapter ports */1751- retval = 0;1752- break;1753- case E1000_DEV_ID_82576_QUAD_COPPER:1754- /* quad port adapters only support WoL on port A */1755- if (!(adapter->flags & IGB_FLAG_QUAD_PORT_A)) {1756 wol->supported = 0;1757 break;1758 }
···373 regs_buff[12] = rd32(E1000_EECD);374375 /* Interrupt */376+ /* Reading EICS for EICR because they read the377+ * same but EICS does not clear on read */378+ regs_buff[13] = rd32(E1000_EICS);379 regs_buff[14] = rd32(E1000_EICS);380 regs_buff[15] = rd32(E1000_EIMS);381 regs_buff[16] = rd32(E1000_EIMC);382 regs_buff[17] = rd32(E1000_EIAC);383 regs_buff[18] = rd32(E1000_EIAM);384+ /* Reading ICS for ICR because they read the385+ * same but ICS does not clear on read */386+ regs_buff[19] = rd32(E1000_ICS);387 regs_buff[20] = rd32(E1000_ICS);388 regs_buff[21] = rd32(E1000_IMS);389 regs_buff[22] = rd32(E1000_IMC);···1740 case E1000_DEV_ID_82576_SERDES:1741 /* Wake events not supported on port B */1742 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1) {0000000001743 wol->supported = 0;1744 break;1745 }
+11-14
drivers/net/igb/igb_main.c
···61 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },62 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },63 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },64- { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER), board_82575 },65 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },66 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },67 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },···520 adapter->msix_entries,521 numvecs);522 if (err == 0)523- return;524525 igb_reset_interrupt_capability(adapter);526···530 adapter->num_tx_queues = 1;531 if (!pci_enable_msi(adapter->pdev))532 adapter->flags |= IGB_FLAG_HAS_MSI;533-534 /* Notify the stack of the (possibly) reduced Tx Queue count. */535 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;536 return;···1215 * regardless of eeprom setting */1216 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)1217 adapter->eeprom_wol = 0;1218- break;1219- case E1000_DEV_ID_82576_QUAD_COPPER:1220- /* if quad port adapter, disable WoL on all but port A */1221- if (global_quad_port_a != 0)1222- adapter->eeprom_wol = 0;1223- else1224- adapter->flags |= IGB_FLAG_QUAD_PORT_A;1225- /* Reset for multiple quad port adapters */1226- if (++global_quad_port_a == 4)1227- global_quad_port_a = 0;1228 break;1229 }1230···2279 struct igb_ring *tx_ring = adapter->tx_ring;2280 struct e1000_mac_info *mac = &adapter->hw.mac;2281 u32 link;02282 s32 ret_val;022832284 if ((netif_carrier_ok(netdev)) &&2285 (rd32(E1000_STATUS) & E1000_STATUS_LU))···2383 }23842385 /* Cause software interrupt to ensure rx ring is cleaned */2386- wr32(E1000_ICS, E1000_ICS_RXDMT0);00000023872388 /* Force detection of hung controller every watchdog period */2389 tx_ring->detect_tx_hung = true;
···61 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576), board_82575 },62 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER), board_82575 },63 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES), board_82575 },064 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 },65 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 },66 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 },···521 adapter->msix_entries,522 numvecs);523 if (err == 0)524+ goto out;525526 igb_reset_interrupt_capability(adapter);527···531 adapter->num_tx_queues = 1;532 if (!pci_enable_msi(adapter->pdev))533 adapter->flags |= IGB_FLAG_HAS_MSI;534+out:535 /* Notify the stack of the (possibly) reduced Tx Queue count. */536 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues;537 return;···1216 * regardless of eeprom setting */1217 if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1)1218 adapter->eeprom_wol = 0;00000000001219 break;1220 }1221···2290 struct igb_ring *tx_ring = adapter->tx_ring;2291 struct e1000_mac_info *mac = &adapter->hw.mac;2292 u32 link;2293+ u32 eics = 0;2294 s32 ret_val;2295+ int i;22962297 if ((netif_carrier_ok(netdev)) &&2298 (rd32(E1000_STATUS) & E1000_STATUS_LU))···2392 }23932394 /* Cause software interrupt to ensure rx ring is cleaned */2395+ if (adapter->msix_entries) {2396+ for (i = 0; i < adapter->num_rx_queues; i++)2397+ eics |= adapter->rx_ring[i].eims_value;2398+ wr32(E1000_EICS, eics);2399+ } else {2400+ wr32(E1000_ICS, E1000_ICS_RXDMT0);2401+ }24022403 /* Force detection of hung controller every watchdog period */2404 tx_ring->detect_tx_hung = true;
···1412 }1413 /* How far in the ccw chain have we processed? */1414 if ((channel->state != LCS_CH_STATE_INIT) &&1415- (irb->scsw.cmd.fctl & SCSW_FCTL_START_FUNC)) {01416 index = (struct ccw1 *) __va((addr_t) irb->scsw.cmd.cpa)1417 - channel->ccws;1418 if ((irb->scsw.cmd.actl & SCSW_ACTL_SUSPENDED) ||
···1412 }1413 /* How far in the ccw chain have we processed? */1414 if ((channel->state != LCS_CH_STATE_INIT) &&1415+ (irb->scsw.cmd.fctl & SCSW_FCTL_START_FUNC) &&1416+ (irb->scsw.cmd.cpa != 0)) {1417 index = (struct ccw1 *) __va((addr_t) irb->scsw.cmd.cpa)1418 - channel->ccws;1419 if ((irb->scsw.cmd.actl & SCSW_ACTL_SUSPENDED) ||
···3024 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,3025 int offset)3026{3027- int length = skb->len;3028 int length_here;3029 int element;3030 char *data;
···3024 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,3025 int offset)3026{3027+ int length = skb->len - offset;3028 int length_here;3029 int element;3030 char *data;