Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'imx-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX device tree change for 5.20:

- A series from Alexander Stein to fix some i.MX6UL dt_binding_check
warnings.
- Replace deprecated 'enable-sdio-wakeup' property with 'wakeup-source'
for a couple of boards.
- A set of imx7-colibri device tree updates from Marcel Ziswiler to
improve devices Display, Touch, Ethernet and SD/MMC, and also adds
Toradex Iris carrier board.
- A few improvements on imx6qdl-colibri board, correct SGTL5000 MCLK
handling, simplify handling of inverted PWM backlight.
- A series from Max Krummenacher (and Oleksandr Suvorov) to improve the
existing i.MX6 Apalis carrier board device trees and adds a new device
tree for the Ixora V1.2 carrier board.
- Add USB dual-role switching using extcon for imx7-colibri board.
- Add SFP node for TA 2.1 devices for LayerScape SoCs.
- Other small and random updates on various boards.

* tag 'imx-dt-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (61 commits)
ARM: dts: layerscape: Add SFP node for TA 2.1 devices
ARM: dts: imx6qdl-prti6q.dtsi: Add applicable properties to usdhc3
ARM: dts: imx6q-bosch-acc: Replace 'enable-sdio-wakeup'
ARM: dts: imx7d-smegw01: Replace 'enable-sdio-wakeup'
ARM: dts: imx6q-apalis: Cleanup
ARM: dts: imx6q-apalis: backlight pwm: Adapt brightness steps
ARM: dts: imx6q-apalis: backlight pwm: Simplify inverted backlight
ARM: dts: imx6q-apalis: Add support for Toradex Ixora V1.2 carrier boards
ARM: dts: imx6q-apalis: Clean-up sd card support
ARM: dts: imx6q-apalis: Add adv7280 video input
ARM: dts: imx6q-apalis: Add ov5640 mipi csi camera
ARM: dts: imx6q-apalis: Disable stmpe touchscreen
ARM: dts: imx6q-apalis: Disable HDMI
ARM: dts: imx6q-apalis: Add LVDS panel support
ARM: dts: imx6q-apalis: move gpio-keys to SoM dtsi
ARM: dts: imx6q-apalis: Move Atmel MXT touch ctrl to SoM dtsi
ARM: dts: imx6q-apalis: Move pinmux groups to SoM dtsi
ARM: dts: imx6q-apalis: Move parallel rgb interface to SoM dtsi
ARM: dts: imx6q-apalis: Command pmic to standby for poweroff
ARM: dts: imx6q-apalis: Add gpio-line-names
...

Link: https://lore.kernel.org/r/20220709082951.15123-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+2260 -1270
+7
arch/arm/boot/dts/Makefile
··· 550 550 imx6q-apalis-eval.dtb \ 551 551 imx6q-apalis-ixora.dtb \ 552 552 imx6q-apalis-ixora-v1.1.dtb \ 553 + imx6q-apalis-ixora-v1.2.dtb \ 553 554 imx6q-apf6dev.dtb \ 554 555 imx6q-arm2.dtb \ 555 556 imx6q-b450v3.dtb \ ··· 742 741 imx7d-cl-som-imx7.dtb \ 743 742 imx7d-colibri-aster.dtb \ 744 743 imx7d-colibri-emmc-aster.dtb \ 744 + imx7d-colibri-emmc-iris.dtb \ 745 + imx7d-colibri-emmc-iris-v2.dtb \ 745 746 imx7d-colibri-emmc-eval-v3.dtb \ 746 747 imx7d-colibri-eval-v3.dtb \ 748 + imx7d-colibri-iris.dtb \ 749 + imx7d-colibri-iris-v2.dtb \ 747 750 imx7d-flex-concentrator.dtb \ 748 751 imx7d-flex-concentrator-mfg.dtb \ 749 752 imx7d-mba7.dtb \ ··· 767 762 imx7d-zii-rpu2.dtb \ 768 763 imx7s-colibri-aster.dtb \ 769 764 imx7s-colibri-eval-v3.dtb \ 765 + imx7s-colibri-iris.dtb \ 766 + imx7s-colibri-iris-v2.dtb \ 770 767 imx7s-mba7.dtb \ 771 768 imx7s-warp.dtb 772 769 dtb-$(CONFIG_SOC_IMX7ULP) += \
+2 -2
arch/arm/boot/dts/e60k02.dtsi
··· 22 22 gpio_keys: gpio-keys { 23 23 compatible = "gpio-keys"; 24 24 25 - power { 25 + key-power { 26 26 label = "Power"; 27 27 gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; 28 28 linux,code = <KEY_POWER>; 29 29 wakeup-source; 30 30 }; 31 31 32 - cover { 32 + key-cover { 33 33 label = "Cover"; 34 34 gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; 35 35 linux,code = <SW_LID>;
+4 -4
arch/arm/boot/dts/e70k02.dtsi
··· 26 26 gpio_keys: gpio-keys { 27 27 compatible = "gpio-keys"; 28 28 29 - power { 29 + key-power { 30 30 label = "Power"; 31 31 gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; 32 32 linux,code = <KEY_POWER>; 33 33 wakeup-source; 34 34 }; 35 35 36 - cover { 36 + key-cover { 37 37 label = "Cover"; 38 38 gpios = <&gpio4 23 GPIO_ACTIVE_LOW>; 39 39 linux,code = <SW_LID>; ··· 41 41 wakeup-source; 42 42 }; 43 43 44 - pageup { 44 + key-pageup { 45 45 label = "PageUp"; 46 46 gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; 47 47 linux,code = <KEY_PAGEUP>; 48 48 }; 49 49 50 - pagedown { 50 + key-pagedown { 51 51 label = "PageDown"; 52 52 gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; 53 53 linux,code = <KEY_PAGEDOWN>;
+1 -1
arch/arm/boot/dts/imx25.dtsi
··· 68 68 }; 69 69 }; 70 70 71 - soc { 71 + soc: soc { 72 72 #address-cells = <1>; 73 73 #size-cells = <1>; 74 74 compatible = "simple-bus";
+3 -3
arch/arm/boot/dts/imx27.dtsi
··· 74 74 }; 75 75 }; 76 76 77 - soc { 77 + soc: soc { 78 78 #address-cells = <1>; 79 79 #size-cells = <1>; 80 80 compatible = "simple-bus"; 81 81 interrupt-parent = <&aitc>; 82 82 ranges; 83 83 84 - aipi@10000000 { /* AIPI1 */ 84 + aipi1: aipi@10000000 { /* AIPI1 */ 85 85 compatible = "fsl,aipi-bus", "simple-bus"; 86 86 #address-cells = <1>; 87 87 #size-cells = <1>; ··· 453 453 }; 454 454 }; 455 455 456 - aipi@10020000 { /* AIPI2 */ 456 + aipi2: aipi@10020000 { /* AIPI2 */ 457 457 compatible = "fsl,aipi-bus", "simple-bus"; 458 458 #address-cells = <1>; 459 459 #size-cells = <1>;
+2 -2
arch/arm/boot/dts/imx31.dtsi
··· 48 48 reg = <0x68000000 0x100000>; 49 49 }; 50 50 51 - soc { 51 + soc: soc { 52 52 #address-cells = <1>; 53 53 #size-cells = <1>; 54 54 compatible = "simple-bus"; ··· 63 63 ranges = <0 0x1fffc000 0x4000>; 64 64 }; 65 65 66 - bus@43f00000 { /* AIPS1 */ 66 + aips1: bus@43f00000 { /* AIPS1 */ 67 67 compatible = "fsl,aips-bus", "simple-bus"; 68 68 #address-cells = <1>; 69 69 #size-cells = <1>;
+3 -3
arch/arm/boot/dts/imx50.dtsi
··· 94 94 status = "okay"; 95 95 }; 96 96 97 - soc { 97 + soc: soc { 98 98 #address-cells = <1>; 99 99 #size-cells = <1>; 100 100 compatible = "simple-bus"; 101 101 interrupt-parent = <&tzic>; 102 102 ranges; 103 103 104 - bus@50000000 { /* AIPS1 */ 104 + aips1: bus@50000000 { /* AIPS1 */ 105 105 compatible = "fsl,aips-bus", "simple-bus"; 106 106 #address-cells = <1>; 107 107 #size-cells = <1>; ··· 385 385 }; 386 386 }; 387 387 388 - bus@60000000 { /* AIPS2 */ 388 + aips2: bus@60000000 { /* AIPS2 */ 389 389 compatible = "fsl,aips-bus", "simple-bus"; 390 390 #address-cells = <1>; 391 391 #size-cells = <1>;
+1 -1
arch/arm/boot/dts/imx51-ts4800.dts
··· 174 174 pinctrl-names = "default"; 175 175 pinctrl-0 = <&pinctrl_interrupt_fpga>; 176 176 interrupt-parent = <&gpio2>; 177 - interrupts= <9 IRQ_TYPE_LEVEL_HIGH>; 177 + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; 178 178 interrupt-controller; 179 179 #interrupt-cells = <1>; 180 180 };
+3 -3
arch/arm/boot/dts/imx51.dtsi
··· 114 114 ports = <&ipu_di0>, <&ipu_di1>; 115 115 }; 116 116 117 - soc { 117 + soc: soc { 118 118 #address-cells = <1>; 119 119 #size-cells = <1>; 120 120 compatible = "simple-bus"; ··· 171 171 }; 172 172 }; 173 173 174 - bus@70000000 { /* AIPS1 */ 174 + aips1: bus@70000000 { /* AIPS1 */ 175 175 compatible = "fsl,aips-bus", "simple-bus"; 176 176 #address-cells = <1>; 177 177 #size-cells = <1>; ··· 460 460 }; 461 461 }; 462 462 463 - bus@80000000 { /* AIPS2 */ 463 + aips2: bus@80000000 { /* AIPS2 */ 464 464 compatible = "fsl,aips-bus", "simple-bus"; 465 465 #address-cells = <1>; 466 466 #size-cells = <1>;
+3 -3
arch/arm/boot/dts/imx53.dtsi
··· 132 132 status = "okay"; 133 133 }; 134 134 135 - soc { 135 + soc: soc { 136 136 #address-cells = <1>; 137 137 #size-cells = <1>; 138 138 compatible = "simple-bus"; ··· 222 222 clock-names = "core_clk", "mem_iface_clk"; 223 223 }; 224 224 225 - bus@50000000 { /* AIPS1 */ 225 + aips1: bus@50000000 { /* AIPS1 */ 226 226 compatible = "fsl,aips-bus", "simple-bus"; 227 227 #address-cells = <1>; 228 228 #size-cells = <1>; ··· 655 655 }; 656 656 }; 657 657 658 - bus@60000000 { /* AIPS2 */ 658 + aips2: bus@60000000 { /* AIPS2 */ 659 659 compatible = "fsl,aips-bus", "simple-bus"; 660 660 #address-cells = <1>; 661 661 #size-cells = <1>;
+1 -1
arch/arm/boot/dts/imx6dl-plym2m.dts
··· 196 196 compatible = "ti,tsc2046e-adc"; 197 197 reg = <0>; 198 198 pinctrl-0 = <&pinctrl_tsc2046>; 199 - pinctrl-names ="default"; 199 + pinctrl-names = "default"; 200 200 spi-max-frequency = <1000000>; 201 201 interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>; 202 202 #io-channel-cells = <1>;
+1 -1
arch/arm/boot/dts/imx6dl-prtvt7.dts
··· 344 344 compatible = "ti,tsc2046e-adc"; 345 345 reg = <0>; 346 346 pinctrl-0 = <&pinctrl_tsc>; 347 - pinctrl-names ="default"; 347 + pinctrl-names = "default"; 348 348 spi-max-frequency = <1000000>; 349 349 interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>; 350 350 #io-channel-cells = <1>;
+1 -1
arch/arm/boot/dts/imx6dl-victgo.dts
··· 144 144 compatible = "ti,tsc2046e-adc"; 145 145 reg = <0>; 146 146 pinctrl-0 = <&pinctrl_touchscreen>; 147 - pinctrl-names ="default"; 147 + pinctrl-names = "default"; 148 148 spi-max-frequency = <1000000>; 149 149 interrupts-extended = <&gpio5 8 IRQ_TYPE_LEVEL_LOW>; 150 150 #io-channel-cells = <1>;
+1 -1
arch/arm/boot/dts/imx6dl.dtsi
··· 80 80 }; 81 81 }; 82 82 83 - soc { 83 + soc: soc { 84 84 ocram: sram@900000 { 85 85 compatible = "mmio-sram"; 86 86 reg = <0x00900000 0x20000>;
+13 -116
arch/arm/boot/dts/imx6q-apalis-eval.dts
··· 1 - // SPDX-License-Identifier: GPL-2.0+ OR MIT 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2014-2020 Toradex 3 + * Copyright 2014-2022 Toradex 4 4 * Copyright 2012 Freescale Semiconductor, Inc. 5 5 * Copyright 2011 Linaro Ltd. 6 6 */ ··· 30 30 stdout-path = "serial0:115200n8"; 31 31 }; 32 32 33 - gpio-keys { 34 - compatible = "gpio-keys"; 35 - pinctrl-names = "default"; 36 - pinctrl-0 = <&pinctrl_gpio_keys>; 37 - 38 - wakeup { 39 - label = "Wake-Up"; 40 - gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 41 - linux,code = <KEY_WAKEUP>; 42 - debounce-interval = <10>; 43 - wakeup-source; 44 - }; 45 - }; 46 - 47 - lcd_display: disp0 { 48 - compatible = "fsl,imx-parallel-display"; 49 - #address-cells = <1>; 50 - #size-cells = <0>; 51 - interface-pix-fmt = "rgb24"; 52 - pinctrl-names = "default"; 53 - pinctrl-0 = <&pinctrl_ipu1_lcdif>; 54 - status = "okay"; 55 - 56 - port@0 { 57 - reg = <0>; 58 - 59 - lcd_display_in: endpoint { 60 - remote-endpoint = <&ipu1_di1_disp1>; 61 - }; 62 - }; 63 - 64 - port@1 { 65 - reg = <1>; 66 - 67 - lcd_display_out: endpoint { 68 - remote-endpoint = <&lcd_panel_in>; 69 - }; 70 - }; 71 - }; 72 - 73 - panel: panel { 74 - /* 75 - * edt,et057090dhu: EDT 5.7" LCD TFT 76 - * edt,et070080dh6: EDT 7.0" LCD TFT 77 - */ 78 - compatible = "edt,et057090dhu"; 79 - backlight = <&backlight>; 80 - power-supply = <&reg_3v3_sw>; 81 - 82 - port { 83 - lcd_panel_in: endpoint { 84 - remote-endpoint = <&lcd_display_out>; 85 - }; 86 - }; 87 - }; 88 - 89 33 reg_pcie_switch: regulator-pcie-switch { 90 34 compatible = "regulator-fixed"; 91 - regulator-name = "pcie_switch"; 92 - regulator-min-microvolt = <1800000>; 93 - regulator-max-microvolt = <1800000>; 94 - gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; 95 - startup-delay-us = <100000>; 96 35 enable-active-high; 36 + gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; 37 + regulator-max-microvolt = <1800000>; 38 + regulator-min-microvolt = <1800000>; 39 + regulator-name = "pcie_switch"; 40 + startup-delay-us = <100000>; 97 41 status = "okay"; 98 42 }; 99 43 100 44 reg_3v3_sw: regulator-3v3-sw { 101 45 compatible = "regulator-fixed"; 102 - regulator-name = "3.3V_SW"; 103 - regulator-min-microvolt = <3300000>; 104 - regulator-max-microvolt = <3300000>; 105 46 regulator-always-on; 47 + regulator-max-microvolt = <3300000>; 48 + regulator-min-microvolt = <3300000>; 49 + regulator-name = "3.3V_SW"; 106 50 }; 107 - }; 108 - 109 - &backlight { 110 - brightness-levels = <0 127 191 223 239 247 251 255>; 111 - default-brightness-level = <1>; 112 - power-supply = <&reg_3v3_sw>; 113 - status = "okay"; 114 51 }; 115 52 116 53 &can1 { ··· 60 123 status = "okay"; 61 124 }; 62 125 63 - &hdmi { 64 - status = "okay"; 65 - }; 66 - 67 126 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ 68 127 &i2c1 { 69 128 status = "okay"; 70 - 71 - /* 72 - * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>, 73 - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms 74 - */ 75 - touchscreen@4a { 76 - compatible = "atmel,maxtouch"; 77 - reg = <0x4a>; 78 - interrupt-parent = <&gpio6>; 79 - interrupts = <10 IRQ_TYPE_EDGE_FALLING>; 80 - reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* SODIMM 13 */ 81 - status = "disabled"; 82 - }; 83 129 84 130 pcie-switch@58 { 85 131 compatible = "plx,pex8605"; ··· 81 161 * board) 82 162 */ 83 163 &i2c3 { 84 - status = "okay"; 85 - }; 86 - 87 - &ipu1_di1_disp1 { 88 - remote-endpoint = <&lcd_display_in>; 89 - }; 90 - 91 - &ldb { 92 164 status = "okay"; 93 165 }; 94 166 ··· 110 198 status = "okay"; 111 199 }; 112 200 113 - &reg_usb_otg_vbus { 201 + &reg_usb_host_vbus { 114 202 status = "okay"; 115 203 }; 116 204 117 - &reg_usb_host_vbus { 205 + &reg_usb_otg_vbus { 118 206 status = "okay"; 119 207 }; 120 208 ··· 158 246 159 247 /* MMC1 */ 160 248 &usdhc1 { 161 - pinctrl-names = "default"; 162 - pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit &pinctrl_mmc_cd>; 163 - cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; 164 249 status = "okay"; 165 250 }; 166 251 167 252 /* SD1 */ 168 253 &usdhc2 { 254 + cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; 169 255 pinctrl-names = "default"; 170 256 pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>; 171 - cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; 172 257 status = "okay"; 173 - }; 174 - 175 - &iomuxc { 176 - /* 177 - * Mux the Apalis GPIOs 178 - */ 179 - pinctrl-names = "default"; 180 - pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 181 - &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 182 - &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 183 - &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 184 - >; 185 258 };
+13 -250
arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts
··· 1 - // SPDX-License-Identifier: GPL-2.0+ OR MIT 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2014-2020 Toradex 3 + * Copyright 2014-2022 Toradex 4 4 * Copyright 2012 Freescale Semiconductor, Inc. 5 5 * Copyright 2011 Linaro Ltd. 6 6 */ 7 7 8 - /dts-v1/; 9 - 10 - #include <dt-bindings/gpio/gpio.h> 11 - #include <dt-bindings/input/input.h> 12 - #include <dt-bindings/interrupt-controller/irq.h> 13 - #include "imx6q.dtsi" 14 - #include "imx6qdl-apalis.dtsi" 8 + #include "imx6q-apalis-ixora-v1.2.dts" 15 9 16 10 / { 17 11 model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.1"; 18 - compatible = "toradex,apalis_imx6q-ixora-v1.1", 19 - "toradex,apalis_imx6q-ixora", "toradex,apalis_imx6q", 12 + compatible = "toradex,apalis_imx6q-ixora-v1.1", "toradex,apalis_imx6q", 20 13 "fsl,imx6q"; 21 14 22 - aliases { 23 - i2c0 = &i2c1; 24 - i2c1 = &i2c3; 25 - i2c2 = &i2c2; 26 - rtc0 = &rtc_i2c; 27 - rtc1 = &snvs_rtc; 28 - }; 29 15 30 - chosen { 31 - stdout-path = "serial0:115200n8"; 32 - }; 33 - 34 - gpio-keys { 35 - compatible = "gpio-keys"; 36 - pinctrl-names = "default"; 37 - pinctrl-0 = <&pinctrl_gpio_keys>; 38 - 39 - wakeup { 40 - label = "Wake-Up"; 41 - gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 42 - linux,code = <KEY_WAKEUP>; 43 - debounce-interval = <10>; 44 - wakeup-source; 45 - }; 46 - }; 47 - 48 - lcd_display: disp0 { 49 - compatible = "fsl,imx-parallel-display"; 50 - #address-cells = <1>; 51 - #size-cells = <0>; 52 - interface-pix-fmt = "rgb24"; 53 - pinctrl-names = "default"; 54 - pinctrl-0 = <&pinctrl_ipu1_lcdif>; 55 - status = "okay"; 56 - 57 - port@0 { 58 - reg = <0>; 59 - 60 - lcd_display_in: endpoint { 61 - remote-endpoint = <&ipu1_di1_disp1>; 62 - }; 63 - }; 64 - 65 - port@1 { 66 - reg = <1>; 67 - 68 - lcd_display_out: endpoint { 69 - remote-endpoint = <&lcd_panel_in>; 70 - }; 71 - }; 72 - }; 73 - 74 - panel: panel { 75 - /* 76 - * edt,et057090dhu: EDT 5.7" LCD TFT 77 - * edt,et070080dh6: EDT 7.0" LCD TFT 78 - */ 79 - compatible = "edt,et057090dhu"; 80 - backlight = <&backlight>; 81 - 82 - port { 83 - lcd_panel_in: endpoint { 84 - remote-endpoint = <&lcd_display_out>; 85 - }; 86 - }; 87 - }; 88 - 89 - leds { 90 - compatible = "gpio-leds"; 91 - 92 - pinctrl-names = "default"; 93 - pinctrl-0 = <&pinctrl_leds_ixora>; 94 - 95 - led4-green { 96 - label = "LED_4_GREEN"; 97 - gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; 98 - }; 99 - 100 - led4-red { 101 - label = "LED_4_RED"; 102 - gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; 103 - }; 104 - 105 - led5-green { 106 - label = "LED_5_GREEN"; 107 - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; 108 - }; 109 - 110 - led5-red { 111 - label = "LED_5_RED"; 112 - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; 113 - }; 114 - }; 115 16 }; 116 17 117 - &backlight { 118 - brightness-levels = <0 127 191 223 239 247 251 255>; 119 - default-brightness-level = <1>; 120 - status = "okay"; 121 - }; 18 + /delete-node/ &eeprom; 19 + /delete-node/ &reg_3v3_vmmc; 20 + /delete-node/ &reg_can1_supply; 21 + /delete-node/ &reg_can2_supply; 122 22 123 23 &can1 { 124 - status = "okay"; 24 + /delete-property/ xceiver-supply; 125 25 }; 126 26 127 27 &can2 { 128 - status = "okay"; 129 - }; 130 - 131 - &hdmi { 132 - status = "okay"; 133 - }; 134 - 135 - /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ 136 - &i2c1 { 137 - status = "okay"; 138 - 139 - /* 140 - * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>, 141 - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms 142 - */ 143 - touchscreen@4a { 144 - compatible = "atmel,maxtouch"; 145 - reg = <0x4a>; 146 - interrupt-parent = <&gpio6>; 147 - interrupts = <10 IRQ_TYPE_EDGE_FALLING>; 148 - reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* SODIMM 13 */ 149 - status = "disabled"; 150 - }; 151 - 152 - /* M41T0M6 real time clock on carrier board */ 153 - rtc_i2c: rtc@68 { 154 - compatible = "st,m41t0"; 155 - reg = <0x68>; 156 - }; 157 - }; 158 - 159 - /* 160 - * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier 161 - * board) 162 - */ 163 - &i2c3 { 164 - status = "okay"; 165 - }; 166 - 167 - &ipu1_di1_disp1 { 168 - remote-endpoint = <&lcd_display_in>; 169 - }; 170 - 171 - &ldb { 172 - status = "okay"; 173 - }; 174 - 175 - &pcie { 176 - pinctrl-names = "default"; 177 - pinctrl-0 = <&pinctrl_reset_moci>; 178 - /* active-high meaning opposite of regular PERST# active-low polarity */ 179 - reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; 180 - reset-gpio-active-high; 181 - status = "okay"; 182 - }; 183 - 184 - &pwm1 { 185 - status = "okay"; 186 - }; 187 - 188 - &pwm2 { 189 - status = "okay"; 190 - }; 191 - 192 - &pwm3 { 193 - status = "okay"; 194 - }; 195 - 196 - &pwm4 { 197 - status = "okay"; 198 - }; 199 - 200 - &reg_usb_otg_vbus { 201 - status = "okay"; 202 - }; 203 - 204 - &reg_usb_host_vbus { 205 - status = "okay"; 206 - }; 207 - 208 - &sata { 209 - status = "okay"; 210 - }; 211 - 212 - &sound_spdif { 213 - status = "okay"; 214 - }; 215 - 216 - &spdif { 217 - status = "okay"; 218 - }; 219 - 220 - &uart1 { 221 - status = "okay"; 222 - }; 223 - 224 - &uart2 { 225 - status = "okay"; 226 - }; 227 - 228 - &uart4 { 229 - status = "okay"; 230 - }; 231 - 232 - &uart5 { 233 - status = "okay"; 234 - }; 235 - 236 - &usbh1 { 237 - vbus-supply = <&reg_usb_host_vbus>; 238 - status = "okay"; 239 - }; 240 - 241 - &usbotg { 242 - vbus-supply = <&reg_usb_otg_vbus>; 243 - status = "okay"; 28 + /delete-property/ xceiver-supply; 244 29 }; 245 30 246 31 /* MMC1 */ 247 32 &usdhc1 { 33 + /delete-property/ cap-power-off-card; 34 + /delete-property/ pinctrl-1; 35 + /delete-property/ vmmc-supply; 248 36 pinctrl-names = "default"; 249 - pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>; 250 - cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; 251 - bus-width = <4>; 252 - status = "okay"; 253 - }; 254 - 255 - &iomuxc { 256 - /* 257 - * Mux the Apalis GPIOs 258 - */ 259 - pinctrl-names = "default"; 260 - pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 261 - &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 262 - &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 263 - &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 264 - >; 265 - 266 - pinctrl_leds_ixora: ledsixoragrp { 267 - fsl,pins = < 268 - MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0 269 - MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0 270 - MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 271 - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 272 - >; 273 - }; 274 37 };
+276
arch/arm/boot/dts/imx6q-apalis-ixora-v1.2.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright 2014-2022 Toradex 4 + * Copyright 2012 Freescale Semiconductor, Inc. 5 + * Copyright 2011 Linaro Ltd. 6 + */ 7 + 8 + /dts-v1/; 9 + 10 + #include <dt-bindings/gpio/gpio.h> 11 + #include <dt-bindings/input/input.h> 12 + #include <dt-bindings/interrupt-controller/irq.h> 13 + #include "imx6q.dtsi" 14 + #include "imx6qdl-apalis.dtsi" 15 + 16 + / { 17 + model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.2"; 18 + compatible = "toradex,apalis_imx6q-ixora-v1.2", "toradex,apalis_imx6q", 19 + "fsl,imx6q"; 20 + 21 + aliases { 22 + i2c0 = &i2c1; 23 + i2c1 = &i2c3; 24 + i2c2 = &i2c2; 25 + rtc0 = &rtc_i2c; 26 + rtc1 = &snvs_rtc; 27 + }; 28 + 29 + chosen { 30 + stdout-path = "serial0:115200n8"; 31 + }; 32 + 33 + leds { 34 + compatible = "gpio-leds"; 35 + 36 + pinctrl-names = "default"; 37 + pinctrl-0 = <&pinctrl_leds_ixora>; 38 + 39 + led4-green { 40 + gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; 41 + label = "LED_4_GREEN"; 42 + }; 43 + 44 + led4-red { 45 + gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; 46 + label = "LED_4_RED"; 47 + }; 48 + 49 + led5-green { 50 + gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; 51 + label = "LED_5_GREEN"; 52 + }; 53 + 54 + led5-red { 55 + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; 56 + label = "LED_5_RED"; 57 + }; 58 + }; 59 + 60 + reg_3v3_vmmc: regulator-3v3-vmmc { 61 + compatible = "regulator-fixed"; 62 + enable-active-high; 63 + gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>; 64 + pinctrl-names = "default"; 65 + pinctrl-0 = <&pinctrl_enable_3v3_vmmc>; 66 + regulator-max-microvolt = <3300000>; 67 + regulator-min-microvolt = <3300000>; 68 + regulator-name = "3v3_vmmc"; 69 + startup-delay-us = <100>; 70 + }; 71 + 72 + reg_can1_supply: regulator-can1-supply { 73 + compatible = "regulator-fixed"; 74 + enable-active-high; 75 + gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; 76 + pinctrl-names = "default"; 77 + pinctrl-0 = <&pinctrl_enable_can1_power>; 78 + regulator-name = "can1_supply"; 79 + }; 80 + 81 + reg_can2_supply: regulator-can2-supply { 82 + compatible = "regulator-fixed"; 83 + enable-active-high; 84 + gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; 85 + pinctrl-names = "default"; 86 + pinctrl-0 = <&pinctrl_enable_can2_power>; 87 + regulator-name = "can2_supply"; 88 + }; 89 + }; 90 + 91 + &can1 { 92 + xceiver-supply = <&reg_can1_supply>; 93 + status = "okay"; 94 + }; 95 + 96 + &can2 { 97 + xceiver-supply = <&reg_can2_supply>; 98 + status = "okay"; 99 + }; 100 + 101 + &gpio1 { 102 + pinctrl-names = "default"; 103 + pinctrl-0 = <&pinctrl_uart24_forceoff>; 104 + 105 + /* 106 + * uart-2-4-on-x21-enable-hog enables the UART transceiver for Apalis 107 + * UART2 and UART3. If one wants to disable the transceiver force 108 + * the GPIO to output-low, if one wants to control the transceiver 109 + * from user space delete the hog node. 110 + */ 111 + uart-2-4-on-x21-enable-hog { 112 + gpio-hog; 113 + gpios = <11 GPIO_ACTIVE_HIGH>; /* MXM3 180 */ 114 + output-high; 115 + }; 116 + }; 117 + 118 + /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ 119 + &i2c1 { 120 + status = "okay"; 121 + 122 + /* M41T0M6 real time clock on carrier board */ 123 + rtc_i2c: rtc@68 { 124 + compatible = "st,m41t0"; 125 + reg = <0x68>; 126 + }; 127 + 128 + eeprom: eeprom@50 { 129 + compatible = "atmel,24c02"; 130 + reg = <0x50>; 131 + pagesize = <16>; 132 + }; 133 + }; 134 + 135 + /* 136 + * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier 137 + * board) 138 + */ 139 + &i2c3 { 140 + status = "okay"; 141 + }; 142 + 143 + &pcie { 144 + pinctrl-names = "default"; 145 + pinctrl-0 = <&pinctrl_reset_moci>; 146 + /* active-high meaning opposite of regular PERST# active-low polarity */ 147 + reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; 148 + reset-gpio-active-high; 149 + status = "okay"; 150 + }; 151 + 152 + &pwm1 { 153 + status = "okay"; 154 + }; 155 + 156 + &pwm2 { 157 + status = "okay"; 158 + }; 159 + 160 + &pwm3 { 161 + status = "okay"; 162 + }; 163 + 164 + &pwm4 { 165 + status = "okay"; 166 + }; 167 + 168 + &reg_usb_host_vbus { 169 + status = "okay"; 170 + }; 171 + 172 + &reg_usb_otg_vbus { 173 + status = "okay"; 174 + }; 175 + 176 + &sata { 177 + status = "okay"; 178 + }; 179 + 180 + &sound_spdif { 181 + status = "okay"; 182 + }; 183 + 184 + &spdif { 185 + status = "okay"; 186 + }; 187 + 188 + &uart1 { 189 + status = "okay"; 190 + }; 191 + 192 + &uart2 { 193 + status = "okay"; 194 + }; 195 + 196 + &uart4 { 197 + status = "okay"; 198 + }; 199 + 200 + &uart5 { 201 + status = "okay"; 202 + }; 203 + 204 + &usbh1 { 205 + vbus-supply = <&reg_usb_host_vbus>; 206 + status = "okay"; 207 + }; 208 + 209 + &usbotg { 210 + vbus-supply = <&reg_usb_otg_vbus>; 211 + status = "okay"; 212 + }; 213 + 214 + /* MMC1 */ 215 + &usdhc1 { 216 + pinctrl-names = "default", "sleep"; 217 + pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>; 218 + pinctrl-1 = <&pinctrl_usdhc1_4bit_sleep &pinctrl_mmc_cd_sleep>; 219 + bus-width = <4>; 220 + cap-power-off-card; 221 + vmmc-supply = <&reg_3v3_vmmc>; 222 + status = "okay"; 223 + }; 224 + 225 + &iomuxc { 226 + pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp { 227 + fsl,pins = < 228 + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 229 + >; 230 + }; 231 + 232 + pinctrl_enable_can1_power: enablecan1powergrp { 233 + fsl,pins = < 234 + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 235 + >; 236 + }; 237 + 238 + pinctrl_enable_can2_power: enablecan2powergrp { 239 + fsl,pins = < 240 + MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b0 241 + >; 242 + }; 243 + 244 + pinctrl_uart24_forceoff: uart24forceoffgrp { 245 + fsl,pins = < 246 + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0 247 + >; 248 + }; 249 + 250 + pinctrl_leds_ixora: ledsixoragrp { 251 + fsl,pins = < 252 + MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0 253 + MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0 254 + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 255 + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 256 + >; 257 + }; 258 + 259 + pinctrl_mmc_cd_sleep: mmccdslpgrp { 260 + fsl,pins = < 261 + /* MMC1 CD */ 262 + MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0 263 + >; 264 + }; 265 + 266 + pinctrl_usdhc1_4bit_sleep: usdhc1-4bitslpgrp { 267 + fsl,pins = < 268 + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x3000 269 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x3000 270 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x3000 271 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x3000 272 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x3000 273 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x3000 274 + >; 275 + }; 276 + };
+9 -104
arch/arm/boot/dts/imx6q-apalis-ixora.dts
··· 1 - // SPDX-License-Identifier: GPL-2.0+ OR MIT 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2014-2020 Toradex 3 + * Copyright 2014-2022 Toradex 4 4 * Copyright 2012 Freescale Semiconductor, Inc. 5 5 * Copyright 2011 Linaro Ltd. 6 6 */ ··· 30 30 stdout-path = "serial0:115200n8"; 31 31 }; 32 32 33 - gpio-keys { 34 - compatible = "gpio-keys"; 35 - pinctrl-names = "default"; 36 - pinctrl-0 = <&pinctrl_gpio_keys>; 37 - 38 - wakeup { 39 - label = "Wake-Up"; 40 - gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 41 - linux,code = <KEY_WAKEUP>; 42 - debounce-interval = <10>; 43 - wakeup-source; 44 - }; 45 - }; 46 - 47 - lcd_display: disp0 { 48 - compatible = "fsl,imx-parallel-display"; 49 - #address-cells = <1>; 50 - #size-cells = <0>; 51 - interface-pix-fmt = "rgb24"; 52 - pinctrl-names = "default"; 53 - pinctrl-0 = <&pinctrl_ipu1_lcdif>; 54 - status = "okay"; 55 - 56 - port@0 { 57 - reg = <0>; 58 - 59 - lcd_display_in: endpoint { 60 - remote-endpoint = <&ipu1_di1_disp1>; 61 - }; 62 - }; 63 - 64 - port@1 { 65 - reg = <1>; 66 - 67 - lcd_display_out: endpoint { 68 - remote-endpoint = <&lcd_panel_in>; 69 - }; 70 - }; 71 - }; 72 - 73 - panel: panel { 74 - /* 75 - * edt,et057090dhu: EDT 5.7" LCD TFT 76 - * edt,et070080dh6: EDT 7.0" LCD TFT 77 - */ 78 - compatible = "edt,et057090dhu"; 79 - backlight = <&backlight>; 80 - 81 - port { 82 - lcd_panel_in: endpoint { 83 - remote-endpoint = <&lcd_display_out>; 84 - }; 85 - }; 86 - }; 87 - 88 33 leds { 89 34 compatible = "gpio-leds"; 90 - 91 35 pinctrl-names = "default"; 92 36 pinctrl-0 = <&pinctrl_leds_ixora>; 93 37 94 38 led4-green { 95 - label = "LED_4_GREEN"; 96 39 gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; 40 + label = "LED_4_GREEN"; 97 41 }; 98 42 99 43 led4-red { 100 - label = "LED_4_RED"; 101 44 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; 45 + label = "LED_4_RED"; 102 46 }; 103 47 104 48 led5-green { 105 - label = "LED_5_GREEN"; 106 49 gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; 50 + label = "LED_5_GREEN"; 107 51 }; 108 52 109 53 led5-red { 110 - label = "LED_5_RED"; 111 54 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; 55 + label = "LED_5_RED"; 112 56 }; 113 57 }; 114 - }; 115 - 116 - &backlight { 117 - brightness-levels = <0 127 191 223 239 247 251 255>; 118 - default-brightness-level = <1>; 119 - status = "okay"; 120 58 }; 121 59 122 60 &can1 { ··· 65 127 status = "okay"; 66 128 }; 67 129 68 - &hdmi { 69 - status = "okay"; 70 - }; 71 - 72 130 /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ 73 131 &i2c1 { 74 132 status = "okay"; 75 - 76 - /* 77 - * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>, 78 - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms 79 - */ 80 - touchscreen@4a { 81 - compatible = "atmel,maxtouch"; 82 - reg = <0x4a>; 83 - interrupt-parent = <&gpio6>; 84 - interrupts = <10 IRQ_TYPE_EDGE_FALLING>; 85 - reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* SODIMM 13 */ 86 - status = "disabled"; 87 - }; 88 133 89 134 eeprom@50 { 90 135 compatible = "atmel,24c02"; ··· 86 165 * board) 87 166 */ 88 167 &i2c3 { 89 - status = "okay"; 90 - }; 91 - 92 - &ipu1_di1_disp1 { 93 - remote-endpoint = <&lcd_display_in>; 94 - }; 95 - 96 - &ldb { 97 168 status = "okay"; 98 169 }; 99 170 ··· 114 201 status = "okay"; 115 202 }; 116 203 117 - &reg_usb_otg_vbus { 204 + &reg_usb_host_vbus { 118 205 status = "okay"; 119 206 }; 120 207 121 - &reg_usb_host_vbus { 208 + &reg_usb_otg_vbus { 122 209 status = "okay"; 123 210 }; 124 211 ··· 162 249 163 250 /* SD1 */ 164 251 &usdhc2 { 252 + cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; 165 253 pinctrl-names = "default"; 166 254 pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>; 167 - cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; 168 255 status = "okay"; 169 256 }; 170 257 171 258 &iomuxc { 172 - /* Mux the Apalis GPIOs */ 173 - pinctrl-names = "default"; 174 - pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 175 - &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 176 - &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 177 - &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 178 - >; 179 - 180 259 pinctrl_leds_ixora: ledsixoragrp { 181 260 fsl,pins = < 182 261 MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x1b0b0
+2 -2
arch/arm/boot/dts/imx6q-bosch-acc.dts
··· 570 570 cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 571 571 no-1-8-v; 572 572 keep-power-in-suspend; 573 - enable-sdio-wakeup; 573 + wakeup-source; 574 574 voltage-ranges = <3300 3300>; 575 575 vmmc-supply = <&reg_sw4>; 576 576 fsl,wp-controller; ··· 594 594 pinctrl-names = "default"; 595 595 pinctrl-0 = <&pinctrl_wdog1>; 596 596 fsl,ext-reset-output; 597 - timeout-sec=<10>; 597 + timeout-sec = <10>; 598 598 status = "okay"; 599 599 }; 600 600
+6
arch/arm/boot/dts/imx6q-skov-reve-mi1010ait-1cp1.dts
··· 125 125 >; 126 126 }; 127 127 }; 128 + 129 + &reg_tft_vcom { 130 + regulator-min-microvolt = <3160000>; 131 + regulator-max-microvolt = <3160000>; 132 + voltage-table = <3160000 73>; 133 + };
+2 -2
arch/arm/boot/dts/imx6q.dtsi
··· 159 159 }; 160 160 }; 161 161 162 - soc { 162 + soc: soc { 163 163 ocram: sram@900000 { 164 164 compatible = "mmio-sram"; 165 165 reg = <0x00900000 0x40000>; 166 166 clocks = <&clks IMX6QDL_CLK_OCRAM>; 167 167 }; 168 168 169 - bus@2000000 { /* AIPS1 */ 169 + aips1: bus@2000000 { /* AIPS1 */ 170 170 spba-bus@2000000 { 171 171 ecspi5: spi@2018000 { 172 172 #address-cells = <1>;
+526 -114
arch/arm/boot/dts/imx6qdl-apalis.dtsi
··· 1 - // SPDX-License-Identifier: GPL-2.0+ OR MIT 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2014-2020 Toradex 3 + * Copyright 2014-2022 Toradex 4 4 * Copyright 2012 Freescale Semiconductor, Inc. 5 5 * Copyright 2011 Linaro Ltd. 6 6 */ 7 7 8 8 #include <dt-bindings/gpio/gpio.h> 9 + #include <dt-bindings/pwm/pwm.h> 9 10 10 11 / { 11 12 model = "Toradex Apalis iMX6Q/D Module"; ··· 20 19 21 20 backlight: backlight { 22 21 compatible = "pwm-backlight"; 22 + brightness-levels = <0 45 63 88 119 158 203 255>; 23 + default-brightness-level = <4>; 24 + enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; 23 25 pinctrl-names = "default"; 24 26 pinctrl-0 = <&pinctrl_gpio_bl_on>; 25 - pwms = <&pwm4 0 5000000>; 26 - enable-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; 27 + power-supply = <&reg_module_3v3>; 28 + pwms = <&pwm4 0 5000000 PWM_POLARITY_INVERTED>; 27 29 status = "disabled"; 30 + }; 31 + 32 + clk_ov5640_osc: clk-ov5640-osc { 33 + compatible = "fixed-clock"; 34 + #clock-cells = <0>; 35 + clock-frequency = <24000000>; 36 + }; 37 + 38 + gpio-keys { 39 + compatible = "gpio-keys"; 40 + pinctrl-names = "default"; 41 + pinctrl-0 = <&pinctrl_gpio_keys>; 42 + 43 + wakeup { 44 + debounce-interval = <10>; 45 + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 46 + label = "Wake-Up"; 47 + linux,code = <KEY_WAKEUP>; 48 + wakeup-source; 49 + }; 50 + }; 51 + 52 + lcd_display: disp0 { 53 + compatible = "fsl,imx-parallel-display"; 54 + #address-cells = <1>; 55 + #size-cells = <0>; 56 + interface-pix-fmt = "rgb24"; 57 + pinctrl-names = "default"; 58 + pinctrl-0 = <&pinctrl_ipu1_lcdif>; 59 + status = "disabled"; 60 + 61 + port@0 { 62 + reg = <0>; 63 + 64 + lcd_display_in: endpoint { 65 + remote-endpoint = <&ipu1_di1_disp1>; 66 + }; 67 + }; 68 + 69 + port@1 { 70 + reg = <1>; 71 + 72 + lcd_display_out: endpoint { 73 + remote-endpoint = <&lcd_panel_in>; 74 + }; 75 + }; 76 + }; 77 + 78 + panel_dpi: panel-dpi { 79 + compatible = "edt,et057090dhu"; 80 + backlight = <&backlight>; 81 + 82 + status = "disabled"; 83 + 84 + port { 85 + lcd_panel_in: endpoint { 86 + remote-endpoint = <&lcd_display_out>; 87 + }; 88 + }; 89 + }; 90 + 91 + panel_lvds: panel-lvds { 92 + compatible = "panel-lvds"; 93 + backlight = <&backlight>; 94 + status = "disabled"; 95 + 96 + port { 97 + lvds_panel_in: endpoint { 98 + remote-endpoint = <&lvds0_out>; 99 + }; 100 + }; 28 101 }; 29 102 30 103 reg_module_3v3: regulator-module-3v3 { 31 104 compatible = "regulator-fixed"; 32 - regulator-name = "+V3.3"; 33 - regulator-min-microvolt = <3300000>; 34 - regulator-max-microvolt = <3300000>; 35 105 regulator-always-on; 106 + regulator-max-microvolt = <3300000>; 107 + regulator-min-microvolt = <3300000>; 108 + regulator-name = "+V3.3"; 36 109 }; 37 110 38 111 reg_module_3v3_audio: regulator-module-3v3-audio { 39 112 compatible = "regulator-fixed"; 40 - regulator-name = "+V3.3_AUDIO"; 41 - regulator-min-microvolt = <3300000>; 42 - regulator-max-microvolt = <3300000>; 43 113 regulator-always-on; 114 + regulator-max-microvolt = <3300000>; 115 + regulator-min-microvolt = <3300000>; 116 + regulator-name = "+V3.3_AUDIO"; 117 + }; 118 + 119 + reg_ov5640_1v8_d_o_vdd: regulator-ov5640-1v8-d-o-vdd { 120 + compatible = "regulator-fixed"; 121 + regulator-always-on; 122 + regulator-max-microvolt = <1800000>; 123 + regulator-min-microvolt = <1800000>; 124 + regulator-name = "DOVDD/DVDD_1.8V"; 125 + /* Note: The CSI module uses on-board 3.3V_SW supply */ 126 + vin-supply = <&reg_module_3v3>; 127 + }; 128 + 129 + reg_ov5640_2v8_a_vdd: regulator-ov5640-2v8-a-vdd { 130 + compatible = "regulator-fixed"; 131 + regulator-always-on; 132 + regulator-max-microvolt = <2800000>; 133 + regulator-min-microvolt = <2800000>; 134 + regulator-name = "AVDD/AFVDD_2.8V"; 135 + /* Note: The CSI module uses on-board 3.3V_SW supply */ 136 + vin-supply = <&reg_module_3v3>; 44 137 }; 45 138 46 139 reg_usb_otg_vbus: regulator-usb-otg-vbus { 47 140 compatible = "regulator-fixed"; 141 + enable-active-high; 142 + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 48 143 pinctrl-names = "default"; 49 144 pinctrl-0 = <&pinctrl_regulator_usbotg_pwr>; 50 - regulator-name = "usb_otg_vbus"; 51 - regulator-min-microvolt = <5000000>; 52 145 regulator-max-microvolt = <5000000>; 53 - gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 54 - enable-active-high; 146 + regulator-min-microvolt = <5000000>; 147 + regulator-name = "usb_otg_vbus"; 55 148 status = "disabled"; 56 149 }; 57 150 58 151 /* on module USB hub */ 59 152 reg_usb_host_vbus_hub: regulator-usb-host-vbus-hub { 60 153 compatible = "regulator-fixed"; 154 + enable-active-high; 155 + gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>; 61 156 pinctrl-names = "default"; 62 157 pinctrl-0 = <&pinctrl_regulator_usbhub_pwr>; 63 - regulator-name = "usb_host_vbus_hub"; 64 - regulator-min-microvolt = <5000000>; 65 158 regulator-max-microvolt = <5000000>; 66 - gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>; 159 + regulator-min-microvolt = <5000000>; 160 + regulator-name = "usb_host_vbus_hub"; 67 161 startup-delay-us = <2000>; 68 - enable-active-high; 69 162 status = "okay"; 70 163 }; 71 164 72 165 reg_usb_host_vbus: regulator-usb-host-vbus { 73 166 compatible = "regulator-fixed"; 167 + enable-active-high; 168 + gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; 74 169 pinctrl-names = "default"; 75 170 pinctrl-0 = <&pinctrl_regulator_usbh_pwr>; 76 - regulator-name = "usb_host_vbus"; 77 - regulator-min-microvolt = <5000000>; 78 171 regulator-max-microvolt = <5000000>; 79 - gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>; 80 - enable-active-high; 172 + regulator-min-microvolt = <5000000>; 173 + regulator-name = "usb_host_vbus"; 81 174 vin-supply = <&reg_usb_host_vbus_hub>; 82 175 status = "disabled"; 83 176 }; 84 177 85 178 sound { 86 179 compatible = "fsl,imx-audio-sgtl5000"; 87 - model = "imx6q-apalis-sgtl5000"; 88 - ssi-controller = <&ssi1>; 89 180 audio-codec = <&codec>; 90 181 audio-routing = 91 182 "LINE_IN", "Line In Jack", 92 183 "MIC_IN", "Mic Jack", 93 184 "Mic Jack", "Mic Bias", 94 185 "Headphone Jack", "HP_OUT"; 95 - mux-int-port = <1>; 186 + model = "imx6q-apalis-sgtl5000"; 96 187 mux-ext-port = <4>; 188 + mux-int-port = <1>; 189 + ssi-controller = <&ssi1>; 97 190 }; 98 191 99 192 sound_spdif: sound-spdif { 100 193 compatible = "fsl,imx-audio-spdif"; 101 - model = "imx-spdif"; 102 194 spdif-controller = <&spdif>; 103 195 spdif-in; 104 196 spdif-out; 197 + model = "imx-spdif"; 105 198 status = "disabled"; 106 199 }; 107 200 }; ··· 220 125 status = "disabled"; 221 126 }; 222 127 128 + &clks { 129 + fsl,pmic-stby-poweroff; 130 + }; 131 + 223 132 /* Apalis SPI1 */ 224 133 &ecspi1 { 225 134 cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; ··· 238 139 pinctrl-names = "default"; 239 140 pinctrl-0 = <&pinctrl_ecspi2>; 240 141 status = "disabled"; 142 + }; 143 + 144 + &gpio1 { 145 + gpio-line-names = "MXM3_84", 146 + "MXM3_4", 147 + "MXM3_15/GPIO7", 148 + "MXM3_96", 149 + "MXM3_37", 150 + "", 151 + "MXM3_17/GPIO8", 152 + "MXM3_14", 153 + "MXM3_12", 154 + "MXM3_2", 155 + "MXM3_184", 156 + "MXM3_180", 157 + "MXM3_178", 158 + "MXM3_176", 159 + "MXM3_188", 160 + "MXM3_186", 161 + "MXM3_160", 162 + "MXM3_162", 163 + "MXM3_150", 164 + "MXM3_144", 165 + "MXM3_154", 166 + "MXM3_146", 167 + "", 168 + "", 169 + "MXM3_72"; 170 + }; 171 + 172 + &gpio2 { 173 + gpio-line-names = "MXM3_148", 174 + "MXM3_152", 175 + "MXM3_156", 176 + "MXM3_158", 177 + "MXM3_1/GPIO1", 178 + "MXM3_3/GPIO2", 179 + "MXM3_5/GPIO3", 180 + "MXM3_7/GPIO4", 181 + "MXM3_95", 182 + "MXM3_6", 183 + "MXM3_8", 184 + "MXM3_123", 185 + "MXM3_126", 186 + "MXM3_128", 187 + "MXM3_130", 188 + "MXM3_132", 189 + "MXM3_253", 190 + "MXM3_251", 191 + "MXM3_283", 192 + "MXM3_281", 193 + "MXM3_279", 194 + "MXM3_277", 195 + "MXM3_243", 196 + "MXM3_235", 197 + "MXM3_231", 198 + "MXM3_229", 199 + "MXM3_233", 200 + "MXM3_198", 201 + "MXM3_275", 202 + "MXM3_273", 203 + "MXM3_207", 204 + "MXM3_122"; 205 + }; 206 + 207 + &gpio3 { 208 + gpio-line-names = "MXM3_271", 209 + "MXM3_269", 210 + "MXM3_301", 211 + "MXM3_299", 212 + "MXM3_297", 213 + "MXM3_295", 214 + "MXM3_293", 215 + "MXM3_291", 216 + "MXM3_289", 217 + "MXM3_287", 218 + "MXM3_249", 219 + "MXM3_247", 220 + "MXM3_245", 221 + "MXM3_286", 222 + "MXM3_239", 223 + "MXM3_35", 224 + "MXM3_205", 225 + "MXM3_203", 226 + "MXM3_201", 227 + "MXM3_116", 228 + "MXM3_114", 229 + "MXM3_262", 230 + "MXM3_274", 231 + "MXM3_124", 232 + "MXM3_110", 233 + "MXM3_120", 234 + "MXM3_263", 235 + "MXM3_265", 236 + "", 237 + "MXM3_135", 238 + "MXM3_261", 239 + "MXM3_259"; 240 + }; 241 + 242 + &gpio4 { 243 + gpio-line-names = "", 244 + "", 245 + "", 246 + "", 247 + "", 248 + "MXM3_194", 249 + "MXM3_136", 250 + "MXM3_134", 251 + "MXM3_140", 252 + "MXM3_138", 253 + "", 254 + "MXM3_220", 255 + "", 256 + "", 257 + "MXM3_18", 258 + "MXM3_16", 259 + "", 260 + "", 261 + "MXM3_214", 262 + "MXM3_216", 263 + "MXM3_164"; 264 + }; 265 + 266 + &gpio5 { 267 + gpio-line-names = "MXM3_159", 268 + "", 269 + "", 270 + "", 271 + "MXM3_257", 272 + "", 273 + "", 274 + "", 275 + "", 276 + "", 277 + "MXM3_200", 278 + "MXM3_196", 279 + "MXM3_204", 280 + "MXM3_202", 281 + "", 282 + "", 283 + "", 284 + "", 285 + "MXM3_191", 286 + "MXM3_197", 287 + "MXM3_77", 288 + "MXM3_195", 289 + "MXM3_221", 290 + "MXM3_225", 291 + "MXM3_223", 292 + "MXM3_227", 293 + "MXM3_209", 294 + "MXM3_211", 295 + "MXM3_118", 296 + "MXM3_112", 297 + "MXM3_187", 298 + "MXM3_185"; 299 + }; 300 + 301 + &gpio6 { 302 + gpio-line-names = "MXM3_183", 303 + "MXM3_181", 304 + "MXM3_179", 305 + "MXM3_177", 306 + "MXM3_175", 307 + "MXM3_173", 308 + "MXM3_255", 309 + "MXM3_83", 310 + "MXM3_91", 311 + "MXM3_13/GPIO6", 312 + "MXM3_11/GPIO5", 313 + "MXM3_79", 314 + "", 315 + "", 316 + "MXM3_190", 317 + "MXM3_193", 318 + "MXM3_89"; 319 + }; 320 + 321 + &gpio7 { 322 + gpio-line-names = "", 323 + "", 324 + "", 325 + "", 326 + "", 327 + "", 328 + "", 329 + "", 330 + "", 331 + "MXM3_99", 332 + "MXM3_85", 333 + "MXM3_217", 334 + "MXM3_215"; 335 + }; 336 + 337 + &gpr { 338 + ipu1_csi0_mux { 339 + #address-cells = <1>; 340 + #size-cells = <0>; 341 + status = "disabled"; 342 + 343 + port@1 { 344 + reg = <1>; 345 + ipu1_csi0_mux_from_parallel_sensor: endpoint { 346 + remote-endpoint = <&adv7280_to_ipu1_csi0_mux>; 347 + }; 348 + }; 349 + }; 241 350 }; 242 351 243 352 &fec { ··· 484 177 scl-gpios = <&gpio5 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 485 178 sda-gpios = <&gpio5 26 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 486 179 status = "disabled"; 180 + 181 + atmel_mxt_ts: touchscreen@4a { 182 + compatible = "atmel,maxtouch"; 183 + /* These GPIOs are muxed with the iomuxc node */ 184 + interrupt-parent = <&gpio6>; 185 + interrupts = <10 IRQ_TYPE_EDGE_FALLING>; /* MXM3_11 */ 186 + reg = <0x4a>; 187 + reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>; /* MXM3_13 */ 188 + status = "disabled"; 189 + }; 487 190 }; 488 191 489 192 /* ··· 509 192 sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 510 193 status = "okay"; 511 194 512 - pmic: pfuze100@8 { 195 + pmic: pmic@8 { 513 196 compatible = "fsl,pfuze100"; 197 + fsl,pmic-stby-poweroff; 514 198 reg = <0x08>; 515 199 516 200 regulators { 517 201 sw1a_reg: sw1ab { 518 - regulator-min-microvolt = <300000>; 519 - regulator-max-microvolt = <1875000>; 520 - regulator-boot-on; 521 202 regulator-always-on; 203 + regulator-boot-on; 204 + regulator-max-microvolt = <1875000>; 205 + regulator-min-microvolt = <300000>; 522 206 regulator-ramp-delay = <6250>; 523 207 }; 524 208 525 209 sw1c_reg: sw1c { 526 - regulator-min-microvolt = <300000>; 527 - regulator-max-microvolt = <1875000>; 528 - regulator-boot-on; 529 210 regulator-always-on; 211 + regulator-boot-on; 212 + regulator-max-microvolt = <1875000>; 213 + regulator-min-microvolt = <300000>; 530 214 regulator-ramp-delay = <6250>; 531 215 }; 532 216 533 217 sw3a_reg: sw3a { 534 - regulator-min-microvolt = <400000>; 535 - regulator-max-microvolt = <1975000>; 536 - regulator-boot-on; 537 218 regulator-always-on; 219 + regulator-boot-on; 220 + regulator-max-microvolt = <1975000>; 221 + regulator-min-microvolt = <400000>; 538 222 }; 539 223 540 224 swbst_reg: swbst { 541 - regulator-min-microvolt = <5000000>; 542 - regulator-max-microvolt = <5150000>; 543 - regulator-boot-on; 544 225 regulator-always-on; 226 + regulator-boot-on; 227 + regulator-max-microvolt = <5150000>; 228 + regulator-min-microvolt = <5000000>; 545 229 }; 546 230 547 231 snvs_reg: vsnvs { 548 - regulator-min-microvolt = <1000000>; 549 - regulator-max-microvolt = <3000000>; 550 - regulator-boot-on; 551 232 regulator-always-on; 233 + regulator-boot-on; 234 + regulator-max-microvolt = <3000000>; 235 + regulator-min-microvolt = <1000000>; 552 236 }; 553 237 554 238 vref_reg: vrefddr { 555 - regulator-boot-on; 556 239 regulator-always-on; 240 + regulator-boot-on; 557 241 }; 558 242 559 243 vgen1_reg: vgen1 { 560 - regulator-min-microvolt = <800000>; 561 - regulator-max-microvolt = <1550000>; 562 - regulator-boot-on; 563 244 regulator-always-on; 245 + regulator-boot-on; 246 + regulator-max-microvolt = <1550000>; 247 + regulator-min-microvolt = <800000>; 564 248 }; 565 249 566 250 vgen2_reg: vgen2 { 567 - regulator-min-microvolt = <800000>; 568 - regulator-max-microvolt = <1550000>; 569 - regulator-boot-on; 570 251 regulator-always-on; 252 + regulator-boot-on; 253 + regulator-max-microvolt = <1550000>; 254 + regulator-min-microvolt = <800000>; 571 255 }; 572 256 573 257 vgen3_reg: vgen3 { 574 - regulator-min-microvolt = <1800000>; 575 - regulator-max-microvolt = <3300000>; 576 - regulator-boot-on; 577 258 regulator-always-on; 259 + regulator-boot-on; 260 + regulator-max-microvolt = <3300000>; 261 + regulator-min-microvolt = <1800000>; 578 262 }; 579 263 580 264 vgen4_reg: vgen4 { 581 - regulator-min-microvolt = <1800000>; 582 - regulator-max-microvolt = <1800000>; 583 - regulator-boot-on; 584 265 regulator-always-on; 266 + regulator-boot-on; 267 + regulator-max-microvolt = <1800000>; 268 + regulator-min-microvolt = <1800000>; 585 269 }; 586 270 587 271 vgen5_reg: vgen5 { 588 - regulator-min-microvolt = <1800000>; 589 - regulator-max-microvolt = <3300000>; 590 - regulator-boot-on; 591 272 regulator-always-on; 273 + regulator-boot-on; 274 + regulator-max-microvolt = <3300000>; 275 + regulator-min-microvolt = <1800000>; 592 276 }; 593 277 594 278 vgen6_reg: vgen6 { 595 - regulator-min-microvolt = <1800000>; 596 - regulator-max-microvolt = <3300000>; 597 - regulator-boot-on; 598 279 regulator-always-on; 280 + regulator-boot-on; 281 + regulator-max-microvolt = <3300000>; 282 + regulator-min-microvolt = <1800000>; 599 283 }; 600 284 }; 601 285 }; 602 286 603 287 codec: sgtl5000@a { 604 288 compatible = "fsl,sgtl5000"; 605 - reg = <0x0a>; 289 + #sound-dai-cells = <0>; 290 + clocks = <&clks IMX6QDL_CLK_CKO>; 606 291 pinctrl-names = "default"; 607 292 pinctrl-0 = <&pinctrl_sgtl5000>; 608 - clocks = <&clks IMX6QDL_CLK_CKO>; 293 + reg = <0x0a>; 609 294 VDDA-supply = <&reg_module_3v3_audio>; 610 295 VDDIO-supply = <&reg_module_3v3>; 611 296 VDDD-supply = <&vgen4_reg>; ··· 616 297 /* STMPE811 touch screen controller */ 617 298 stmpe811@41 { 618 299 compatible = "st,stmpe811"; 300 + blocks = <0x5>; 301 + id = <0>; 302 + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; 303 + interrupt-controller; 304 + interrupt-parent = <&gpio4>; 305 + irq-trigger = <0x1>; 619 306 pinctrl-names = "default"; 620 307 pinctrl-0 = <&pinctrl_touch_int>; 621 308 reg = <0x41>; 622 - interrupts = <10 IRQ_TYPE_LEVEL_LOW>; 623 - interrupt-parent = <&gpio4>; 624 - interrupt-controller; 625 - id = <0>; 626 - blocks = <0x5>; 627 - irq-trigger = <0x1>; 628 309 /* 3.25 MHz ADC clock speed */ 629 310 st,adc-freq = <1>; 630 311 /* 12-bit ADC */ ··· 634 315 /* ADC conversion time: 80 clocks */ 635 316 st,sample-time = <4>; 636 317 637 - stmpe_touchscreen: stmpe-touchscreen { 318 + stmpe_ts: stmpe_touchscreen { 638 319 compatible = "st,stmpe-ts"; 639 320 /* 8 sample average control */ 640 321 st,ave-ctrl = <3>; ··· 649 330 st,settling = <3>; 650 331 /* 5 ms touch detect interrupt delay */ 651 332 st,touch-det-delay = <5>; 333 + status = "disabled"; 652 334 }; 653 335 654 - stmpe_adc: stmpe-adc { 336 + stmpe_adc: stmpe_adc { 655 337 compatible = "st,stmpe-adc"; 338 + #io-channel-cells = <1>; 656 339 /* forbid to use ADC channels 3-0 (touch) */ 657 340 st,norequest-mask = <0x0F>; 658 - #io-channel-cells = <1>; 659 341 }; 660 342 }; 661 343 }; ··· 673 353 scl-gpios = <&gpio3 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 674 354 sda-gpios = <&gpio3 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 675 355 status = "disabled"; 356 + 357 + adv_7280: adv7280@21 { 358 + compatible = "adi,adv7280"; 359 + adv,force-bt656-4; 360 + pinctrl-names = "default"; 361 + pinctrl-0 = <&pinctrl_ipu1_csi0>; 362 + reg = <0x21>; 363 + status = "disabled"; 364 + 365 + port { 366 + adv7280_to_ipu1_csi0_mux: endpoint { 367 + bus-width = <8>; 368 + remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; 369 + }; 370 + }; 371 + }; 372 + 373 + ov5640_csi_cam: ov5640_mipi@3c { 374 + compatible = "ovti,ov5640"; 375 + AVDD-supply = <&reg_ov5640_2v8_a_vdd>; 376 + DOVDD-supply = <&reg_ov5640_1v8_d_o_vdd>; 377 + DVDD-supply = <&reg_ov5640_1v8_d_o_vdd>; 378 + clock-names = "xclk"; 379 + clocks = <&clks IMX6QDL_CLK_CKO2>; 380 + pinctrl-names = "default"; 381 + pinctrl-0 = <&pinctrl_cam_mclk>; 382 + /* These GPIOs are muxed with the iomuxc node */ 383 + powerdown-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; 384 + reg = <0x3c>; 385 + reset-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; 386 + status = "disabled"; 387 + 388 + port { 389 + ov5640_to_mipi_csi2: endpoint { 390 + clock-lanes = <0>; 391 + data-lanes = <1 2>; 392 + remote-endpoint = <&mipi_csi_from_ov5640>; 393 + }; 394 + }; 395 + }; 396 + }; 397 + 398 + &ipu1_di1_disp1 { 399 + remote-endpoint = <&lcd_display_in>; 400 + }; 401 + 402 + &ldb { 403 + lvds-channel@0 { 404 + port@4 { 405 + reg = <4>; 406 + 407 + lvds0_out: endpoint { 408 + remote-endpoint = <&lvds_panel_in>; 409 + }; 410 + }; 411 + }; 412 + 413 + lvds-channel@1 { 414 + fsl,data-mapping = "spwg"; 415 + fsl,data-width = <18>; 416 + 417 + port@4 { 418 + reg = <4>; 419 + 420 + lvds1_out: endpoint { 421 + }; 422 + }; 423 + }; 424 + }; 425 + 426 + &mipi_csi { 427 + #address-cells = <1>; 428 + #size-cells = <0>; 429 + status = "disabled"; 430 + 431 + port@0 { 432 + reg = <0>; 433 + 434 + mipi_csi_from_ov5640: endpoint { 435 + clock-lanes = <0>; 436 + data-lanes = <1 2>; 437 + remote-endpoint = <&ov5640_to_mipi_csi2>; 438 + }; 439 + }; 676 440 }; 677 441 678 442 &pwm1 { ··· 778 374 }; 779 375 780 376 &pwm4 { 781 - #pwm-cells = <2>; 782 377 pinctrl-names = "default"; 783 378 pinctrl-0 = <&pinctrl_pwm4>; 784 379 status = "disabled"; ··· 794 391 }; 795 392 796 393 &uart1 { 394 + fsl,dte-mode; 797 395 pinctrl-names = "default"; 798 396 pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>; 799 - fsl,dte-mode; 800 397 uart-has-rtscts; 801 398 status = "disabled"; 802 399 }; 803 400 804 401 &uart2 { 402 + fsl,dte-mode; 805 403 pinctrl-names = "default"; 806 404 pinctrl-0 = <&pinctrl_uart2_dte>; 807 - fsl,dte-mode; 808 405 uart-has-rtscts; 809 406 status = "disabled"; 810 407 }; 811 408 812 409 &uart4 { 410 + fsl,dte-mode; 813 411 pinctrl-names = "default"; 814 412 pinctrl-0 = <&pinctrl_uart4_dte>; 815 - fsl,dte-mode; 816 413 status = "disabled"; 817 414 }; 818 415 819 416 &uart5 { 417 + fsl,dte-mode; 820 418 pinctrl-names = "default"; 821 419 pinctrl-0 = <&pinctrl_uart5_dte>; 822 - fsl,dte-mode; 823 420 status = "disabled"; 824 421 }; 825 422 826 423 &usbotg { 424 + disable-over-current; 827 425 pinctrl-names = "default"; 828 426 pinctrl-0 = <&pinctrl_usbotg>; 829 - disable-over-current; 830 427 status = "disabled"; 831 428 }; 832 429 833 430 /* MMC1 */ 834 431 &usdhc1 { 835 - pinctrl-names = "default"; 836 - pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit>; 837 - vqmmc-supply = <&reg_module_3v3>; 838 432 bus-width = <8>; 433 + cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; 839 434 disable-wp; 840 435 no-1-8-v; 436 + pinctrl-names = "default"; 437 + pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_usdhc1_8bit &pinctrl_mmc_cd>; 438 + vqmmc-supply = <&reg_module_3v3>; 841 439 status = "disabled"; 842 440 }; 843 441 844 442 /* SD1 */ 845 443 &usdhc2 { 846 - pinctrl-names = "default"; 847 - pinctrl-0 = <&pinctrl_usdhc2>; 848 - vqmmc-supply = <&reg_module_3v3>; 849 444 bus-width = <4>; 850 445 disable-wp; 851 446 no-1-8-v; 447 + pinctrl-names = "default"; 448 + pinctrl-0 = <&pinctrl_usdhc2>; 449 + vqmmc-supply = <&reg_module_3v3>; 852 450 status = "disabled"; 853 451 }; 854 452 855 453 /* eMMC */ 856 454 &usdhc3 { 857 - pinctrl-names = "default"; 858 - pinctrl-0 = <&pinctrl_usdhc3>; 859 - vqmmc-supply = <&reg_module_3v3>; 860 455 bus-width = <8>; 861 456 no-1-8-v; 862 457 non-removable; 458 + pinctrl-names = "default"; 459 + pinctrl-0 = <&pinctrl_usdhc3>; 460 + vqmmc-supply = <&reg_module_3v3>; 863 461 status = "okay"; 864 462 }; 865 463 ··· 869 465 }; 870 466 871 467 &iomuxc { 872 - pinctrl_apalis_gpio1: gpio2io04grp { 468 + /* Mux the Apalis GPIOs */ 469 + pinctrl-names = "default"; 470 + pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 471 + &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 472 + &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6 473 + &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 474 + >; 475 + 476 + pinctrl_apalis_gpio1: apalisgpio1grp { 873 477 fsl,pins = < 874 478 MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x130b0 875 479 >; 876 480 }; 877 481 878 - pinctrl_apalis_gpio2: gpio2io05grp { 482 + pinctrl_apalis_gpio2: apalisgpio2grp { 879 483 fsl,pins = < 880 484 MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x130b0 881 485 >; 882 486 }; 883 487 884 - pinctrl_apalis_gpio3: gpio2io06grp { 488 + pinctrl_apalis_gpio3: apalisgpio3grp { 885 489 fsl,pins = < 886 490 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x130b0 887 491 >; 888 492 }; 889 493 890 - pinctrl_apalis_gpio4: gpio2io07grp { 494 + pinctrl_apalis_gpio4: apalisgpio4grp { 891 495 fsl,pins = < 892 496 MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x130b0 893 497 >; 894 498 }; 895 499 896 - pinctrl_apalis_gpio5: gpio6io10grp { 500 + pinctrl_apalis_gpio5: apalisgpio5grp { 897 501 fsl,pins = < 898 502 MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x130b0 899 503 >; 900 504 }; 901 505 902 - pinctrl_apalis_gpio6: gpio6io09grp { 506 + pinctrl_apalis_gpio6: apalisgpio6grp { 903 507 fsl,pins = < 904 508 MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x130b0 905 509 >; 906 510 }; 907 511 908 - pinctrl_apalis_gpio7: gpio1io02grp { 512 + pinctrl_apalis_gpio7: apalisgpio7grp { 909 513 fsl,pins = < 910 514 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b0 911 515 >; 912 516 }; 913 517 914 - pinctrl_apalis_gpio8: gpio1io06grp { 518 + pinctrl_apalis_gpio8: apalisgpio8grp { 915 519 fsl,pins = < 916 520 MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x130b0 917 521 >; ··· 1012 600 >; 1013 601 }; 1014 602 1015 - pinctrl_gpio_bl_on: gpioblon { 603 + pinctrl_gpio_bl_on: gpioblongrp { 1016 604 fsl,pins = < 1017 605 MX6QDL_PAD_EIM_DA13__GPIO3_IO13 0x1b0b0 1018 606 >; ··· 1157 745 >; 1158 746 }; 1159 747 1160 - pinctrl_mmc_cd: gpiommccdgrp { 748 + pinctrl_mmc_cd: mmccdgrp { 1161 749 fsl,pins = < 1162 750 /* MMC1 CD */ 1163 751 MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x000b0 ··· 1188 776 >; 1189 777 }; 1190 778 1191 - pinctrl_regulator_usbh_pwr: gpioregusbhpwrgrp { 779 + pinctrl_regulator_usbh_pwr: regusbhpwrgrp { 1192 780 fsl,pins = < 1193 781 /* USBH_EN */ 1194 782 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x0f058 1195 783 >; 1196 784 }; 1197 785 1198 - pinctrl_regulator_usbhub_pwr: gpioregusbhubpwrgrp { 786 + pinctrl_regulator_usbhub_pwr: regusbhubpwrgrp { 1199 787 fsl,pins = < 1200 788 /* USBH_HUB_EN */ 1201 789 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x0f058 1202 790 >; 1203 791 }; 1204 792 1205 - pinctrl_regulator_usbotg_pwr: gpioregusbotgpwrgrp { 793 + pinctrl_regulator_usbotg_pwr: regusbotgpwrgrp { 1206 794 fsl,pins = < 1207 795 /* USBO1 power en */ 1208 796 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x0f058 1209 797 >; 1210 798 }; 1211 799 1212 - pinctrl_reset_moci: gpioresetmocigrp { 800 + pinctrl_reset_moci: resetmocigrp { 1213 801 fsl,pins = < 1214 802 /* RESET_MOCI control */ 1215 803 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x0f058 1216 804 >; 1217 805 }; 1218 806 1219 - pinctrl_sd_cd: gpiosdcdgrp { 807 + pinctrl_sd_cd: sdcdgrp { 1220 808 fsl,pins = < 1221 809 /* SD1 CD */ 1222 810 MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x000b0 ··· 1236 824 >; 1237 825 }; 1238 826 1239 - pinctrl_touch_int: gpiotouchintgrp { 827 + pinctrl_touch_int: touchintgrp { 1240 828 fsl,pins = < 1241 829 /* STMPE811 interrupt */ 1242 830 MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 831 + >; 832 + }; 833 + 834 + /* Additional DTR, DSR, DCD */ 835 + pinctrl_uart1_ctrl: uart1ctrlgrp { 836 + fsl,pins = < 837 + MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0 838 + MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0 839 + MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0 1243 840 >; 1244 841 }; 1245 842 ··· 1266 845 MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1 1267 846 MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1 1268 847 MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1 1269 - >; 1270 - }; 1271 - 1272 - /* Additional DTR, DSR, DCD */ 1273 - pinctrl_uart1_ctrl: uart1ctrlgrp { 1274 - fsl,pins = < 1275 - MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0 1276 - MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0 1277 - MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0 1278 848 >; 1279 849 }; 1280 850 ··· 1322 910 >; 1323 911 }; 1324 912 1325 - pinctrl_usdhc1_4bit: usdhc1grp_4bit { 913 + pinctrl_usdhc1_4bit: usdhc1-4bitgrp { 1326 914 fsl,pins = < 1327 915 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 1328 916 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 ··· 1333 921 >; 1334 922 }; 1335 923 1336 - pinctrl_usdhc1_8bit: usdhc1grp_8bit { 924 + pinctrl_usdhc1_8bit: usdhc1-8bitgrp { 1337 925 fsl,pins = < 1338 926 MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17071 1339 927 MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17071
+13 -6
arch/arm/boot/dts/imx6qdl-colibri.dtsi
··· 6 6 */ 7 7 8 8 #include <dt-bindings/gpio/gpio.h> 9 + #include <dt-bindings/pwm/pwm.h> 9 10 10 11 / { 11 12 model = "Toradex Colibri iMX6DL/S Module"; ··· 14 13 15 14 backlight: backlight { 16 15 compatible = "pwm-backlight"; 17 - brightness-levels = <0 127 191 223 239 247 251 255>; 18 - default-brightness-level = <1>; 16 + brightness-levels = <0 45 63 88 119 158 203 255>; 17 + default-brightness-level = <4>; 19 18 enable-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */ 20 19 pinctrl-names = "default"; 21 20 pinctrl-0 = <&pinctrl_gpio_bl_on>; 22 21 power-supply = <&reg_module_3v3>; 23 - pwms = <&pwm3 0 5000000>; 22 + pwms = <&pwm3 0 5000000 PWM_POLARITY_INVERTED>; 24 23 status = "disabled"; 25 24 }; 26 25 ··· 521 520 compatible = "fsl,sgtl5000"; 522 521 clocks = <&clks IMX6QDL_CLK_CKO>; 523 522 lrclk-strength = <3>; 523 + pinctrl-names = "default"; 524 + pinctrl-0 = <&pinctrl_sgtl5000>; 524 525 reg = <0x0a>; 525 526 #sound-dai-cells = <0>; 526 527 VDDA-supply = <&reg_module_3v3_audio>; ··· 621 618 622 619 /* Colibri PWM<A> */ 623 620 &pwm3 { 624 - #pwm-cells = <2>; 625 621 pinctrl-names = "default"; 626 622 pinctrl-0 = <&pinctrl_pwm3>; 627 623 status = "disabled"; ··· 741 739 742 740 pinctrl_audmux: audmuxgrp { 743 741 fsl,pins = < 744 - /* SGTL5000 sys_mclk */ 745 - MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 746 742 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 747 743 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0 748 744 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0 ··· 988 988 fsl,pins = < 989 989 /* USBH_EN */ 990 990 MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x0f058 991 + >; 992 + }; 993 + 994 + pinctrl_sgtl5000: sgtl5000grp { 995 + fsl,pins = < 996 + /* SGTL5000 sys_mclk */ 997 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 991 998 >; 992 999 }; 993 1000
+3
arch/arm/boot/dts/imx6qdl-prti6q.dtsi
··· 94 94 pinctrl-0 = <&pinctrl_usdhc3>; 95 95 bus-width = <8>; 96 96 non-removable; 97 + no-1-8-v; 98 + no-sd; 99 + no-sdio; 97 100 status = "okay"; 98 101 }; 99 102
+2 -2
arch/arm/boot/dts/imx6qdl-skov-cpu-revc.dtsi
··· 15 15 reg = <0>; 16 16 spi-max-frequency = <1000000>; 17 17 interrupts-extended = <&gpio3 19 IRQ_TYPE_LEVEL_LOW>; 18 - vcc-supply = <&reg_3v3>; 18 + vcc-supply = <&reg_3v3>; 19 19 pendown-gpio = <&gpio3 19 GPIO_ACTIVE_LOW>; 20 20 ti,x-plate-ohms = /bits/ 16 <850>; 21 21 ti,y-plate-ohms = /bits/ 16 <295>; 22 22 ti,pressure-min = /bits/ 16 <2>; 23 23 ti,pressure-max = /bits/ 16 <1500>; 24 - ti,vref-mv = /bits/ 16 <3300>; 24 + ti,vref-mv = /bits/ 16 <3300>; 25 25 ti,settle-delay-usec = /bits/ 16 <15>; 26 26 ti,vref-delay-usecs = /bits/ 16 <0>; 27 27 ti,penirq-recheck-delay-usecs = /bits/ 16 <100>;
+10
arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi
··· 149 149 gpio = <&gpio4 11 GPIO_ACTIVE_LOW>; 150 150 }; 151 151 152 + reg_tft_vcom: regulator-tft-vcom { 153 + compatible = "pwm-regulator"; 154 + pwms = <&pwm3 0 20000 0>; 155 + regulator-name = "tft_vcom"; 156 + regulator-min-microvolt = <3600000>; 157 + regulator-max-microvolt = <3600000>; 158 + regulator-always-on; 159 + voltage-table = <3600000 26>; 160 + }; 161 + 152 162 reg_vcc_mmc: regulator-vcc-mmc { 153 163 compatible = "regulator-fixed"; 154 164 pinctrl-names = "default";
+3 -3
arch/arm/boot/dts/imx6qdl.dtsi
··· 143 143 #phy-cells = <0>; 144 144 }; 145 145 146 - soc { 146 + soc: soc { 147 147 #address-cells = <1>; 148 148 #size-cells = <1>; 149 149 compatible = "simple-bus"; ··· 290 290 status = "disabled"; 291 291 }; 292 292 293 - bus@2000000 { /* AIPS1 */ 293 + aips1: bus@2000000 { /* AIPS1 */ 294 294 compatible = "fsl,aips-bus", "simple-bus"; 295 295 #address-cells = <1>; 296 296 #size-cells = <1>; ··· 941 941 }; 942 942 }; 943 943 944 - bus@2100000 { /* AIPS2 */ 944 + aips2: bus@2100000 { /* AIPS2 */ 945 945 compatible = "fsl,aips-bus", "simple-bus"; 946 946 #address-cells = <1>; 947 947 #size-cells = <1>;
+5 -5
arch/arm/boot/dts/imx6sl-tolino-shine2hd.dts
··· 27 27 pinctrl-names = "default"; 28 28 pinctrl-0 = <&pinctrl_gpio_keys>; 29 29 30 - cover { 30 + key-cover { 31 31 label = "Cover"; 32 32 gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; 33 33 linux,code = <SW_LID>; ··· 35 35 wakeup-source; 36 36 }; 37 37 38 - fl { 38 + key-fl { 39 39 label = "Frontlight"; 40 40 gpios = <&gpio3 26 GPIO_ACTIVE_LOW>; 41 41 linux,code = <KEY_BRIGHTNESS_CYCLE>; 42 42 }; 43 43 44 - home { 44 + key-home { 45 45 label = "Home"; 46 46 gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 47 47 linux,code = <KEY_HOME>; 48 48 }; 49 49 50 - power { 50 + key-power { 51 51 label = "Power"; 52 52 gpios = <&gpio5 8 GPIO_ACTIVE_LOW>; 53 53 linux,code = <KEY_POWER>; ··· 60 60 pinctrl-names = "default"; 61 61 pinctrl-0 = <&pinctrl_led>; 62 62 63 - on { 63 + led-0 { 64 64 label = "tolinoshine2hd:white:on"; 65 65 gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 66 66 linux,default-trigger = "timer";
+1 -1
arch/arm/boot/dts/imx6sx.dtsi
··· 154 154 #phy-cells = <0>; 155 155 }; 156 156 157 - soc { 157 + soc: soc { 158 158 #address-cells = <1>; 159 159 #size-cells = <1>; 160 160 compatible = "simple-bus";
-1
arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi
··· 72 72 &adc1 { 73 73 pinctrl-names = "default"; 74 74 pinctrl-0 = <&pinctrl_adc1>; 75 - num-channels = <3>; 76 75 vref-supply = <&reg_vref_adc>; 77 76 status = "okay"; 78 77 };
-5
arch/arm/boot/dts/imx6ul-phytec-segin.dtsi
··· 83 83 pinctrl-names = "default"; 84 84 pinctrl-0 = <&pinctrl_adc1>; 85 85 vref-supply = <&reg_adc1_vref_3v3>; 86 - /* 87 - * driver can not separate a specific channel so we request 4 channels 88 - * here - we need only the fourth channel 89 - */ 90 - num-channels = <4>; 91 86 status = "disabled"; 92 87 }; 93 88
+1 -1
arch/arm/boot/dts/imx6ul-tqma6ul2l.dtsi
··· 14 14 }; 15 15 16 16 &usdhc2 { 17 - fsl,tuning-step= <6>; 17 + fsl,tuning-step = <6>; 18 18 }; 19 19 20 20 &iomuxc {
+18 -18
arch/arm/boot/dts/imx6ul.dtsi
··· 64 64 clock-frequency = <696000000>; 65 65 clock-latency = <61036>; /* two CLK32 periods */ 66 66 #cooling-cells = <2>; 67 - operating-points = < 67 + operating-points = 68 68 /* kHz uV */ 69 - 696000 1275000 70 - 528000 1175000 71 - 396000 1025000 72 - 198000 950000 73 - >; 74 - fsl,soc-operating-points = < 69 + <696000 1275000>, 70 + <528000 1175000>, 71 + <396000 1025000>, 72 + <198000 950000>; 73 + fsl,soc-operating-points = 75 74 /* KHz uV */ 76 - 696000 1275000 77 - 528000 1175000 78 - 396000 1175000 79 - 198000 1175000 80 - >; 75 + <696000 1275000>, 76 + <528000 1175000>, 77 + <396000 1175000>, 78 + <198000 1175000>; 81 79 clocks = <&clks IMX6UL_CLK_ARM>, 82 80 <&clks IMX6UL_CLK_PLL2_BUS>, 83 81 <&clks IMX6UL_CLK_PLL2_PFD2>, ··· 137 139 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 138 140 }; 139 141 140 - soc { 142 + soc: soc { 141 143 #address-cells = <1>; 142 144 #size-cells = <1>; 143 145 compatible = "simple-bus"; ··· 147 149 ocram: sram@900000 { 148 150 compatible = "mmio-sram"; 149 151 reg = <0x00900000 0x20000>; 152 + ranges = <0 0x00900000 0x20000>; 153 + #address-cells = <1>; 154 + #size-cells = <1>; 150 155 }; 151 156 152 157 intc: interrupt-controller@a01000 { ··· 544 543 }; 545 544 546 545 kpp: keypad@20b8000 { 547 - compatible = "fsl,imx6ul-kpp", "fsl,imx6q-kpp", "fsl,imx21-kpp"; 546 + compatible = "fsl,imx6ul-kpp", "fsl,imx21-kpp"; 548 547 reg = <0x020b8000 0x4000>; 549 548 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; 550 549 clocks = <&clks IMX6UL_CLK_KPP>; ··· 924 923 reg = <0x02198000 0x4000>; 925 924 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 926 925 clocks = <&clks IMX6UL_CLK_ADC1>; 927 - num-channels = <2>; 928 926 clock-names = "adc"; 929 927 fsl,adck-max-frequency = <30000000>, <40000000>, 930 928 <20000000>; ··· 998 998 }; 999 999 1000 1000 csi: csi@21c4000 { 1001 - compatible = "fsl,imx6ul-csi", "fsl,imx7-csi"; 1001 + compatible = "fsl,imx6ul-csi"; 1002 1002 reg = <0x021c4000 0x4000>; 1003 1003 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 1004 1004 clocks = <&clks IMX6UL_CLK_CSI>; ··· 1007 1007 }; 1008 1008 1009 1009 lcdif: lcdif@21c8000 { 1010 - compatible = "fsl,imx6ul-lcdif", "fsl,imx28-lcdif"; 1010 + compatible = "fsl,imx6ul-lcdif", "fsl,imx6sx-lcdif"; 1011 1011 reg = <0x021c8000 0x4000>; 1012 1012 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 1013 1013 clocks = <&clks IMX6UL_CLK_LCDIF_PIX>, ··· 1028 1028 qspi: spi@21e0000 { 1029 1029 #address-cells = <1>; 1030 1030 #size-cells = <0>; 1031 - compatible = "fsl,imx6ul-qspi", "fsl,imx6sx-qspi"; 1031 + compatible = "fsl,imx6ul-qspi"; 1032 1032 reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>; 1033 1033 reg-names = "QuadSPI", "QuadSPI-memory"; 1034 1034 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
-1
arch/arm/boot/dts/imx6ull-colibri.dtsi
··· 94 94 }; 95 95 96 96 &adc1 { 97 - num-channels = <10>; 98 97 vref-supply = <&reg_module_3v3_avdd>; 99 98 pinctrl-names = "default"; 100 99 pinctrl-0 = <&pinctrl_adc1>;
+1 -1
arch/arm/boot/dts/imx6ull-tqma6ull2.dtsi
··· 14 14 }; 15 15 16 16 &usdhc2 { 17 - fsl,tuning-step= <6>; 17 + fsl,tuning-step = <6>; 18 18 /* Errata ERR010450 Workaround */ 19 19 max-frequency = <99000000>; 20 20 assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
+1 -1
arch/arm/boot/dts/imx6ull-tqma6ull2l.dtsi
··· 14 14 }; 15 15 16 16 &usdhc2 { 17 - fsl,tuning-step= <6>; 17 + fsl,tuning-step = <6>; 18 18 /* Errata ERR010450 Workaround */ 19 19 max-frequency = <99000000>; 20 20 assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
+1 -1
arch/arm/boot/dts/imx6ull.dtsi
··· 50 50 }; 51 51 52 52 / { 53 - soc { 53 + soc: soc { 54 54 aips3: bus@2200000 { 55 55 compatible = "fsl,aips-bus", "simple-bus"; 56 56 #address-cells = <1>;
+4
arch/arm/boot/dts/imx6ulz-bsh-smm-m2.dts
··· 29 29 status = "okay"; 30 30 }; 31 31 32 + &snvs_poweroff { 33 + status = "okay"; 34 + }; 35 + 32 36 &uart3 { 33 37 pinctrl-names = "default"; 34 38 pinctrl-0 = <&pinctrl_uart3>;
+26 -116
arch/arm/boot/dts/imx7-colibri-aster.dtsi
··· 1 - // SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2017-2020 Toradex AG 4 - * 3 + * Copyright 2017-2022 Toradex 5 4 */ 6 5 7 - 8 - #include <dt-bindings/input/input.h> 9 - #include <dt-bindings/pwm/pwm.h> 10 - 11 - / { 12 - chosen { 13 - stdout-path = "serial0:115200n8"; 14 - }; 15 - 16 - gpio-keys { 17 - compatible = "gpio-keys"; 18 - pinctrl-names = "default"; 19 - pinctrl-0 = <&pinctrl_gpiokeys>; 20 - 21 - power { 22 - label = "Wake-Up"; 23 - gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; 24 - linux,code = <KEY_WAKEUP>; 25 - debounce-interval = <10>; 26 - wakeup-source; 27 - }; 28 - }; 29 - 30 - panel: panel { 31 - compatible = "edt,et057090dhu"; 32 - backlight = <&bl>; 33 - power-supply = <&reg_3v3>; 34 - 35 - port { 36 - panel_in: endpoint { 37 - remote-endpoint = <&lcdif_out>; 38 - }; 39 - }; 40 - }; 41 - 42 - reg_3v3: regulator-3v3 { 43 - compatible = "regulator-fixed"; 44 - regulator-name = "3.3V"; 45 - regulator-min-microvolt = <3300000>; 46 - regulator-max-microvolt = <3300000>; 47 - }; 48 - 49 - reg_5v0: regulator-5v0 { 50 - compatible = "regulator-fixed"; 51 - regulator-name = "5V"; 52 - regulator-min-microvolt = <5000000>; 53 - regulator-max-microvolt = <5000000>; 54 - }; 55 - 56 - reg_usbh_vbus: regulator-usbh-vbus { 57 - compatible = "regulator-fixed"; 58 - pinctrl-names = "default"; 59 - pinctrl-0 = <&pinctrl_usbh_reg>; 60 - regulator-name = "VCC_USB[1-4]"; 61 - regulator-min-microvolt = <5000000>; 62 - regulator-max-microvolt = <5000000>; 63 - gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; 64 - vin-supply = <&reg_5v0>; 65 - }; 66 - }; 67 - 6 + /* Colibri AD0 to AD3 */ 68 7 &adc1 { 69 8 status = "okay"; 70 9 }; 71 10 72 - /* 73 - * ADC2 is not available on the Aster board and 74 - * conflicts with AD7879 resistive touchscreen. 75 - */ 76 - &adc2 { 77 - status = "disabled"; 78 - }; 79 - 80 - &bl { 81 - brightness-levels = <0 4 8 16 32 64 128 255>; 82 - default-brightness-level = <6>; 83 - power-supply = <&reg_3v3>; 11 + /* Colibri SSP */ 12 + &ecspi3 { 13 + cs-gpios = < 14 + &gpio4 11 GPIO_ACTIVE_LOW /* SODIMM 86 / regular SSPFRM as UNO_SPI_CS or */ 15 + &gpio4 23 GPIO_ACTIVE_LOW /* SODIMM 65 / already muxed pinctrl_gpio2 as SPI_CE0_N */ 16 + &gpio4 22 GPIO_ACTIVE_LOW /* SODIMM 85 / already muxed pinctrl_gpio2 as SPI_CE1_N */ 17 + >; 84 18 status = "okay"; 85 19 }; 86 20 21 + /* Colibri Fast Ethernet */ 87 22 &fec1 { 88 23 status = "okay"; 89 24 }; 90 25 26 + /* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ 91 27 &i2c4 { 92 28 status = "okay"; 93 - 94 - /* Microchip/Atmel maxtouch controller */ 95 - touchscreen@4a { 96 - compatible = "atmel,maxtouch"; 97 - pinctrl-names = "default"; 98 - pinctrl-0 = <&pinctrl_gpiotouch>; 99 - reg = <0x4a>; 100 - interrupt-parent = <&gpio2>; 101 - interrupts = <15 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */ 102 - reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 */ 103 - }; 104 - 105 - /* M41T0M6 real time clock on carrier board */ 106 - rtc: rtc@68 { 107 - compatible = "st,m41t0"; 108 - reg = <0x68>; 109 - }; 110 29 }; 111 30 112 - &iomuxc { 113 - pinctrl_gpiotouch: touchgpios { 114 - fsl,pins = < 115 - MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 116 - MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 117 - >; 118 - }; 119 - }; 120 - 121 - &lcdif { 122 - status = "okay"; 123 - 124 - port { 125 - lcdif_out: endpoint { 126 - remote-endpoint = <&panel_in>; 127 - }; 128 - }; 129 - }; 130 - 31 + /* Colibri PWM<A> */ 131 32 &pwm1 { 132 33 status = "okay"; 133 34 }; 134 35 36 + /* Colibri PWM<B> */ 135 37 &pwm2 { 136 38 status = "okay"; 137 39 }; 138 40 41 + /* Colibri PWM<C> */ 139 42 &pwm3 { 140 43 status = "okay"; 141 44 }; 142 45 46 + /* Colibri PWM<D> */ 143 47 &pwm4 { 144 48 status = "okay"; 145 49 }; 146 50 51 + /* M41T0M6 real time clock */ 52 + &rtc { 53 + status = "okay"; 54 + }; 55 + 56 + /* Colibri UART_A */ 147 57 &uart1 { 148 58 status = "okay"; 149 59 }; 150 60 61 + /* Colibri UART_B */ 151 62 &uart2 { 152 63 status = "okay"; 153 64 }; 154 65 66 + /* Colibri UART_C */ 155 67 &uart3 { 156 68 status = "okay"; 157 69 }; 158 70 71 + /* Colibri USBC */ 159 72 &usbotg1 { 160 73 status = "okay"; 161 74 }; 162 75 76 + /* Colibri MMC/SD */ 163 77 &usdhc1 { 164 - keep-power-in-suspend; 165 - no-1-8-v; 166 - wakeup-source; 167 - vmmc-supply = <&reg_3v3>; 168 78 status = "okay"; 169 79 };
+36 -120
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
··· 1 - // SPDX-License-Identifier: GPL-2.0+ OR MIT 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2016-2020 Toradex 3 + * Copyright 2016-2022 Toradex 4 4 */ 5 5 6 6 / { 7 - aliases { 8 - rtc0 = &rtc; 9 - rtc1 = &snvs_rtc; 10 - }; 11 - 12 - chosen { 13 - stdout-path = "serial0:115200n8"; 14 - }; 15 - 16 - /* fixed crystal dedicated to mpc258x */ 7 + /* Fixed crystal dedicated to MCP2515. */ 17 8 clk16m: clk16m { 18 9 compatible = "fixed-clock"; 19 10 #clock-cells = <0>; 20 11 clock-frequency = <16000000>; 21 12 }; 22 - 23 - gpio-keys { 24 - compatible = "gpio-keys"; 25 - pinctrl-names = "default"; 26 - pinctrl-0 = <&pinctrl_gpiokeys>; 27 - 28 - power { 29 - label = "Wake-Up"; 30 - gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; 31 - linux,code = <KEY_WAKEUP>; 32 - debounce-interval = <10>; 33 - wakeup-source; 34 - }; 35 - }; 36 - 37 - panel: panel { 38 - compatible = "edt,et057090dhu"; 39 - backlight = <&bl>; 40 - power-supply = <&reg_3v3>; 41 - 42 - port { 43 - panel_in: endpoint { 44 - remote-endpoint = <&lcdif_out>; 45 - }; 46 - }; 47 - }; 48 - 49 - reg_3v3: regulator-3v3 { 50 - compatible = "regulator-fixed"; 51 - regulator-name = "3.3V"; 52 - regulator-min-microvolt = <3300000>; 53 - regulator-max-microvolt = <3300000>; 54 - }; 55 - 56 - reg_5v0: regulator-5v0 { 57 - compatible = "regulator-fixed"; 58 - regulator-name = "5V"; 59 - regulator-min-microvolt = <5000000>; 60 - regulator-max-microvolt = <5000000>; 61 - }; 62 - 63 - reg_usbh_vbus: regulator-usbh-vbus { 64 - compatible = "regulator-fixed"; 65 - pinctrl-names = "default"; 66 - pinctrl-0 = <&pinctrl_usbh_reg>; 67 - regulator-name = "VCC_USB[1-4]"; 68 - regulator-min-microvolt = <5000000>; 69 - regulator-max-microvolt = <5000000>; 70 - gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; 71 - vin-supply = <&reg_5v0>; 72 - }; 73 13 }; 74 14 75 - &bl { 76 - brightness-levels = <0 4 8 16 32 64 128 255>; 77 - default-brightness-level = <6>; 78 - power-supply = <&reg_3v3>; 79 - 80 - status = "okay"; 81 - }; 82 - 15 + /* Colibri AD0 to AD3 */ 83 16 &adc1 { 84 17 status = "okay"; 85 18 }; 86 19 87 - &adc2 { 88 - status = "okay"; 20 + /* 21 + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3. 22 + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. 23 + */ 24 + &atmel_mxt_ts { 25 + interrupt-parent = <&gpio1>; 26 + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 / INT */ 27 + pinctrl-0 = <&pinctrl_atmel_adapter>; 28 + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 / RST */ 29 + status = "disabled"; 89 30 }; 90 31 32 + /* Colibri SSP */ 91 33 &ecspi3 { 92 34 status = "okay"; 93 35 94 36 mcp2515: can@0 { 37 + clocks = <&clk16m>; 95 38 compatible = "microchip,mcp2515"; 39 + interrupt-parent = <&gpio5>; 40 + interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 96 41 pinctrl-names = "default"; 97 42 pinctrl-0 = <&pinctrl_can_int>; 98 43 reg = <0>; 99 - clocks = <&clk16m>; 100 - interrupt-parent = <&gpio5>; 101 - interrupts = <2 IRQ_TYPE_EDGE_FALLING>; 102 44 spi-max-frequency = <10000000>; 103 45 vdd-supply = <&reg_3v3>; 104 46 xceiver-supply = <&reg_5v0>; 105 - status = "okay"; 106 47 }; 107 48 }; 108 49 50 + /* Colibri Fast Ethernet */ 109 51 &fec1 { 110 52 status = "okay"; 111 53 }; 112 54 55 + /* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ 113 56 &i2c4 { 114 57 status = "okay"; 115 - 116 - /* 117 - * Touchscreen is using SODIMM 28/30, also used for PWM<B>, PWM<C>, 118 - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms 119 - */ 120 - touchscreen@4a { 121 - compatible = "atmel,maxtouch"; 122 - pinctrl-names = "default"; 123 - pinctrl-0 = <&pinctrl_gpiotouch>; 124 - reg = <0x4a>; 125 - interrupt-parent = <&gpio1>; 126 - interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */ 127 - reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */ 128 - status = "disabled"; 129 - }; 130 - 131 - /* M41T0M6 real time clock on carrier board */ 132 - rtc: rtc@68 { 133 - compatible = "st,m41t0"; 134 - reg = <0x68>; 135 - }; 136 58 }; 137 59 138 - &lcdif { 139 - status = "okay"; 140 - 141 - port { 142 - lcdif_out: endpoint { 143 - remote-endpoint = <&panel_in>; 144 - }; 145 - }; 146 - }; 147 - 60 + /* Colibri PWM<A> */ 148 61 &pwm1 { 149 62 status = "okay"; 150 63 }; 151 64 65 + /* Colibri PWM<B> */ 152 66 &pwm2 { 67 + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 153 68 status = "okay"; 154 69 }; 155 70 71 + /* Colibri PWM<C> */ 156 72 &pwm3 { 73 + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 157 74 status = "okay"; 158 75 }; 159 76 77 + /* Colibri PWM<D> */ 160 78 &pwm4 { 161 79 status = "okay"; 162 80 }; 163 81 82 + /* M41T0M6 real time clock */ 83 + &rtc { 84 + status = "okay"; 85 + }; 86 + 87 + /* Colibri UART_A */ 164 88 &uart1 { 165 89 status = "okay"; 166 90 }; 167 91 92 + /* Colibri UART_B */ 168 93 &uart2 { 169 94 status = "okay"; 170 95 }; 171 96 97 + /* Colibri UART_C */ 172 98 &uart3 { 173 99 status = "okay"; 174 100 }; 175 101 102 + /* Colibri USBC */ 176 103 &usbotg1 { 177 104 status = "okay"; 178 105 }; 179 106 107 + /* Colibri MMC/SD */ 180 108 &usdhc1 { 181 - keep-power-in-suspend; 182 - wakeup-source; 183 - vmmc-supply = <&reg_3v3>; 184 109 status = "okay"; 185 - }; 186 - 187 - &iomuxc { 188 - pinctrl_gpiotouch: touchgpios { 189 - fsl,pins = < 190 - MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74 191 - MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14 192 - >; 193 - }; 194 110 };
+112
arch/arm/boot/dts/imx7-colibri-iris-v2.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright 2022 Toradex 4 + */ 5 + 6 + / { 7 + reg_3v3_vmmc: regulator-3v3-vmmc { 8 + compatible = "regulator-fixed"; 9 + enable-active-high; 10 + gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* SODIMM 100 */ 11 + regulator-max-microvolt = <3300000>; 12 + regulator-min-microvolt = <3300000>; 13 + regulator-name = "3v3_vmmc"; 14 + startup-delay-us = <100>; 15 + }; 16 + }; 17 + 18 + /* Colibri AD0 to AD3 */ 19 + &adc1 { 20 + status = "okay"; 21 + }; 22 + 23 + /* Colibri SSP */ 24 + &ecspi3 { 25 + status = "okay"; 26 + }; 27 + 28 + /* Colibri Fast Ethernet */ 29 + &fec1 { 30 + status = "okay"; 31 + }; 32 + 33 + &gpio2 { 34 + /* 35 + * uart_b_c_on_x14_enable turns the UART transceiver for UART2 and 5 on. If one wants to 36 + * turn the transceiver off, that property has to be deleted and the gpio handled in 37 + * userspace. 38 + * The same applies to uart_a_on_x13_enable where the UART_A transceiver is turned on. 39 + */ 40 + uart-b-c-on-x14-enable-hog { 41 + gpio-hog; 42 + gpios = <27 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */ 43 + output-high; 44 + }; 45 + }; 46 + 47 + &gpio5 { 48 + uart-a-on-x13-enable-hog { 49 + gpio-hog; 50 + gpios = <17 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */ 51 + output-high; 52 + }; 53 + }; 54 + 55 + /* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ 56 + &i2c4 { 57 + status = "okay"; 58 + }; 59 + 60 + /* Colibri PWM<A> */ 61 + &pwm1 { 62 + status = "okay"; 63 + }; 64 + 65 + /* Colibri PWM<B> */ 66 + &pwm2 { 67 + status = "okay"; 68 + }; 69 + 70 + /* Colibri PWM<C> */ 71 + &pwm3 { 72 + status = "okay"; 73 + }; 74 + 75 + /* Colibri PWM<D> */ 76 + &pwm4 { 77 + status = "okay"; 78 + }; 79 + 80 + /* M41T0M6 real time clock */ 81 + &rtc { 82 + status = "okay"; 83 + }; 84 + 85 + /* Colibri UART_A */ 86 + &uart1 { 87 + status = "okay"; 88 + }; 89 + 90 + /* Colibri UART_B */ 91 + &uart2 { 92 + status = "okay"; 93 + }; 94 + 95 + /* Colibri UART_C */ 96 + &uart3 { 97 + status = "okay"; 98 + }; 99 + 100 + /* Colibri USBC */ 101 + &usbotg1 { 102 + status = "okay"; 103 + }; 104 + 105 + /* Colibri MMC/SD, UHS-I capable uSD slot */ 106 + &usdhc1 { 107 + cap-power-off-card; 108 + /delete-property/ keep-power-in-suspend; 109 + /delete-property/ no-1-8-v; 110 + vmmc-supply = <&reg_3v3_vmmc>; 111 + status = "okay"; 112 + };
+108
arch/arm/boot/dts/imx7-colibri-iris.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright 2022 Toradex 4 + */ 5 + 6 + /* Colibri AD0 to AD3 */ 7 + &adc1 { 8 + status = "okay"; 9 + }; 10 + 11 + /* 12 + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3. 13 + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. 14 + */ 15 + &atmel_mxt_ts { 16 + interrupt-parent = <&gpio1>; 17 + interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 / INT */ 18 + pinctrl-0 = <&pinctrl_atmel_adapter>; 19 + reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 / RST */ 20 + }; 21 + 22 + /* Colibri SSP */ 23 + &ecspi3 { 24 + status = "okay"; 25 + }; 26 + 27 + /* Colibri Fast Ethernet */ 28 + &fec1 { 29 + status = "okay"; 30 + }; 31 + 32 + &gpio2 { 33 + /* 34 + * uart25 turns the UART transceiver for UART2 and 5 on. If one wants to turn the 35 + * transceiver off, that property has to be deleted and the gpio handled in userspace. 36 + * The same applies to uart1_tx_on where the UART1 transceiver is turned on. 37 + */ 38 + uart25-tx-on-hog { 39 + gpio-hog; 40 + gpios = <27 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */ 41 + output-high; 42 + }; 43 + }; 44 + 45 + &gpio5 { 46 + uart1-tx-on-hog { 47 + gpio-hog; 48 + gpios = <17 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */ 49 + output-high; 50 + }; 51 + }; 52 + 53 + /* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ 54 + &i2c4 { 55 + status = "okay"; 56 + }; 57 + 58 + /* Colibri PWM<A> */ 59 + &pwm1 { 60 + status = "okay"; 61 + }; 62 + 63 + /* Colibri PWM<B> */ 64 + &pwm2 { 65 + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 66 + status = "okay"; 67 + }; 68 + 69 + /* Colibri PWM<C> */ 70 + &pwm3 { 71 + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 72 + status = "okay"; 73 + }; 74 + 75 + /* Colibri PWM<D> */ 76 + &pwm4 { 77 + status = "okay"; 78 + }; 79 + 80 + /* M41T0M6 real time clock */ 81 + &rtc { 82 + status = "okay"; 83 + }; 84 + 85 + /* Colibri UART_A */ 86 + &uart1 { 87 + status = "okay"; 88 + }; 89 + 90 + /* Colibri UART_B */ 91 + &uart2 { 92 + status = "okay"; 93 + }; 94 + 95 + /* Colibri UART_C */ 96 + &uart3 { 97 + status = "okay"; 98 + }; 99 + 100 + /* Colibri USBC */ 101 + &usbotg1 { 102 + status = "okay"; 103 + }; 104 + 105 + /* Colibri MMC/SD */ 106 + &usdhc1 { 107 + status = "okay"; 108 + };
+539 -337
arch/arm/boot/dts/imx7-colibri.dtsi
··· 1 - // SPDX-License-Identifier: GPL-2.0+ OR MIT 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2016-2020 Toradex 3 + * Copyright 2016-2022 Toradex 4 4 */ 5 5 6 + #include <dt-bindings/pwm/pwm.h> 7 + 6 8 / { 7 - bl: backlight { 9 + aliases { 10 + rtc0 = &rtc; 11 + rtc1 = &snvs_rtc; 12 + }; 13 + 14 + backlight: backlight { 15 + brightness-levels = <0 45 63 88 119 158 203 255>; 8 16 compatible = "pwm-backlight"; 17 + default-brightness-level = <4>; 18 + enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 9 19 pinctrl-names = "default"; 10 20 pinctrl-0 = <&pinctrl_gpio_bl_on>; 11 - pwms = <&pwm1 0 5000000 0>; 12 - enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; 21 + power-supply = <&reg_module_3v3>; 22 + pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>; 23 + status = "disabled"; 24 + }; 25 + 26 + chosen { 27 + stdout-path = "serial0:115200n8"; 28 + }; 29 + 30 + extcon_usbc_det: usbc-det { 31 + compatible = "linux,extcon-usb-gpio"; 32 + debounce = <25>; 33 + id-gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>; /* SODIMM 137 / USBC_DET */ 34 + pinctrl-names = "default"; 35 + pinctrl-0 = <&pinctrl_usbc_det>; 36 + }; 37 + 38 + gpio-keys { 39 + compatible = "gpio-keys"; 40 + pinctrl-names = "default"; 41 + pinctrl-0 = <&pinctrl_gpiokeys>; 42 + 43 + wakeup { 44 + debounce-interval = <10>; 45 + gpios = <&gpio1 1 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; /* SODIMM 45 */ 46 + label = "Wake-Up"; 47 + linux,code = <KEY_WAKEUP>; 48 + wakeup-source; 49 + }; 50 + }; 51 + 52 + panel_dpi: panel-dpi { 53 + backlight = <&backlight>; 54 + compatible = "edt,et057090dhu"; 55 + power-supply = <&reg_3v3>; 56 + status = "disabled"; 57 + 58 + port { 59 + lcd_panel_in: endpoint { 60 + remote-endpoint = <&lcdif_out>; 61 + }; 62 + }; 63 + }; 64 + 65 + reg_3v3: regulator-3v3 { 66 + compatible = "regulator-fixed"; 67 + regulator-always-on; 68 + regulator-max-microvolt = <3300000>; 69 + regulator-min-microvolt = <3300000>; 70 + regulator-name = "3.3V"; 71 + }; 72 + 73 + reg_5v0: regulator-5v0 { 74 + compatible = "regulator-fixed"; 75 + regulator-always-on; 76 + regulator-max-microvolt = <5000000>; 77 + regulator-min-microvolt = <5000000>; 78 + regulator-name = "5V"; 13 79 }; 14 80 15 81 reg_module_3v3: regulator-module-3v3 { 16 82 compatible = "regulator-fixed"; 17 - regulator-name = "+V3.3"; 18 - regulator-min-microvolt = <3300000>; 19 - regulator-max-microvolt = <3300000>; 20 83 regulator-always-on; 84 + regulator-max-microvolt = <3300000>; 85 + regulator-min-microvolt = <3300000>; 86 + regulator-name = "+V3.3"; 21 87 }; 22 88 23 89 reg_module_3v3_avdd: regulator-module-3v3-avdd { 24 90 compatible = "regulator-fixed"; 91 + regulator-always-on; 92 + regulator-max-microvolt = <3300000>; 93 + regulator-min-microvolt = <3300000>; 25 94 regulator-name = "+V3.3_AVDD_AUDIO"; 95 + }; 96 + 97 + reg_module_3v3_eth: regulator-module-3v3-eth { 98 + compatible = "regulator-fixed"; 99 + off-on-delay-us = <200000>; 100 + regulator-name = "+V3.3_ETH"; 26 101 regulator-min-microvolt = <3300000>; 27 102 regulator-max-microvolt = <3300000>; 28 - regulator-always-on; 103 + regulator-boot-on; 104 + startup-delay-us = <200000>; 105 + vin-supply = <&reg_LDO1>; 106 + }; 107 + 108 + reg_usbh_vbus: regulator-usbh-vbus { 109 + compatible = "regulator-fixed"; 110 + gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; /* SODIMM 129 / USBH_PEN */ 111 + pinctrl-names = "default"; 112 + pinctrl-0 = <&pinctrl_usbh_reg>; 113 + regulator-max-microvolt = <5000000>; 114 + regulator-min-microvolt = <5000000>; 115 + regulator-name = "VCC_USB[1-4]"; 116 + vin-supply = <&reg_5v0>; 29 117 }; 30 118 31 119 sound { 32 120 compatible = "simple-audio-card"; 33 - simple-audio-card,name = "imx7-sgtl5000"; 34 - simple-audio-card,format = "i2s"; 35 121 simple-audio-card,bitclock-master = <&dailink_master>; 122 + simple-audio-card,format = "i2s"; 36 123 simple-audio-card,frame-master = <&dailink_master>; 124 + simple-audio-card,name = "imx7-sgtl5000"; 125 + 37 126 simple-audio-card,cpu { 38 127 sound-dai = <&sai1>; 39 128 }; 40 129 41 130 dailink_master: simple-audio-card,codec { 42 - sound-dai = <&codec>; 43 131 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 132 + sound-dai = <&codec>; 44 133 }; 45 134 }; 46 135 }; 47 136 137 + /* Colibri AD0 to AD3 */ 48 138 &adc1 { 49 139 vref-supply = <&reg_DCDC3>; 50 140 }; 51 141 52 - &adc2 { 53 - vref-supply = <&reg_DCDC3>; 54 - }; 142 + /* ADC2 is not available as it conflicts with AD7879 resistive touchscreen. */ 55 143 56 144 &cpu0 { 57 145 cpu-supply = <&reg_DCDC2>; 58 146 }; 59 147 148 + /* Colibri SSP */ 60 149 &ecspi3 { 150 + cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; /* SODIMM 86 / SSPFRM */ 61 151 pinctrl-names = "default"; 62 152 pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>; 63 - cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; 64 153 }; 65 154 155 + /* Colibri Fast Ethernet */ 66 156 &fec1 { 157 + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; 158 + assigned-clock-rates = <0>, <100000000>; 159 + assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, 160 + <&clks IMX7D_ENET1_TIME_ROOT_CLK>; 161 + clock-names = "ipg", "ahb", "ptp", "enet_clk_ref"; 162 + clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, 163 + <&clks IMX7D_ENET_AXI_ROOT_CLK>, 164 + <&clks IMX7D_ENET1_TIME_ROOT_CLK>, 165 + <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>; 166 + fsl,magic-packet; 167 + phy-handle = <&ethphy0>; 168 + phy-mode = "rmii"; 169 + phy-supply = <&reg_module_3v3_eth>; 67 170 pinctrl-names = "default", "sleep"; 68 171 pinctrl-0 = <&pinctrl_enet1>; 69 172 pinctrl-1 = <&pinctrl_enet1_sleep>; 70 - clocks = <&clks IMX7D_ENET_AXI_ROOT_CLK>, 71 - <&clks IMX7D_ENET_AXI_ROOT_CLK>, 72 - <&clks IMX7D_ENET1_TIME_ROOT_CLK>, 73 - <&clks IMX7D_PLL_ENET_MAIN_50M_CLK>; 74 - clock-names = "ipg", "ahb", "ptp", "enet_clk_ref"; 75 - assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, 76 - <&clks IMX7D_ENET1_TIME_ROOT_CLK>; 77 - assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; 78 - assigned-clock-rates = <0>, <100000000>; 79 - phy-mode = "rmii"; 80 - phy-supply = <&reg_LDO1>; 81 - fsl,magic-packet; 173 + 174 + mdio { 175 + #address-cells = <1>; 176 + #size-cells = <0>; 177 + 178 + /* Micrel KSZ8041RNL */ 179 + ethphy0: ethernet-phy@0 { 180 + compatible = "ethernet-phy-ieee802.3-c22"; 181 + max-speed = <100>; 182 + micrel,led-mode = <0>; 183 + reg = <0>; 184 + }; 185 + }; 82 186 }; 83 187 84 188 &flexcan1 { 85 189 pinctrl-names = "default"; 86 190 pinctrl-0 = <&pinctrl_flexcan1>; 87 - status = "disabled"; 88 191 }; 89 192 90 193 &flexcan2 { 91 194 pinctrl-names = "default"; 92 195 pinctrl-0 = <&pinctrl_flexcan2>; 93 - status = "disabled"; 94 196 }; 95 197 96 198 &gpio1 { ··· 373 271 "SODIMM_137"; 374 272 }; 375 273 274 + /* NAND on such SKUs */ 376 275 &gpmi { 276 + fsl,use-minimum-ecc; 277 + nand-ecc-mode = "hw"; 278 + nand-on-flash-bbt; 377 279 pinctrl-names = "default"; 378 280 pinctrl-0 = <&pinctrl_gpmi_nand>; 379 - fsl,use-minimum-ecc; 380 - nand-on-flash-bbt; 381 - nand-ecc-mode = "hw"; 382 281 }; 383 282 283 + /* On-module Power I2C */ 384 284 &i2c1 { 385 285 clock-frequency = <100000>; 386 286 pinctrl-names = "default", "gpio"; ··· 390 286 pinctrl-1 = <&pinctrl_i2c1_recovery &pinctrl_i2c1_int>; 391 287 scl-gpios = <&gpio1 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 392 288 sda-gpios = <&gpio1 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 393 - 394 289 status = "okay"; 395 290 396 291 codec: sgtl5000@a { 397 - compatible = "fsl,sgtl5000"; 398 292 #sound-dai-cells = <0>; 399 - reg = <0x0a>; 400 293 clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; 294 + compatible = "fsl,sgtl5000"; 401 295 pinctrl-names = "default"; 402 296 pinctrl-0 = <&pinctrl_sai1_mclk>; 297 + reg = <0xa>; 403 298 VDDA-supply = <&reg_module_3v3_avdd>; 404 - VDDIO-supply = <&reg_module_3v3>; 405 299 VDDD-supply = <&reg_DCDC3>; 300 + VDDIO-supply = <&reg_module_3v3>; 406 301 }; 407 302 408 - ad7879@2c { 409 - compatible = "adi,ad7879-1"; 410 - reg = <0x2c>; 411 - interrupt-parent = <&gpio1>; 412 - interrupts = <13 IRQ_TYPE_EDGE_FALLING>; 413 - touchscreen-max-pressure = <4096>; 414 - adi,resistance-plate-x = <120>; 415 - adi,first-conversion-delay = /bits/ 8 <3>; 303 + ad7879_ts: touchscreen@2c { 416 304 adi,acquisition-time = /bits/ 8 <1>; 417 - adi,median-filter-size = /bits/ 8 <2>; 418 305 adi,averaging = /bits/ 8 <1>; 419 306 adi,conversion-interval = /bits/ 8 <255>; 307 + adi,first-conversion-delay = /bits/ 8 <3>; 308 + adi,median-filter-size = /bits/ 8 <2>; 309 + adi,resistance-plate-x = <120>; 310 + compatible = "adi,ad7879-1"; 311 + interrupt-parent = <&gpio1>; 312 + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; 313 + reg = <0x2c>; 314 + touchscreen-max-pressure = <4096>; 315 + status = "disabled"; 420 316 }; 421 317 422 318 pmic@33 { ··· 424 320 reg = <0x33>; 425 321 426 322 regulators { 427 - reg_DCDC1: DCDC1 { /* V1.0_SOC */ 323 + reg_DCDC1: DCDC1 { 324 + regulator-always-on; 325 + regulator-boot-on; 326 + regulator-max-microvolt = <1100000>; 428 327 regulator-min-microvolt = <1000000>; 429 - regulator-max-microvolt = <1100000>; 430 - regulator-boot-on; 431 - regulator-always-on; 328 + regulator-name = "+V1.0_SOC"; 432 329 }; 433 330 434 - reg_DCDC2: DCDC2 { /* V1.1_ARM */ 331 + reg_DCDC2: DCDC2 { 332 + regulator-always-on; 333 + regulator-boot-on; 334 + regulator-max-microvolt = <1100000>; 435 335 regulator-min-microvolt = <975000>; 436 - regulator-max-microvolt = <1100000>; 437 - regulator-boot-on; 438 - regulator-always-on; 336 + regulator-name = "+V1.1_ARM"; 439 337 }; 440 338 441 - reg_DCDC3: DCDC3 { /* V1.8 */ 442 - regulator-min-microvolt = <1800000>; 339 + reg_DCDC3: DCDC3 { 340 + regulator-always-on; 341 + regulator-boot-on; 443 342 regulator-max-microvolt = <1800000>; 444 - regulator-boot-on; 445 - regulator-always-on; 343 + regulator-min-microvolt = <1800000>; 344 + regulator-name = "+V1.8"; 446 345 }; 447 346 448 - reg_DCDC4: DCDC4 { /* V1.35_DRAM */ 449 - regulator-min-microvolt = <1350000>; 347 + reg_DCDC4: DCDC4 { 348 + regulator-always-on; 349 + regulator-boot-on; 450 350 regulator-max-microvolt = <1350000>; 451 - regulator-boot-on; 452 - regulator-always-on; 351 + regulator-min-microvolt = <1350000>; 352 + regulator-name = "+V1.35_DRAM"; 453 353 }; 454 354 455 - reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */ 456 - regulator-min-microvolt = <1800000>; 355 + reg_LDO1: LDO1 { 356 + regulator-boot-on; 457 357 regulator-max-microvolt = <3300000>; 458 - regulator-boot-on; 459 - }; 460 - 461 - reg_LDO2: LDO2 { /* +V1.8_SD */ 462 - regulator-min-microvolt = <1800000>; 463 - regulator-max-microvolt = <3300000>; 464 - regulator-boot-on; 465 - regulator-always-on; 466 - }; 467 - 468 - reg_LDO3: LDO3 { /* PWR_EN_+V3.3_LPSR */ 469 358 regulator-min-microvolt = <3300000>; 470 - regulator-max-microvolt = <3300000>; 471 - regulator-boot-on; 472 - regulator-always-on; 359 + regulator-name = "PWR_EN_+V3.3_ETH"; 473 360 }; 474 361 475 - reg_LDO4: LDO4 { /* V1.8_LPSR */ 362 + reg_LDO2: LDO2 { 363 + regulator-always-on; 364 + regulator-boot-on; 365 + regulator-max-microvolt = <3300000>; 476 366 regulator-min-microvolt = <1800000>; 367 + regulator-name = "+V1.8_SD"; 368 + }; 369 + 370 + reg_LDO3: LDO3 { 371 + regulator-always-on; 372 + regulator-boot-on; 373 + regulator-max-microvolt = <3300000>; 374 + regulator-min-microvolt = <3300000>; 375 + regulator-name = "PWR_EN_+V3.3_LPSR"; 376 + }; 377 + 378 + reg_LDO4: LDO4 { 379 + regulator-always-on; 380 + regulator-boot-on; 477 381 regulator-max-microvolt = <1800000>; 478 - regulator-boot-on; 479 - regulator-always-on; 382 + regulator-min-microvolt = <1800000>; 383 + regulator-name = "+V1.8_LPSR"; 480 384 }; 481 385 482 - reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */ 483 - regulator-min-microvolt = <3300000>; 484 - regulator-max-microvolt = <3300000>; 485 - regulator-boot-on; 386 + reg_LDO5: LDO5 { 486 387 regulator-always-on; 388 + regulator-boot-on; 389 + regulator-max-microvolt = <3300000>; 390 + regulator-min-microvolt = <3300000>; 391 + regulator-name = "PWR_EN_+V3.3"; 487 392 }; 488 393 }; 489 394 }; 490 395 }; 491 396 397 + /* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ 492 398 &i2c4 { 493 399 clock-frequency = <100000>; 494 400 pinctrl-names = "default", "gpio"; ··· 506 392 pinctrl-1 = <&pinctrl_i2c4_recovery>; 507 393 scl-gpios = <&gpio7 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 508 394 sda-gpios = <&gpio7 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; 395 + status = "disabled"; 396 + 397 + /* Atmel maxtouch controller */ 398 + atmel_mxt_ts: touchscreen@4a { 399 + compatible = "atmel,maxtouch"; 400 + interrupt-parent = <&gpio2>; 401 + interrupts = <15 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 / INT */ 402 + pinctrl-names = "default"; 403 + pinctrl-0 = <&pinctrl_atmel_connector>; 404 + reg = <0x4a>; 405 + reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; /* SODIMM 106 / RST */ 406 + status = "disabled"; 407 + }; 408 + 409 + /* M41T0M6 real time clock on carrier board */ 410 + rtc: rtc@68 { 411 + compatible = "st,m41t0"; 412 + reg = <0x68>; 413 + status = "disabled"; 414 + }; 509 415 }; 510 416 511 417 &lcdif { 418 + assigned-clocks = <&clks IMX7D_LCDIF_PIXEL_ROOT_SRC>; 419 + assigned-clock-parents = <&clks IMX7D_PLL_VIDEO_POST_DIV>; 512 420 pinctrl-names = "default"; 513 421 pinctrl-0 = <&pinctrl_lcdif_dat 514 422 &pinctrl_lcdif_ctrl>; 423 + status = "disabled"; 424 + 425 + port { 426 + lcdif_out: endpoint { 427 + remote-endpoint = <&lcd_panel_in>; 428 + }; 429 + }; 515 430 }; 516 431 432 + /* Colibri PWM<A> */ 517 433 &pwm1 { 518 434 pinctrl-names = "default"; 519 435 pinctrl-0 = <&pinctrl_pwm1>; 520 436 }; 521 437 438 + /* Colibri PWM<B> */ 522 439 &pwm2 { 523 440 pinctrl-names = "default"; 524 441 pinctrl-0 = <&pinctrl_pwm2>; 525 442 }; 526 443 444 + /* Colibri PWM<C> */ 527 445 &pwm3 { 528 446 pinctrl-names = "default"; 529 447 pinctrl-0 = <&pinctrl_pwm3>; 530 448 }; 531 449 450 + /* Colibri PWM<D> */ 532 451 &pwm4 { 533 452 pinctrl-names = "default"; 534 453 pinctrl-0 = <&pinctrl_pwm4>; 535 454 }; 536 455 537 456 &reg_1p0d { 538 - vin-supply = <&reg_DCDC3>; 457 + vin-supply = <&reg_DCDC3>; /* VDDA_1P8_IN */ 539 458 }; 540 459 541 460 &sai1 { ··· 577 430 status = "okay"; 578 431 }; 579 432 433 + /* Colibri UART_A */ 580 434 &uart1 { 581 - pinctrl-names = "default"; 582 - pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>; 583 435 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>; 584 436 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 585 - uart-has-rtscts; 586 437 fsl,dte-mode; 438 + pinctrl-names = "default"; 439 + pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>; 440 + uart-has-rtscts; 587 441 }; 588 442 443 + /* Colibri UART_B */ 589 444 &uart2 { 590 - pinctrl-names = "default"; 591 - pinctrl-0 = <&pinctrl_uart2>; 592 445 assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>; 593 446 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 594 - uart-has-rtscts; 595 447 fsl,dte-mode; 448 + pinctrl-names = "default"; 449 + pinctrl-0 = <&pinctrl_uart2>; 450 + uart-has-rtscts; 596 451 }; 597 452 453 + /* Colibri UART_C */ 598 454 &uart3 { 599 - pinctrl-names = "default"; 600 - pinctrl-0 = <&pinctrl_uart3>; 601 455 assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>; 602 456 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 603 457 fsl,dte-mode; 604 - }; 605 - 606 - &usbotg1 { 607 - dr_mode = "host"; 608 - }; 609 - 610 - &usdhc1 { 611 458 pinctrl-names = "default"; 612 - pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>; 459 + pinctrl-0 = <&pinctrl_uart3>; 460 + }; 461 + 462 + /* Colibri USBC */ 463 + &usbotg1 { 464 + dr_mode = "otg"; 465 + extcon = <0>, <&extcon_usbc_det>; 466 + }; 467 + 468 + /* Colibri MMC/SD */ 469 + &usdhc1 { 613 470 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 614 471 disable-wp; 472 + no-1-8-v; 473 + pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 474 + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_cd_usdhc1>; 475 + pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_cd_usdhc1>; 476 + pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_cd_usdhc1>; 477 + pinctrl-3 = <&pinctrl_usdhc1_sleep &pinctrl_cd_usdhc1_sleep>; 478 + vmmc-supply = <&reg_3v3>; 615 479 vqmmc-supply = <&reg_LDO2>; 480 + wakeup-source; 616 481 }; 617 482 483 + /* eMMC on 1GB (eMMC) SKUs */ 618 484 &usdhc3 { 619 - pinctrl-names = "default", "state_100mhz", "state_200mhz"; 620 - pinctrl-0 = <&pinctrl_usdhc3>; 621 - pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 622 - pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 623 485 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; 624 486 assigned-clock-rates = <400000000>; 625 487 bus-width = <8>; 626 488 fsl,tuning-step = <2>; 489 + non-removable; 490 + pinctrl-names = "default", "state_100mhz", "state_200mhz"; 491 + pinctrl-0 = <&pinctrl_usdhc3>; 492 + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 493 + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 494 + sdhci-caps-mask = <0x80000000 0x0>; 627 495 vmmc-supply = <&reg_module_3v3>; 628 496 vqmmc-supply = <&reg_DCDC3>; 629 - non-removable; 630 - sdhci-caps-mask = <0x80000000 0x0>; 631 497 }; 632 498 633 499 &iomuxc { 634 500 pinctrl-names = "default"; 635 - pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4 636 - &pinctrl_gpio7 &pinctrl_usbc_det>; 501 + pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4>; 637 502 638 - pinctrl_gpio1: gpio1-grp { 503 + /* 504 + * Atmel MXT touchsceen + Capacitive Touch Adapter 505 + * NOTE: This pin group conflicts with pin groups pinctrl_pwm2/pinctrl_pwm3. 506 + * Don't use them simultaneously. 507 + */ 508 + pinctrl_atmel_adapter: atmelconnectorgrp { 639 509 fsl,pins = < 640 - MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */ 641 - MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ 642 - MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ 643 - MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ 644 - MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ 645 - MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ 646 - MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */ 510 + MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x74 /* SODIMM 28 / INT */ 511 + MX7D_PAD_GPIO1_IO10__GPIO1_IO10 0x14 /* SODIMM 30 / RST */ 512 + >; 513 + }; 514 + 515 + /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector */ 516 + pinctrl_atmel_connector: atmeladaptergrp { 517 + fsl,pins = < 518 + MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x14 /* SODIMM 106 / RST */ 519 + MX7D_PAD_EPDC_DATA15__GPIO2_IO15 0x74 /* SODIMM 107 / INT */ 520 + >; 521 + }; 522 + 523 + pinctrl_can_int: canintgrp { 524 + fsl,pins = < 525 + MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ 526 + >; 527 + }; 528 + 529 + pinctrl_ecspi3: ecspi3grp { 530 + fsl,pins = < 531 + MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 /* SODIMM 90 */ 532 + MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 /* SODIMM 92 */ 533 + MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 /* SODIMM 88 */ 534 + >; 535 + }; 536 + 537 + pinctrl_ecspi3_cs: ecspi3csgrp { 538 + fsl,pins = < 539 + MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 /* SODIMM 86 */ 540 + >; 541 + }; 542 + 543 + pinctrl_enet1: enet1grp { 544 + fsl,pins = < 545 + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x73 546 + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x73 547 + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x73 548 + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73 549 + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x73 550 + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x73 551 + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73 552 + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x73 553 + MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 554 + MX7D_PAD_SD2_WP__ENET1_MDC 0x3 555 + >; 556 + }; 557 + 558 + pinctrl_enet1_sleep: enet1-sleepgrp { 559 + fsl,pins = < 560 + MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0 561 + MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0 562 + MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 0x0 563 + MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 0x0 564 + MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 0x0 565 + MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 0x0 566 + MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 0x0 567 + MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0 568 + MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x0 569 + MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 570 + >; 571 + }; 572 + 573 + pinctrl_flexcan1: flexcan1grp { 574 + fsl,pins = < 575 + MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */ 576 + MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */ 577 + >; 578 + }; 579 + 580 + pinctrl_flexcan2: flexcan2grp { 581 + fsl,pins = < 582 + MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */ 583 + MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */ 584 + >; 585 + }; 586 + 587 + pinctrl_gpio1: gpio1grp { 588 + fsl,pins = < 589 + MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */ 647 590 MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 /* SODIMM 111 */ 648 591 MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 /* SODIMM 113 */ 649 592 MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x14 /* SODIMM 115 */ ··· 742 505 MX7D_PAD_EPDC_DATA05__GPIO2_IO5 0x14 /* SODIMM 121 */ 743 506 MX7D_PAD_EPDC_DATA06__GPIO2_IO6 0x14 /* SODIMM 123 */ 744 507 MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x14 /* SODIMM 125 */ 745 - MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */ 746 - MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */ 508 + MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x74 /* SODIMM 91 */ 509 + MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x14 /* SODIMM 89 */ 510 + MX7D_PAD_EPDC_DATA10__GPIO2_IO10 0x74 /* SODIMM 105 */ 511 + MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x14 /* SODIMM 152 */ 512 + MX7D_PAD_EPDC_DATA12__GPIO2_IO12 0x14 /* SODIMM 150 */ 513 + MX7D_PAD_EPDC_DATA14__GPIO2_IO14 0x14 /* SODIMM 126 */ 514 + MX7D_PAD_EPDC_GDCLK__GPIO2_IO24 0x14 /* SODIMM 132 */ 515 + MX7D_PAD_EPDC_GDOE__GPIO2_IO25 0x14 /* SODIMM 134 */ 747 516 MX7D_PAD_EPDC_GDRL__GPIO2_IO26 0x14 /* SODIMM 133 */ 748 - MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 0x14 /* SODIMM 169 */ 749 - MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */ 750 - MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */ 751 - MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */ 752 517 MX7D_PAD_EPDC_GDSP__GPIO2_IO27 0x14 /* SODIMM 104 */ 753 - MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x14 /* SODIMM 110 */ 754 518 MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x14 /* SODIMM 112 */ 519 + MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x14 /* SODIMM 128 */ 520 + MX7D_PAD_EPDC_SDCE0__GPIO2_IO20 0x14 /* SODIMM 122 */ 521 + MX7D_PAD_EPDC_SDCE1__GPIO2_IO21 0x14 /* SODIMM 124 */ 522 + MX7D_PAD_EPDC_SDCE2__GPIO2_IO22 0x14 /* SODIMM 127 */ 523 + MX7D_PAD_EPDC_SDCE3__GPIO2_IO23 0x14 /* SODIMM 130 */ 755 524 MX7D_PAD_EPDC_SDCLK__GPIO2_IO16 0x14 /* SODIMM 114 */ 756 525 MX7D_PAD_EPDC_SDLE__GPIO2_IO17 0x14 /* SODIMM 116 */ 757 526 MX7D_PAD_EPDC_SDOE__GPIO2_IO18 0x14 /* SODIMM 118 */ 758 527 MX7D_PAD_EPDC_SDSHR__GPIO2_IO19 0x14 /* SODIMM 120 */ 759 - MX7D_PAD_EPDC_SDCE0__GPIO2_IO20 0x14 /* SODIMM 122 */ 760 - MX7D_PAD_EPDC_SDCE1__GPIO2_IO21 0x14 /* SODIMM 124 */ 761 - MX7D_PAD_EPDC_DATA14__GPIO2_IO14 0x14 /* SODIMM 126 */ 762 - MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x14 /* SODIMM 128 */ 763 - MX7D_PAD_EPDC_SDCE3__GPIO2_IO23 0x14 /* SODIMM 130 */ 764 - MX7D_PAD_EPDC_GDCLK__GPIO2_IO24 0x14 /* SODIMM 132 */ 765 - MX7D_PAD_EPDC_GDOE__GPIO2_IO25 0x14 /* SODIMM 134 */ 766 - MX7D_PAD_EPDC_DATA12__GPIO2_IO12 0x14 /* SODIMM 150 */ 767 - MX7D_PAD_EPDC_DATA11__GPIO2_IO11 0x14 /* SODIMM 152 */ 528 + MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 /* SODIMM 93 */ 529 + MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x14 /* SODIMM 24 */ 530 + MX7D_PAD_SAI1_RX_DATA__GPIO6_IO12 0x14 /* SODIMM 169 */ 531 + MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x14 /* SODIMM 77 */ 768 532 MX7D_PAD_SD2_CLK__GPIO5_IO12 0x14 /* SODIMM 184 */ 769 533 MX7D_PAD_SD2_CMD__GPIO5_IO13 0x14 /* SODIMM 186 */ 534 + MX7D_PAD_SD2_DATA2__GPIO5_IO16 0x14 /* SODIMM 100 */ 535 + MX7D_PAD_SD2_DATA3__GPIO5_IO17 0x14 /* SODIMM 102 */ 536 + MX7D_PAD_UART3_RTS_B__GPIO4_IO6 0x14 /* SODIMM 131 */ 770 537 >; 771 538 }; 772 539 773 - pinctrl_gpio2: gpio2-grp { /* On X22 Camera interface */ 540 + pinctrl_gpio2: gpio2grp { /* On X22 Camera interface */ 774 541 fsl,pins = < 775 - MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */ 776 - MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */ 777 - MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */ 778 542 MX7D_PAD_ECSPI1_MISO__GPIO4_IO18 0x14 /* SODIMM 79 */ 779 - MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */ 780 - MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x14 /* SODIMM 85 */ 781 - MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x14 /* SODIMM 97 */ 782 - MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x14 /* SODIMM 101 */ 783 543 MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17 0x14 /* SODIMM 103 */ 544 + MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x14 /* SODIMM 101 */ 545 + MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x14 /* SODIMM 97 */ 546 + MX7D_PAD_ECSPI2_MISO__GPIO4_IO22 0x14 /* SODIMM 85 */ 547 + MX7D_PAD_ECSPI2_SS0__GPIO4_IO23 0x14 /* SODIMM 65 */ 548 + MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x14 /* SODIMM 81 */ 784 549 MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x14 /* SODIMM 94 */ 785 550 MX7D_PAD_I2C4_SCL__GPIO4_IO14 0x14 /* SODIMM 96 */ 551 + MX7D_PAD_I2C4_SDA__GPIO4_IO15 0x14 /* SODIMM 75 */ 552 + MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x74 /* SODIMM 69 */ 786 553 MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 /* SODIMM 98 */ 787 554 >; 788 555 }; 789 556 790 - pinctrl_gpio3: gpio3-grp { /* LCD 18-23 */ 557 + pinctrl_gpio3: gpio3grp { /* LCD 18-23 */ 791 558 fsl,pins = < 792 559 MX7D_PAD_LCD_DATA18__GPIO3_IO23 0x14 /* SODIMM 136 */ 793 560 MX7D_PAD_LCD_DATA19__GPIO3_IO24 0x14 /* SODIMM 138 */ ··· 802 561 >; 803 562 }; 804 563 805 - pinctrl_gpio4: gpio4-grp { /* Alternatively CAN2 */ 564 + pinctrl_gpio4: gpio4grp { /* Alternatively CAN2 */ 806 565 fsl,pins = < 807 - MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */ 808 566 MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x14 /* SODIMM 188 */ 567 + MX7D_PAD_GPIO1_IO15__GPIO1_IO15 0x14 /* SODIMM 178 */ 809 568 >; 810 569 }; 811 570 812 - pinctrl_gpio7: gpio7-grp { /* Alternatively CAN1 */ 571 + pinctrl_gpio7: gpio7grp { /* Alternatively CAN1 */ 813 572 fsl,pins = < 814 - MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ 815 573 MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ 574 + MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x14 /* SODIMM 55 */ 816 575 >; 817 576 }; 818 577 819 - pinctrl_i2c1_int: i2c1-int-grp { /* PMIC / TOUCH */ 820 - fsl,pins = < 821 - MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79 822 - >; 823 - }; 824 - 825 - pinctrl_can_int: can-int-grp { 826 - fsl,pins = < 827 - MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0X14 /* SODIMM 73 */ 828 - >; 829 - }; 830 - 831 - pinctrl_enet1: enet1grp { 832 - fsl,pins = < 833 - MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x73 834 - MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x73 835 - MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x73 836 - MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x73 837 - 838 - MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x73 839 - MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x73 840 - MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x73 841 - MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x73 842 - MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 843 - MX7D_PAD_SD2_WP__ENET1_MDC 0x3 844 - >; 845 - }; 846 - 847 - pinctrl_enet1_sleep: enet1sleepgrp { 848 - fsl,pins = < 849 - MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 0x0 850 - MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0 851 - MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0 852 - MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 0x0 853 - 854 - MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 0x0 855 - MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 0x0 856 - MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 0x0 857 - MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0 858 - MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x0 859 - MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 860 - >; 861 - }; 862 - 863 - pinctrl_ecspi3_cs: ecspi3-cs-grp { 864 - fsl,pins = < 865 - MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 866 - >; 867 - }; 868 - 869 - pinctrl_ecspi3: ecspi3-grp { 870 - fsl,pins = < 871 - MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 872 - MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 873 - MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 874 - >; 875 - }; 876 - 877 - pinctrl_flexcan1: flexcan1-grp { 878 - fsl,pins = < 879 - MX7D_PAD_ENET1_RGMII_RD3__FLEXCAN1_TX 0x79 /* SODIMM 55 */ 880 - MX7D_PAD_ENET1_RGMII_RD2__FLEXCAN1_RX 0x79 /* SODIMM 63 */ 881 - >; 882 - }; 883 - 884 - pinctrl_flexcan2: flexcan2-grp { 885 - fsl,pins = < 886 - MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x79 /* SODIMM 188 */ 887 - MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x79 /* SODIMM 178 */ 888 - >; 889 - }; 890 - 891 - pinctrl_gpio_bl_on: gpio-bl-on { 578 + pinctrl_gpio_bl_on: gpioblongrp { 892 579 fsl,pins = < 893 580 MX7D_PAD_SD1_WP__GPIO5_IO1 0x14 /* SODIMM 71 */ 894 581 >; 895 582 }; 896 583 897 - pinctrl_gpmi_nand: gpmi-nand-grp { 584 + pinctrl_gpmi_nand: gpminandgrp { 898 585 fsl,pins = < 899 - MX7D_PAD_SD3_CLK__NAND_CLE 0x71 900 - MX7D_PAD_SD3_CMD__NAND_ALE 0x71 901 586 MX7D_PAD_SAI1_TX_BCLK__NAND_CE0_B 0x71 902 587 MX7D_PAD_SAI1_TX_DATA__NAND_READY_B 0x74 903 - MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 904 - MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 588 + MX7D_PAD_SD3_CLK__NAND_CLE 0x71 589 + MX7D_PAD_SD3_CMD__NAND_ALE 0x71 905 590 MX7D_PAD_SD3_DATA0__NAND_DATA00 0x71 906 591 MX7D_PAD_SD3_DATA1__NAND_DATA01 0x71 907 592 MX7D_PAD_SD3_DATA2__NAND_DATA02 0x71 ··· 836 669 MX7D_PAD_SD3_DATA5__NAND_DATA05 0x71 837 670 MX7D_PAD_SD3_DATA6__NAND_DATA06 0x71 838 671 MX7D_PAD_SD3_DATA7__NAND_DATA07 0x71 672 + MX7D_PAD_SD3_RESET_B__NAND_WE_B 0x71 673 + MX7D_PAD_SD3_STROBE__NAND_RE_B 0x71 839 674 >; 840 675 }; 841 676 842 - pinctrl_i2c4: i2c4-grp { 677 + pinctrl_i2c1_int: i2c1intgrp { /* PMIC / TOUCH */ 843 678 fsl,pins = < 844 - MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f 845 - MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f 679 + MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x79 680 + >; 681 + }; 682 + 683 + pinctrl_i2c4: i2c4grp { 684 + fsl,pins = < 685 + MX7D_PAD_ENET1_RGMII_TD2__I2C4_SCL 0x4000007f /* SODIMM 196 */ 686 + MX7D_PAD_ENET1_RGMII_TD3__I2C4_SDA 0x4000007f /* SODIMM 194 */ 846 687 >; 847 688 }; 848 689 ··· 861 686 >; 862 687 }; 863 688 864 - pinctrl_lcdif_dat: lcdif-dat-grp { 689 + pinctrl_lcdif_dat: lcdifdatgrp { 865 690 fsl,pins = < 866 - MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 867 - MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 868 - MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 869 - MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 870 - MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 871 - MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 872 - MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 873 - MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 874 - MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 875 - MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 876 - MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 877 - MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 878 - MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 879 - MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 880 - MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 881 - MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 882 - MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 883 - MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 691 + MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 /* SODIMM 76 */ 692 + MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 /* SODIMM 70 */ 693 + MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 /* SODIMM 60 */ 694 + MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 /* SODIMM 58 */ 695 + MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 /* SODIMM 78 */ 696 + MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 /* SODIMM 72 */ 697 + MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 /* SODIMM 80 */ 698 + MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 /* SODIMM 46 */ 699 + MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 /* SODIMM 62 */ 700 + MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 /* SODIMM 48 */ 701 + MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 /* SODIMM 74 */ 702 + MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 /* SODIMM 50 */ 703 + MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 /* SODIMM 52 */ 704 + MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 /* SODIMM 54 */ 705 + MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 /* SODIMM 66 */ 706 + MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 /* SODIMM 64 */ 707 + MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 /* SODIMM 57 */ 708 + MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 /* SODIMM 61 */ 884 709 >; 885 710 }; 886 711 887 - pinctrl_lcdif_dat_24: lcdif-dat-24-grp { 712 + pinctrl_lcdif_dat_24: lcdifdat24grp { 888 713 fsl,pins = < 889 - MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 890 - MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 891 - MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 892 - MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 893 - MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 894 - MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 714 + MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 /* SODIMM 136 */ 715 + MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 /* SODIMM 138 */ 716 + MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 /* SODIMM 140 */ 717 + MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 /* SODIMM 142 */ 718 + MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 /* SODIMM 144 */ 719 + MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 /* SODIMM 146 */ 895 720 >; 896 721 }; 897 722 898 - pinctrl_lcdif_ctrl: lcdif-ctrl-grp { 723 + pinctrl_lcdif_ctrl: lcdifctrlgrp { 899 724 fsl,pins = < 900 - MX7D_PAD_LCD_CLK__LCD_CLK 0x79 901 - MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 902 - MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 903 - MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 725 + MX7D_PAD_LCD_CLK__LCD_CLK 0x79 /* SODIMM 56 */ 726 + MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79 /* SODIMM 44 */ 727 + MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79 /* SODIMM 68 */ 728 + MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79 /* SODIMM 82 */ 904 729 >; 905 730 }; 906 731 907 - pinctrl_pwm1: pwm1-grp { 732 + pinctrl_lvds_transceiver: lvdstx { 908 733 fsl,pins = < 909 - MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 910 - MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 734 + MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2 0x14 /* SODIMM 63 */ 735 + MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3 0x74 /* SODIMM 55 */ 736 + MX7D_PAD_ENET1_RGMII_TXC__GPIO7_IO11 0x14 /* SODIMM 99 */ 737 + MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 /* SODIMM 95 */ 911 738 >; 912 739 }; 913 740 914 - pinctrl_pwm2: pwm2-grp { 741 + pinctrl_pwm1: pwm1grp { 915 742 fsl,pins = < 916 - MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 743 + MX7D_PAD_ECSPI2_MOSI__GPIO4_IO21 0x4 /* SODIMM 59 */ 744 + MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x79 /* SODIMM 59 */ 917 745 >; 918 746 }; 919 747 920 - pinctrl_pwm3: pwm3-grp { 748 + pinctrl_pwm2: pwm2grp { 921 749 fsl,pins = < 922 - MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 750 + MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x79 /* SODIMM 28 */ 923 751 >; 924 752 }; 925 753 926 - pinctrl_pwm4: pwm4-grp { 754 + pinctrl_pwm3: pwm3grp { 927 755 fsl,pins = < 928 - MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 929 - MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 756 + MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x79 /* SODIMM 30 */ 930 757 >; 931 758 }; 932 759 933 - pinctrl_uart1: uart1-grp { 760 + pinctrl_pwm4: pwm4grp { 934 761 fsl,pins = < 935 - MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 936 - MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 937 - MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 938 - MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 762 + MX7D_PAD_ECSPI2_SCLK__GPIO4_IO20 0x4 /* SODIMM 67 */ 763 + MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x79 /* SODIMM 67 */ 939 764 >; 940 765 }; 941 766 942 - pinctrl_uart1_ctrl1: uart1-ctrl1-grp { 767 + pinctrl_uart1: uart1grp { 943 768 fsl,pins = < 944 - MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* DCD */ 945 - MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* DTR */ 769 + MX7D_PAD_SAI2_TX_BCLK__UART1_DTE_CTS 0x79 /* SODIMM 25 */ 770 + MX7D_PAD_SAI2_TX_SYNC__UART1_DTE_RTS 0x79 /* SODIMM 27 */ 771 + MX7D_PAD_UART1_RX_DATA__UART1_DTE_TX 0x79 /* SODIMM 35 */ 772 + MX7D_PAD_UART1_TX_DATA__UART1_DTE_RX 0x79 /* SODIMM 33 */ 946 773 >; 947 774 }; 948 775 949 - pinctrl_uart2: uart2-grp { 776 + pinctrl_uart1_ctrl1: uart1ctrl1grp { 950 777 fsl,pins = < 951 - MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 952 - MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 953 - MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 954 - MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 955 - >; 956 - }; 957 - pinctrl_uart3: uart3-grp { 958 - fsl,pins = < 959 - MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 960 - MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 778 + MX7D_PAD_SD2_DATA0__GPIO5_IO14 0x14 /* SODIMM 23 / DTR */ 779 + MX7D_PAD_SD2_DATA1__GPIO5_IO15 0x14 /* SODIMM 31 / DCD */ 961 780 >; 962 781 }; 963 782 964 - pinctrl_usbc_det: gpio-usbc-det { 783 + pinctrl_uart2: uart2grp { 965 784 fsl,pins = < 966 - MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 785 + MX7D_PAD_SAI2_RX_DATA__UART2_DTE_RTS 0x79 /* SODIMM 32 / CTS */ 786 + MX7D_PAD_SAI2_TX_DATA__UART2_DTE_CTS 0x79 /* SODIMM 34 / RTS */ 787 + MX7D_PAD_UART2_RX_DATA__UART2_DTE_TX 0x79 /* SODIMM 38 */ 788 + MX7D_PAD_UART2_TX_DATA__UART2_DTE_RX 0x79 /* SODIMM 36 */ 789 + >; 790 + }; 791 + pinctrl_uart3: uart3grp { 792 + fsl,pins = < 793 + MX7D_PAD_UART3_RX_DATA__UART3_DTE_TX 0x79 /* SODIMM 21 */ 794 + MX7D_PAD_UART3_TX_DATA__UART3_DTE_RX 0x79 /* SODIMM 19 */ 967 795 >; 968 796 }; 969 797 970 - pinctrl_usbh_reg: gpio-usbh-vbus { 798 + pinctrl_usbc_det: usbcdetgrp { 971 799 fsl,pins = < 972 - MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 USBH PEN */ 800 + MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x14 /* SODIMM 137 / USBC_DET */ 973 801 >; 974 802 }; 975 803 976 - pinctrl_usdhc1: usdhc1-grp { 804 + pinctrl_usbh_reg: usbhreggrp { 977 805 fsl,pins = < 978 - MX7D_PAD_SD1_CMD__SD1_CMD 0x59 979 - MX7D_PAD_SD1_CLK__SD1_CLK 0x19 980 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 981 - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 982 - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 983 - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 806 + MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14 /* SODIMM 129 / USBH_PEN */ 984 807 >; 985 808 }; 986 809 987 - pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { 810 + pinctrl_usdhc1: usdhc1grp { 988 811 fsl,pins = < 989 - MX7D_PAD_SD1_CMD__SD1_CMD 0x5a 990 - MX7D_PAD_SD1_CLK__SD1_CLK 0x1a 991 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a 992 - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a 993 - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a 994 - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a 812 + MX7D_PAD_SD1_CLK__SD1_CLK 0x19 /* SODIMM 47 */ 813 + MX7D_PAD_SD1_CMD__SD1_CMD 0x59 /* SODIMM 190 */ 814 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 /* SODIMM 192 */ 815 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 /* SODIMM 49 */ 816 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 /* SODIMM 51 */ 817 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 /* SODIMM 53 */ 995 818 >; 996 819 }; 997 820 998 - pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { 821 + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 999 822 fsl,pins = < 1000 - MX7D_PAD_SD1_CMD__SD1_CMD 0x5b 1001 - MX7D_PAD_SD1_CLK__SD1_CLK 0x1b 1002 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b 1003 - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b 1004 - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b 1005 - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b 823 + MX7D_PAD_SD1_CLK__SD1_CLK 0x1a 824 + MX7D_PAD_SD1_CMD__SD1_CMD 0x5a 825 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a 826 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a 827 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a 828 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a 829 + >; 830 + }; 831 + 832 + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 833 + fsl,pins = < 834 + MX7D_PAD_SD1_CLK__SD1_CLK 0x1b 835 + MX7D_PAD_SD1_CMD__SD1_CMD 0x5b 836 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b 837 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b 838 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b 839 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b 840 + >; 841 + }; 842 + 843 + /* Avoid backfeeding with removed card power. */ 844 + pinctrl_usdhc1_sleep: usdhc1-slpgrp { 845 + fsl,pins = < 846 + MX7D_PAD_SD1_CMD__SD1_CMD 0x10 847 + MX7D_PAD_SD1_CLK__SD1_CLK 0x10 848 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x10 849 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x10 850 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x10 851 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x10 1006 852 >; 1007 853 }; 1008 854 1009 855 pinctrl_usdhc3: usdhc3grp { 1010 856 fsl,pins = < 1011 - MX7D_PAD_SD3_CMD__SD3_CMD 0x59 1012 857 MX7D_PAD_SD3_CLK__SD3_CLK 0x19 858 + MX7D_PAD_SD3_CMD__SD3_CMD 0x59 1013 859 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 1014 860 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 1015 861 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 ··· 1043 847 >; 1044 848 }; 1045 849 1046 - pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { 850 + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { 1047 851 fsl,pins = < 1048 - MX7D_PAD_SD3_CMD__SD3_CMD 0x5a 1049 852 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a 853 + MX7D_PAD_SD3_CMD__SD3_CMD 0x5a 1050 854 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a 1051 855 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a 1052 856 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a ··· 1059 863 >; 1060 864 }; 1061 865 1062 - pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { 866 + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { 1063 867 fsl,pins = < 1064 - MX7D_PAD_SD3_CMD__SD3_CMD 0x5b 1065 868 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b 869 + MX7D_PAD_SD3_CMD__SD3_CMD 0x5b 1066 870 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b 1067 871 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b 1068 872 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b ··· 1075 879 >; 1076 880 }; 1077 881 1078 - pinctrl_sai1: sai1-grp { 882 + pinctrl_sai1: sai1grp { 1079 883 fsl,pins = < 1080 - MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f 1081 - MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f 1082 884 MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30 885 + MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f 1083 886 MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f 887 + MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x1f 1084 888 >; 1085 889 }; 1086 890 1087 - pinctrl_sai1_mclk: sai1grp_mclk { 891 + pinctrl_sai1_mclk: sai1mclkgrp { 1088 892 fsl,pins = < 1089 893 MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x1f 1090 894 >; ··· 1095 899 pinctrl-names = "default"; 1096 900 pinctrl-0 = <&pinctrl_gpio_lpsr>; 1097 901 1098 - pinctrl_gpio_lpsr: gpio1-grp { 902 + pinctrl_cd_usdhc1: cdusdhc1grp { 1099 903 fsl,pins = < 1100 - MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 1101 - MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 904 + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* SODIMM 43 / MMC_CD */ 905 + >; 906 + }; 907 + 908 + pinctrl_cd_usdhc1_sleep: cdusdhc1-slpgrp { 909 + fsl,pins = < 910 + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 911 + >; 912 + }; 913 + 914 + pinctrl_gpio_lpsr: gpiolpsrgrp { 915 + fsl,pins = < 916 + MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x59 /* SODIMM 135 */ 917 + MX7D_PAD_LPSR_GPIO1_IO03__GPIO1_IO3 0x59 /* SODIMM 22 */ 1102 918 >; 1103 919 }; 1104 920 1105 921 pinctrl_gpiokeys: gpiokeysgrp { 1106 922 fsl,pins = < 1107 - MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 923 + MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x19 /* SODIMM 45 / WAKE_UP */ 1108 924 >; 1109 925 }; 1110 926 1111 - pinctrl_i2c1: i2c1-grp { 927 + pinctrl_i2c1: i2c1grp { 1112 928 fsl,pins = < 1113 - MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f 1114 929 MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x4000007f 930 + MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x4000007f 1115 931 >; 1116 932 }; 1117 933 ··· 1134 926 >; 1135 927 }; 1136 928 1137 - pinctrl_cd_usdhc1: usdhc1-cd-grp { 929 + pinctrl_uart1_ctrl2: uart1ctrl2grp { 1138 930 fsl,pins = < 1139 - MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x59 /* CD */ 1140 - >; 1141 - }; 1142 - 1143 - pinctrl_uart1_ctrl2: uart1-ctrl2-grp { 1144 - fsl,pins = < 1145 - MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* DSR */ 1146 - MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* RI */ 931 + MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* SODIMM 37 / RI */ 932 + MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 /* SODIMM 29 / DSR */ 1147 933 >; 1148 934 }; 1149 935 };
+25 -5
arch/arm/boot/dts/imx7d-colibri-aster.dts
··· 1 - // SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2017-2020 Toradex AG 4 - * 3 + * Copyright 2017-2022 Toradex 5 4 */ 6 5 7 6 /dts-v1/; ··· 9 10 10 11 / { 11 12 model = "Toradex Colibri iMX7D on Aster Carrier Board"; 12 - compatible = "toradex,colibri-imx7d-aster", "toradex,colibri-imx7d", 13 + compatible = "toradex,colibri-imx7d-aster", 14 + "toradex,colibri-imx7d", 13 15 "fsl,imx7d"; 14 16 }; 15 17 18 + &ad7879_ts { 19 + status = "okay"; 20 + }; 21 + 22 + &atmel_mxt_ts { 23 + status = "okay"; 24 + }; 25 + 26 + &backlight { 27 + status = "okay"; 28 + }; 29 + 30 + &lcdif { 31 + status = "okay"; 32 + }; 33 + 34 + &panel_dpi { 35 + status = "okay"; 36 + }; 37 + 38 + /* Colibri USBH */ 16 39 &usbotg2 { 17 - vbus-supply = <&reg_usbh_vbus>; 18 40 status = "okay"; 19 41 };
+6 -4
arch/arm/boot/dts/imx7d-colibri-emmc-aster.dts
··· 1 - // SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2017-2020 Toradex AG 3 + * Copyright 2017-2022 Toradex 4 4 * 5 5 */ 6 6 ··· 11 11 / { 12 12 model = "Toradex Colibri iMX7D 1GB (eMMC) on Aster Carrier Board"; 13 13 compatible = "toradex,colibri-imx7d-emmc-aster", 14 - "toradex,colibri-imx7d-emmc", "fsl,imx7d"; 14 + "toradex,colibri-imx7d-emmc", 15 + "toradex,colibri-imx7d", 16 + "fsl,imx7d"; 15 17 }; 16 18 19 + /* Colibri USBH */ 17 20 &usbotg2 { 18 - vbus-supply = <&reg_usbh_vbus>; 19 21 status = "okay"; 20 22 };
+6 -4
arch/arm/boot/dts/imx7d-colibri-emmc-eval-v3.dts
··· 1 - // SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2017 Toradex AG 3 + * Copyright 2017-2022 Toradex 4 4 */ 5 5 6 6 /dts-v1/; ··· 10 10 / { 11 11 model = "Toradex Colibri iMX7D 1GB (eMMC) on Colibri Evaluation Board V3"; 12 12 compatible = "toradex,colibri-imx7d-emmc-eval-v3", 13 - "toradex,colibri-imx7d-emmc", "fsl,imx7d"; 13 + "toradex,colibri-imx7d-emmc", 14 + "toradex,colibri-imx7d", 15 + "fsl,imx7d"; 14 16 }; 15 17 18 + /* Colibri USBH */ 16 19 &usbotg2 { 17 - vbus-supply = <&reg_usbh_vbus>; 18 20 status = "okay"; 19 21 };
+21
arch/arm/boot/dts/imx7d-colibri-emmc-iris-v2.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright 2022 Toradex 4 + */ 5 + 6 + /dts-v1/; 7 + #include "imx7d-colibri-emmc.dtsi" 8 + #include "imx7-colibri-iris-v2.dtsi" 9 + 10 + / { 11 + model = "Toradex Colibri iMX7D 1GB on Iris V2 Carrier Board"; 12 + compatible = "toradex,colibri-imx7d-emmc-iris-v2", 13 + "toradex,colibri-imx7d-emmc", 14 + "toradex,colibri-imx7d", 15 + "fsl,imx7d"; 16 + }; 17 + 18 + /* Colibri USBH */ 19 + &usbotg2 { 20 + status = "okay"; 21 + };
+21
arch/arm/boot/dts/imx7d-colibri-emmc-iris.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright 2022 Toradex 4 + */ 5 + 6 + /dts-v1/; 7 + #include "imx7d-colibri-emmc.dtsi" 8 + #include "imx7-colibri-iris.dtsi" 9 + 10 + / { 11 + model = "Toradex Colibri iMX7D 1GB on Iris Carrier Board"; 12 + compatible = "toradex,colibri-imx7d-emmc-iris", 13 + "toradex,colibri-imx7d-emmc", 14 + "toradex,colibri-imx7d", 15 + "fsl,imx7d"; 16 + }; 17 + 18 + /* Colibri USBH */ 19 + &usbotg2 { 20 + status = "okay"; 21 + };
+15 -2
arch/arm/boot/dts/imx7d-colibri-emmc.dtsi
··· 1 - // SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2017 Toradex AG 3 + * Copyright 2017-2022 Toradex 4 4 */ 5 5 6 6 #include "imx7d.dtsi" 7 7 #include "imx7-colibri.dtsi" 8 8 9 9 / { 10 + aliases { 11 + /* Required to properly pass MAC addresses from bootloader. */ 12 + ethernet0 = &fec1; 13 + ethernet1 = &fec2; 14 + }; 15 + 10 16 memory@80000000 { 11 17 device_type = "memory"; 12 18 reg = <0x80000000 0x40000000>; 13 19 }; 20 + }; 21 + 22 + &cpu1 { 23 + cpu-supply = <&reg_DCDC2>; 14 24 }; 15 25 16 26 &gpio6 { ··· 49 39 "SODIMM_34"; 50 40 }; 51 41 42 + /* Colibri USBH */ 52 43 &usbotg2 { 53 44 dr_mode = "host"; 45 + vbus-supply = <&reg_usbh_vbus>; 54 46 }; 55 47 48 + /* eMMC */ 56 49 &usdhc3 { 57 50 status = "okay"; 58 51 };
+41 -4
arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
··· 1 - // SPDX-License-Identifier: GPL-2.0+ OR MIT 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2016-2020 Toradex 3 + * Copyright 2016-2022 Toradex 4 4 */ 5 5 6 6 /dts-v1/; ··· 9 9 10 10 / { 11 11 model = "Toradex Colibri iMX7D on Colibri Evaluation Board V3"; 12 - compatible = "toradex,colibri-imx7d-eval-v3", "toradex,colibri-imx7d", 12 + compatible = "toradex,colibri-imx7d-eval-v3", 13 + "toradex,colibri-imx7d", 13 14 "fsl,imx7d"; 14 15 }; 15 16 17 + &ad7879_ts { 18 + status = "okay"; 19 + }; 20 + 21 + /* 22 + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3. 23 + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. 24 + */ 25 + &atmel_mxt_ts { 26 + status = "disabled"; 27 + }; 28 + 29 + &backlight { 30 + status = "okay"; 31 + }; 32 + 33 + &lcdif { 34 + status = "okay"; 35 + }; 36 + 37 + &panel_dpi { 38 + status = "okay"; 39 + }; 40 + 41 + /* Colibri PWM<B> */ 42 + &pwm2 { 43 + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 44 + status = "okay"; 45 + }; 46 + 47 + /* Colibri PWM<C> */ 48 + &pwm3 { 49 + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 50 + status = "okay"; 51 + }; 52 + 53 + /* Colibri USBH */ 16 54 &usbotg2 { 17 - vbus-supply = <&reg_usbh_vbus>; 18 55 status = "okay"; 19 56 };
+83
arch/arm/boot/dts/imx7d-colibri-iris-v2.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright 2022 Toradex 4 + */ 5 + 6 + /dts-v1/; 7 + #include "imx7d-colibri.dtsi" 8 + #include "imx7-colibri-iris-v2.dtsi" 9 + 10 + / { 11 + model = "Toradex Colibri iMX7D on Iris V2 Carrier Board"; 12 + compatible = "toradex,colibri-imx7d-iris-v2", 13 + "toradex,colibri-imx7d", 14 + "fsl,imx7d"; 15 + }; 16 + 17 + &ad7879_ts { 18 + status = "okay"; 19 + }; 20 + 21 + &atmel_mxt_ts { 22 + status = "okay"; 23 + }; 24 + 25 + &backlight { 26 + status = "okay"; 27 + }; 28 + 29 + &gpio2 { 30 + /* 31 + * This switches the LVDS transceiver to VESA color mapping mode. 32 + */ 33 + lvds-color-map-hog { 34 + gpio-hog; 35 + gpios = <13 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */ 36 + line-name = "LVDS_COLOR_MAP"; 37 + output-low; 38 + }; 39 + }; 40 + 41 + &gpio7 { 42 + /* 43 + * This switches the LVDS transceiver to the 24-bit RGB mode. 44 + */ 45 + lvds-rgb-mode-hog { 46 + gpio-hog; 47 + gpios = <2 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */ 48 + line-name = "LVDS_RGB_MODE"; 49 + output-low; 50 + }; 51 + 52 + /* 53 + * This switches the LVDS transceiver to the single-channel 54 + * output mode. 55 + */ 56 + lvds-ch-mode-hog { 57 + gpio-hog; 58 + gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */ 59 + line-name = "LVDS_CH_MODE"; 60 + output-high; 61 + }; 62 + 63 + /* This turns the LVDS transceiver on */ 64 + lvds-power-on-hog { 65 + gpio-hog; 66 + gpios = <11 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */ 67 + line-name = "LVDS_POWER_ON"; 68 + output-high; 69 + }; 70 + }; 71 + 72 + &lcdif { 73 + status = "okay"; 74 + }; 75 + 76 + &panel_dpi { 77 + status = "okay"; 78 + }; 79 + 80 + /* Colibri USBH */ 81 + &usbotg2 { 82 + status = "okay"; 83 + };
+56
arch/arm/boot/dts/imx7d-colibri-iris.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright 2022 Toradex 4 + */ 5 + 6 + /dts-v1/; 7 + #include "imx7d-colibri.dtsi" 8 + #include "imx7-colibri-iris.dtsi" 9 + 10 + / { 11 + model = "Toradex Colibri iMX7D on Iris Carrier Board"; 12 + compatible = "toradex,colibri-imx7d-iris", 13 + "toradex,colibri-imx7d", 14 + "fsl,imx7d"; 15 + }; 16 + 17 + &ad7879_ts { 18 + status = "okay"; 19 + }; 20 + 21 + /* 22 + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3. 23 + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. 24 + */ 25 + &atmel_mxt_ts { 26 + status = "disabled"; 27 + }; 28 + 29 + &backlight { 30 + status = "okay"; 31 + }; 32 + 33 + &lcdif { 34 + status = "okay"; 35 + }; 36 + 37 + &panel_dpi { 38 + status = "okay"; 39 + }; 40 + 41 + /* Colibri PWM<B> */ 42 + &pwm2 { 43 + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 44 + status = "okay"; 45 + }; 46 + 47 + /* Colibri PWM<C> */ 48 + &pwm3 { 49 + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 50 + status = "okay"; 51 + }; 52 + 53 + /* Colibri USBH */ 54 + &usbotg2 { 55 + status = "okay"; 56 + };
+11 -2
arch/arm/boot/dts/imx7d-colibri.dtsi
··· 1 - // SPDX-License-Identifier: GPL-2.0+ OR MIT 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2016-2020 Toradex 3 + * Copyright 2016-2022 Toradex 4 4 */ 5 5 6 6 #include "imx7d.dtsi" 7 7 #include "imx7-colibri.dtsi" 8 8 9 9 / { 10 + aliases { 11 + /* Required to properly pass MAC addresses from bootloader. */ 12 + ethernet0 = &fec1; 13 + ethernet1 = &fec2; 14 + }; 15 + 10 16 memory@80000000 { 11 17 device_type = "memory"; 12 18 reg = <0x80000000 0x20000000>; ··· 23 17 cpu-supply = <&reg_DCDC2>; 24 18 }; 25 19 20 + /* NAND */ 26 21 &gpmi { 27 22 status = "okay"; 28 23 }; 29 24 25 + /* Colibri USBH */ 30 26 &usbotg2 { 31 27 dr_mode = "host"; 28 + vbus-supply = <&reg_usbh_vbus>; 32 29 };
+1 -1
arch/arm/boot/dts/imx7d-sdb.dts
··· 201 201 compatible = "ti,tsc2046"; 202 202 reg = <0>; 203 203 spi-max-frequency = <1000000>; 204 - pinctrl-names ="default"; 204 + pinctrl-names = "default"; 205 205 pinctrl-0 = <&pinctrl_tsc2046_pendown>; 206 206 interrupt-parent = <&gpio2>; 207 207 interrupts = <29 0>;
+2 -2
arch/arm/boot/dts/imx7d-smegw01.dts
··· 207 207 pinctrl-0 = <&pinctrl_usdhc1>; 208 208 cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 209 209 no-1-8-v; 210 - enable-sdio-wakeup; 210 + wakeup-source; 211 211 keep-power-in-suspend; 212 212 status = "okay"; 213 213 }; ··· 221 221 sd-uhs-ddr50; 222 222 mmc-ddr-1_8v; 223 223 vmmc-supply = <&reg_wifi>; 224 - enable-sdio-wakeup; 224 + wakeup-source; 225 225 status = "okay"; 226 226 }; 227 227
+1 -1
arch/arm/boot/dts/imx7d.dtsi
··· 78 78 #phy-cells = <0>; 79 79 }; 80 80 81 - soc { 81 + soc: soc { 82 82 etm@3007d000 { 83 83 compatible = "arm,coresight-etm3x", "arm,primecell"; 84 84 reg = <0x3007d000 0x1000>;
+24 -3
arch/arm/boot/dts/imx7s-colibri-aster.dts
··· 1 - // SPDX-License-Identifier: (GPL-2.0 OR MIT) 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2017-2020 Toradex AG 3 + * Copyright 2017-2022 Toradex 4 4 * 5 5 */ 6 6 ··· 10 10 11 11 / { 12 12 model = "Toradex Colibri iMX7S on Aster Carrier Board"; 13 - compatible = "toradex,colibri-imx7s-aster", "toradex,colibri-imx7s", 13 + compatible = "toradex,colibri-imx7s-aster", 14 + "toradex,colibri-imx7s", 14 15 "fsl,imx7s"; 16 + }; 17 + 18 + &ad7879_ts { 19 + status = "okay"; 20 + }; 21 + 22 + &atmel_mxt_ts { 23 + status = "okay"; 24 + }; 25 + 26 + &backlight { 27 + status = "okay"; 28 + }; 29 + 30 + &lcdif { 31 + status = "okay"; 32 + }; 33 + 34 + &panel_dpi { 35 + status = "okay"; 15 36 };
+40 -3
arch/arm/boot/dts/imx7s-colibri-eval-v3.dts
··· 1 - // SPDX-License-Identifier: GPL-2.0+ OR MIT 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2016-2020 Toradex 3 + * Copyright 2016-2022 Toradex 4 4 */ 5 5 6 6 /dts-v1/; ··· 9 9 10 10 / { 11 11 model = "Toradex Colibri iMX7S on Colibri Evaluation Board V3"; 12 - compatible = "toradex,colibri-imx7s-eval-v3", "toradex,colibri-imx7s", 12 + compatible = "toradex,colibri-imx7s-eval-v3", 13 + "toradex,colibri-imx7s", 13 14 "fsl,imx7s"; 15 + }; 16 + 17 + &ad7879_ts { 18 + status = "okay"; 19 + }; 20 + 21 + /* 22 + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3. 23 + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. 24 + */ 25 + &atmel_mxt_ts { 26 + status = "disabled"; 27 + }; 28 + 29 + &backlight { 30 + status = "okay"; 31 + }; 32 + 33 + &lcdif { 34 + status = "okay"; 35 + }; 36 + 37 + &panel_dpi { 38 + status = "okay"; 39 + }; 40 + 41 + /* Colibri PWM<B> */ 42 + &pwm2 { 43 + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 44 + status = "okay"; 45 + }; 46 + 47 + /* Colibri PWM<C> */ 48 + &pwm3 { 49 + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 50 + status = "okay"; 14 51 };
+78
arch/arm/boot/dts/imx7s-colibri-iris-v2.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright 2022 Toradex 4 + */ 5 + 6 + /dts-v1/; 7 + #include "imx7s-colibri.dtsi" 8 + #include "imx7-colibri-iris-v2.dtsi" 9 + 10 + / { 11 + model = "Toradex Colibri iMX7S on Iris V2 Carrier Board"; 12 + compatible = "toradex,colibri-imx7s-iris-v2", 13 + "toradex,colibri-imx7s", 14 + "fsl,imx7s"; 15 + }; 16 + 17 + &ad7879_ts { 18 + status = "okay"; 19 + }; 20 + 21 + &atmel_mxt_ts { 22 + status = "okay"; 23 + }; 24 + 25 + &backlight { 26 + status = "okay"; 27 + }; 28 + 29 + &gpio2 { 30 + /* 31 + * This switches the LVDS transceiver to VESA color mapping mode. 32 + */ 33 + lvds-color-map-hog { 34 + gpio-hog; 35 + gpios = <13 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */ 36 + line-name = "LVDS_COLOR_MAP"; 37 + output-low; 38 + }; 39 + }; 40 + 41 + &gpio7 { 42 + /* 43 + * This switches the LVDS transceiver to the 24-bit RGB mode. 44 + */ 45 + lvds-rgb-mode-hog { 46 + gpio-hog; 47 + gpios = <2 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */ 48 + line-name = "LVDS_RGB_MODE"; 49 + output-low; 50 + }; 51 + 52 + /* 53 + * This switches the LVDS transceiver to the single-channel 54 + * output mode. 55 + */ 56 + lvds-ch-mode-hog { 57 + gpio-hog; 58 + gpios = <3 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */ 59 + line-name = "LVDS_CH_MODE"; 60 + output-high; 61 + }; 62 + 63 + /* This turns the LVDS transceiver on */ 64 + lvds-power-on-hog { 65 + gpio-hog; 66 + gpios = <11 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */ 67 + line-name = "LVDS_POWER_ON"; 68 + output-high; 69 + }; 70 + }; 71 + 72 + &lcdif { 73 + status = "okay"; 74 + }; 75 + 76 + &panel_dpi { 77 + status = "okay"; 78 + };
+51
arch/arm/boot/dts/imx7s-colibri-iris.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 + /* 3 + * Copyright 2022 Toradex 4 + */ 5 + 6 + /dts-v1/; 7 + #include "imx7s-colibri.dtsi" 8 + #include "imx7-colibri-iris.dtsi" 9 + 10 + / { 11 + model = "Toradex Colibri iMX7S on Iris Carrier Board"; 12 + compatible = "toradex,colibri-imx7s-iris", 13 + "toradex,colibri-imx7s", 14 + "fsl,imx7s"; 15 + }; 16 + 17 + &ad7879_ts { 18 + status = "okay"; 19 + }; 20 + 21 + /* 22 + * The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3. 23 + * So if you enable following capacitive touch controller, disable pwm2/pwm3 first. 24 + */ 25 + &atmel_mxt_ts { 26 + status = "disabled"; 27 + }; 28 + 29 + &backlight { 30 + status = "okay"; 31 + }; 32 + 33 + &lcdif { 34 + status = "okay"; 35 + }; 36 + 37 + &panel_dpi { 38 + status = "okay"; 39 + }; 40 + 41 + /* Colibri PWM<B> */ 42 + &pwm2 { 43 + /* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 44 + status = "okay"; 45 + }; 46 + 47 + /* Colibri PWM<C> */ 48 + &pwm3 { 49 + /* The pwm3 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */ 50 + status = "okay"; 51 + };
+3 -2
arch/arm/boot/dts/imx7s-colibri.dtsi
··· 1 - // SPDX-License-Identifier: GPL-2.0+ OR MIT 1 + // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 2 /* 3 - * Copyright 2016-2020 Toradex 3 + * Copyright 2016-2022 Toradex 4 4 */ 5 5 6 6 #include "imx7s.dtsi" ··· 13 13 }; 14 14 }; 15 15 16 + /* NAND */ 16 17 &gpmi { 17 18 status = "okay"; 18 19 };
+1 -1
arch/arm/boot/dts/imx7s.dtsi
··· 176 176 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>; 177 177 }; 178 178 179 - soc { 179 + soc: soc { 180 180 #address-cells = <1>; 181 181 #size-cells = <1>; 182 182 compatible = "simple-bus";
+2 -2
arch/arm/boot/dts/imxrt1050.dtsi
··· 83 83 }; 84 84 85 85 usdhc1: mmc@402c0000 { 86 - compatible ="fsl,imxrt1050-usdhc", "fsl,imx6sl-usdhc"; 86 + compatible = "fsl,imxrt1050-usdhc", "fsl,imx6sl-usdhc"; 87 87 reg = <0x402c0000 0x4000>; 88 88 interrupts = <110>; 89 89 clocks = <&clks IMXRT1050_CLK_IPG_PDOF>, ··· 95 95 no-1-8-v; 96 96 max-frequency = <4000000>; 97 97 fsl,tuning-start-tap = <20>; 98 - fsl,tuning-step= <2>; 98 + fsl,tuning-step = <2>; 99 99 status = "disabled"; 100 100 }; 101 101
+1 -1
arch/arm/boot/dts/ls1021a-iot.dts
··· 142 142 }; 143 143 144 144 sgtl5000: audio-codec@2a { 145 - #sound-dai-cells=<0x0>; 145 + #sound-dai-cells = <0x0>; 146 146 compatible = "fsl,sgtl5000"; 147 147 reg = <0x2a>; 148 148 VDDA-supply = <&reg_3p3v>;
+7
arch/arm/boot/dts/ls1021a.dtsi
··· 129 129 status = "disabled"; 130 130 }; 131 131 132 + sfp: efuse@1e80000 { 133 + compatible = "fsl,ls1021a-sfp"; 134 + reg = <0x0 0x1e80000 0x0 0x10000>; 135 + clocks = <&clockgen 4 3>; 136 + clock-names = "sfp"; 137 + }; 138 + 132 139 dcfg: dcfg@1ee0000 { 133 140 compatible = "fsl,ls1021a-dcfg", "syscon"; 134 141 reg = <0x0 0x1ee0000 0x0 0x1000>;