tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'aspeed-4.20-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt
ASPEED device tree updates for 4.20
- Two new ast2500-based machines:
* Facebook TiogaPass (x86 server)
* HXT StarDragon 4800 Reference Evaluation Platform 2 (arm64 server)
- Updates for the Quanta q71l system
- i2c device tree cleanups
* tag 'aspeed-4.20-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Adding Facebook TiogaPass BMC
ARM: dts: aspeed: Add HXT StarDragon 4800 REP2 BMC
ARM: dts: aspeed: quanta-q71l: Enable adc & ibt nodes
ARM: dts: aspeed: quanta-q71l: Add four PSUs
ARM: dts: aspeed: quanta-q71l: add aliases for i2c
ARM: dts: aspeed: Fix I2C bus warnings
Signed-off-by: Olof Johansson <olof@lixom.net>
+404
-2
+2
arch/arm/boot/dts/Makefile
+2
arch/arm/boot/dts/Makefile
···
1200
1200
dtb-$(CONFIG_ARCH_ASPEED) += \
1201
1201
aspeed-ast2500-evb.dtb \
1202
1202
aspeed-bmc-arm-centriq2400-rep.dtb \
1203
+
aspeed-bmc-arm-stardragon4800-rep2.dtb \
1204
+
aspeed-bmc-facebook-tiogapass.dtb \
1203
1205
aspeed-bmc-intel-s2600wf.dtb \
1204
1206
aspeed-bmc-opp-lanyang.dtb \
1205
1207
aspeed-bmc-opp-palmetto.dtb \
+207
arch/arm/boot/dts/aspeed-bmc-arm-stardragon4800-rep2.dts
+207
arch/arm/boot/dts/aspeed-bmc-arm-stardragon4800-rep2.dts
···
1
+
// SPDX-License-Identifier: GPL-2.0+
2
+
/dts-v1/;
3
+
4
+
#include "aspeed-g5.dtsi"
5
+
#include <dt-bindings/gpio/aspeed-gpio.h>
6
+
7
+
/ {
8
+
model = "HXT StarDragon 4800 REP2 AST2520";
9
+
compatible = "hxt,stardragon4800-rep2-bmc", "aspeed,ast2500";
10
+
11
+
chosen {
12
+
stdout-path = &uart5;
13
+
bootargs = "console=ttyS4,115200 earlyprintk";
14
+
};
15
+
16
+
memory@80000000 {
17
+
reg = <0x80000000 0x40000000>;
18
+
};
19
+
20
+
iio-hwmon {
21
+
compatible = "iio-hwmon";
22
+
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
23
+
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 8>;
24
+
};
25
+
26
+
iio-hwmon-battery {
27
+
compatible = "iio-hwmon";
28
+
io-channels = <&adc 7>;
29
+
};
30
+
31
+
leds {
32
+
compatible = "gpio-leds";
33
+
34
+
system_fault1 {
35
+
label = "System_fault1";
36
+
gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_LOW>;
37
+
};
38
+
39
+
system_fault2 {
40
+
label = "System_fault2";
41
+
gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_LOW>;
42
+
};
43
+
};
44
+
};
45
+
46
+
&fmc {
47
+
status = "okay";
48
+
flash@0 {
49
+
status = "okay";
50
+
m25p,fast-read;
51
+
label = "bmc";
52
+
#include "openbmc-flash-layout.dtsi"
53
+
};
54
+
};
55
+
56
+
&spi1 {
57
+
status = "okay";
58
+
pinctrl-names = "default";
59
+
pinctrl-0 = <&pinctrl_spi1_default>;
60
+
flash@0 {
61
+
status = "okay";
62
+
};
63
+
};
64
+
65
+
&spi2 {
66
+
pinctrl-names = "default";
67
+
pinctrl-0 = <&pinctrl_spi2ck_default
68
+
&pinctrl_spi2miso_default
69
+
&pinctrl_spi2mosi_default
70
+
&pinctrl_spi2cs0_default>;
71
+
};
72
+
73
+
&uart3 {
74
+
status = "okay";
75
+
76
+
pinctrl-names = "default";
77
+
pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
78
+
current-speed = <115200>;
79
+
};
80
+
81
+
&uart5 {
82
+
status = "okay";
83
+
};
84
+
85
+
&mac0 {
86
+
status = "okay";
87
+
pinctrl-names = "default";
88
+
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
89
+
};
90
+
91
+
&mac1 {
92
+
status = "okay";
93
+
pinctrl-names = "default";
94
+
pinctrl-0 = <&pinctrl_rmii2_default>;
95
+
use-ncsi;
96
+
};
97
+
98
+
&i2c0 {
99
+
status = "okay";
100
+
};
101
+
102
+
&i2c1 {
103
+
status = "okay";
104
+
105
+
tmp421@1e {
106
+
compatible = "ti,tmp421";
107
+
reg = <0x1e>;
108
+
};
109
+
tmp421@2a {
110
+
compatible = "ti,tmp421";
111
+
reg = <0x2a>;
112
+
};
113
+
tmp421@1c {
114
+
compatible = "ti,tmp421";
115
+
reg = <0x1c>;
116
+
};
117
+
};
118
+
119
+
&i2c2 {
120
+
status = "okay";
121
+
};
122
+
123
+
&i2c3 {
124
+
status = "okay";
125
+
};
126
+
127
+
&i2c4 {
128
+
status = "okay";
129
+
};
130
+
131
+
&i2c5 {
132
+
status = "okay";
133
+
};
134
+
135
+
&i2c6 {
136
+
status = "okay";
137
+
138
+
tmp421@1f {
139
+
compatible = "ti,tmp421";
140
+
reg = <0x1f>;
141
+
};
142
+
nvt210@4c {
143
+
compatible = "nvt210";
144
+
reg = <0x4c>;
145
+
};
146
+
eeprom@50 {
147
+
compatible = "atmel,24c128";
148
+
reg = <0x50>;
149
+
pagesize = <128>;
150
+
};
151
+
};
152
+
153
+
&i2c7 {
154
+
status = "okay";
155
+
};
156
+
157
+
&i2c8 {
158
+
status = "okay";
159
+
160
+
pca9641@70 {
161
+
compatible = "nxp,pca9641";
162
+
reg = <0x70>;
163
+
i2c-arb {
164
+
#address-cells = <1>;
165
+
#size-cells = <0>;
166
+
eeprom@50 {
167
+
compatible = "atmel,24c02";
168
+
reg = <0x50>;
169
+
};
170
+
dps650ab@58 {
171
+
compatible = "dps650ab";
172
+
reg = <0x58>;
173
+
};
174
+
};
175
+
};
176
+
};
177
+
178
+
&i2c9 {
179
+
status = "okay";
180
+
};
181
+
182
+
&vuart {
183
+
status = "okay";
184
+
};
185
+
186
+
&gfx {
187
+
status = "okay";
188
+
};
189
+
190
+
&pinctrl {
191
+
aspeed,external-nodes = <&gfx &lhc>;
192
+
};
193
+
194
+
&gpio {
195
+
pin_gpio_c7 {
196
+
gpio-hog;
197
+
gpios = <ASPEED_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
198
+
output-low;
199
+
line-name = "BIOS_SPI_MUX_S";
200
+
};
201
+
pin_gpio_d1 {
202
+
gpio-hog;
203
+
gpios = <ASPEED_GPIO(D, 1) GPIO_ACTIVE_HIGH>;
204
+
output-high;
205
+
line-name = "PHY2_RESET_N";
206
+
};
207
+
};
+146
arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
+146
arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
···
1
+
// SPDX-License-Identifier: GPL-2.0+
2
+
// Copyright (c) 2018 Facebook Inc.
3
+
// Author: Vijay Khemka <vijaykhemka@fb.com>
4
+
/dts-v1/;
5
+
6
+
#include "aspeed-g5.dtsi"
7
+
#include <dt-bindings/gpio/aspeed-gpio.h>
8
+
9
+
/ {
10
+
model = "Facebook TiogaPass BMC";
11
+
compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
12
+
aliases {
13
+
serial0 = &uart1;
14
+
serial4 = &uart5;
15
+
};
16
+
chosen {
17
+
stdout-path = &uart5;
18
+
bootargs = "console=ttyS4,115200 earlyprintk";
19
+
};
20
+
21
+
memory@80000000 {
22
+
reg = <0x80000000 0x20000000>;
23
+
};
24
+
};
25
+
26
+
&fmc {
27
+
status = "okay";
28
+
flash@0 {
29
+
status = "okay";
30
+
m25p,fast-read;
31
+
#include "openbmc-flash-layout.dtsi"
32
+
};
33
+
};
34
+
35
+
&spi1 {
36
+
status = "okay";
37
+
pinctrl-names = "default";
38
+
pinctrl-0 = <&pinctrl_spi1_default>;
39
+
flash@0 {
40
+
status = "okay";
41
+
m25p,fast-read;
42
+
label = "pnor";
43
+
};
44
+
};
45
+
46
+
&uart1 {
47
+
// Host Console
48
+
status = "okay";
49
+
pinctrl-names = "default";
50
+
pinctrl-0 = <&pinctrl_txd1_default
51
+
&pinctrl_rxd1_default>;
52
+
};
53
+
54
+
&uart5 {
55
+
// BMC Console
56
+
status = "okay";
57
+
};
58
+
59
+
&mac0 {
60
+
status = "okay";
61
+
62
+
pinctrl-names = "default";
63
+
pinctrl-0 = <&pinctrl_rmii1_default>;
64
+
use-ncsi;
65
+
};
66
+
67
+
&i2c0 {
68
+
status = "okay";
69
+
//Airmax Conn B, CPU0 PIROM, CPU1 PIROM
70
+
};
71
+
72
+
&i2c1 {
73
+
status = "okay";
74
+
//X24 Riser
75
+
};
76
+
77
+
&i2c2 {
78
+
status = "okay";
79
+
// Mezz Management SMBus
80
+
};
81
+
82
+
&i2c3 {
83
+
status = "okay";
84
+
// SMBus to Board ID EEPROM
85
+
};
86
+
87
+
&i2c4 {
88
+
status = "okay";
89
+
// BMC Debug Header
90
+
};
91
+
92
+
&i2c5 {
93
+
status = "okay";
94
+
// CPU Voltage regulators
95
+
};
96
+
97
+
&i2c6 {
98
+
status = "okay";
99
+
tpm@20 {
100
+
compatible = "infineon,slb9645tt";
101
+
reg = <0x20>;
102
+
};
103
+
tmp421@4e {
104
+
compatible = "ti,tmp421";
105
+
reg = <0x4e>;
106
+
};
107
+
tmp421@4f {
108
+
compatible = "ti,tmp421";
109
+
reg = <0x4f>;
110
+
};
111
+
eeprom@54 {
112
+
compatible = "atmel,24c64";
113
+
reg = <0x54>;
114
+
pagesize = <32>;
115
+
};
116
+
};
117
+
118
+
&i2c7 {
119
+
status = "okay";
120
+
//HSC, AirMax Conn A
121
+
};
122
+
123
+
&i2c8 {
124
+
status = "okay";
125
+
//Mezz Sensor SMBus
126
+
};
127
+
128
+
&i2c9 {
129
+
status = "okay";
130
+
//USB Debug Connector
131
+
};
132
+
133
+
&pwm_tacho {
134
+
status = "okay";
135
+
pinctrl-names = "default";
136
+
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
137
+
fan@0 {
138
+
reg = <0x00>;
139
+
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
140
+
};
141
+
142
+
fan@1 {
143
+
reg = <0x00>;
144
+
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
145
+
};
146
+
};
+47
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
+47
arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
···
7
7
model = "Quanta Q71L BMC";
8
8
compatible = "quanta,q71l-bmc", "aspeed,ast2400";
9
9
10
+
aliases {
11
+
i2c14 = &i2c_pcie2;
12
+
i2c15 = &i2c_pcie3;
13
+
i2c16 = &i2c_pcie6;
14
+
i2c17 = &i2c_pcie7;
15
+
i2c18 = &i2c_pcie1;
16
+
i2c19 = &i2c_pcie4;
17
+
i2c20 = &i2c_pcie5;
18
+
i2c21 = &i2c_pcie8;
19
+
i2c22 = &i2c_pcie9;
20
+
i2c23 = &i2c_pcie10;
21
+
i2c24 = &i2c_ssd1;
22
+
i2c25 = &i2c_ssd2;
23
+
i2c26 = &i2c_psu4;
24
+
i2c27 = &i2c_psu1;
25
+
i2c28 = &i2c_psu3;
26
+
i2c29 = &i2c_psu2;
27
+
};
28
+
10
29
chosen {
11
30
stdout-path = &uart5;
12
31
bootargs = "console=ttyS4,115200 earlyprintk";
···
110
91
pinctrl-names = "default";
111
92
pinctrl-0 = <&pinctrl_vgahs_default &pinctrl_vgavs_default
112
93
&pinctrl_ddcclk_default &pinctrl_ddcdat_default>;
94
+
};
95
+
96
+
&ibt {
97
+
status = "okay";
113
98
};
114
99
115
100
&lpc_snoop {
···
322
299
#address-cells = <1>;
323
300
#size-cells = <0>;
324
301
reg = <0>;
302
+
303
+
psu@59 {
304
+
compatible = "pmbus";
305
+
reg = <0x59>;
306
+
};
325
307
};
326
308
327
309
i2c_psu1: i2c@1 {
328
310
#address-cells = <1>;
329
311
#size-cells = <0>;
330
312
reg = <1>;
313
+
314
+
psu@58 {
315
+
compatible = "pmbus";
316
+
reg = <0x58>;
317
+
};
331
318
};
332
319
333
320
i2c_psu3: i2c@2 {
334
321
#address-cells = <1>;
335
322
#size-cells = <0>;
336
323
reg = <2>;
324
+
325
+
psu@58 {
326
+
compatible = "pmbus";
327
+
reg = <0x58>;
328
+
};
337
329
};
338
330
339
331
i2c_psu2: i2c@3 {
340
332
#address-cells = <1>;
341
333
#size-cells = <0>;
342
334
reg = <3>;
335
+
336
+
psu@59 {
337
+
compatible = "pmbus";
338
+
reg = <0x59>;
339
+
};
343
340
};
344
341
};
345
342
···
385
342
};
386
343
387
344
&wdt2 {
345
+
status = "okay";
346
+
};
347
+
348
+
&adc {
388
349
status = "okay";
389
350
};
390
351
+1
-1
arch/arm/boot/dts/aspeed-g4.dtsi
+1
-1
arch/arm/boot/dts/aspeed-g4.dtsi