···169169}170170171171/**172172- * atc_desc_chain - build chain adding a descripor173173- * @first: address of first descripor of the chain174174- * @prev: address of previous descripor of the chain172172+ * atc_desc_chain - build chain adding a descriptor173173+ * @first: address of first descriptor of the chain174174+ * @prev: address of previous descriptor of the chain175175 * @desc: descriptor to queue176176 *177177 * Called from prep_* functions···786786}787787788788/**789789- * atc_dma_cyclic_fill_desc - Fill one period decriptor789789+ * atc_dma_cyclic_fill_desc - Fill one period descriptor790790 */791791static int792792atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc,
+1-1
drivers/dma/ep93xx_dma.c
···11181118 * @chan: channel11191119 * @dma_addr: DMA mapped address of the buffer11201120 * @buf_len: length of the buffer (in bytes)11211121- * @period_len: lenght of a single period11211121+ * @period_len: length of a single period11221122 * @dir: direction of the operation11231123 * @context: operation context (ignored)11241124 *
+1-1
drivers/dma/fsldma.c
···10151015 /*10161016 * Programming Error10171017 * The DMA_INTERRUPT async_tx is a NULL transfer, which will10181018- * triger a PE interrupt.10181018+ * trigger a PE interrupt.10191019 */10201020 if (stat & FSL_DMA_SR_PE) {10211021 chan_dbg(chan, "irq: Programming Error INT\n");
+2-2
drivers/dma/imx-dma.c
···571571 if (desc->desc.callback)572572 desc->desc.callback(desc->desc.callback_param);573573574574- /* If we are dealing with a cyclic descriptor keep it on ld_active575575- * and dont mark the descripor as complete.574574+ /* If we are dealing with a cyclic descriptor, keep it on ld_active575575+ * and dont mark the descriptor as complete.576576 * Only in non-cyclic cases it would be marked as complete577577 */578578 if (imxdma_chan_is_doing_cyclic(imxdmac))
+3-3
drivers/dma/intel_mid_dma_regs.h
···168168 * @active_list: current active descriptors169169 * @queue: current queued up descriptors170170 * @free_list: current free descriptors171171- * @slave: dma slave struture172172- * @descs_allocated: total number of decsiptors allocated173173- * @dma: dma device struture pointer171171+ * @slave: dma slave structure172172+ * @descs_allocated: total number of descriptors allocated173173+ * @dma: dma device structure pointer174174 * @busy: bool representing if ch is busy (active txn) or not175175 * @in_use: bool representing if ch is in use or not176176 * @raw_tfr: raw trf interrupt received
+1-1
drivers/dma/pl330.c
···522522 /* In the DMAC pool */523523 FREE,524524 /*525525- * Allocted to some channel during prep_xxx525525+ * Allocated to some channel during prep_xxx526526 * Also may be sitting on the work_list.527527 */528528 PREP,
+1-1
drivers/dma/ppc4xx/adma.c
···44464446 ret = -ENOMEM;44474447 goto err_dma_alloc;44484448 }44494449- dev_dbg(&ofdev->dev, "allocted descriptor pool virt 0x%p phys 0x%llx\n",44494449+ dev_dbg(&ofdev->dev, "allocated descriptor pool virt 0x%p phys 0x%llx\n",44504450 adev->dma_desc_pool_virt, (u64)adev->dma_desc_pool);4451445144524452 regs = ioremap(res.start, resource_size(&res));
+1-1
drivers/dma/ste_dma40_ll.h
···202202/* LLI related structures */203203204204/**205205- * struct d40_phy_lli - The basic configration register for each physical205205+ * struct d40_phy_lli - The basic configuration register for each physical206206 * channel.207207 *208208 * @reg_cfg: The configuration register.