···475475 /*476476 * due to an spi error we consider transfer as done,477477 * so mask all events until before next transfer start478478- * and stop the possibly running dma immediatelly478478+ * and stop the possibly running dma immediately479479 */480480 au1550_spi_mask_ack_all(hw);481481 au1xxx_dbdma_stop(hw->dma_rx_ch);
+1-1
drivers/spi/spi-bfin-sport.c
···467467 dev_dbg(drv_data->dev, "IO write error!\n");468468 drv_data->state = ERROR_STATE;469469 } else {470470- /* Update total byte transfered */470470+ /* Update total byte transferred */471471 message->actual_length += transfer->len;472472 /* Move to next transfer of this msg */473473 drv_data->state = bfin_sport_spi_next_transfer(drv_data);
+1-1
drivers/spi/spi-oc-tiny.c
···129129 unsigned int i;130130131131 if (hw->irq >= 0) {132132- /* use intrrupt driven data transfer */132132+ /* use interrupt driven data transfer */133133 hw->len = t->len;134134 hw->txp = t->tx_buf;135135 hw->rxp = t->rx_buf;
+2-2
drivers/spi/spi-ppc4xx.c
···101101 u8 dummy;102102 /*103103 * Clock divisor modulus register104104- * This uses the follwing formula:104104+ * This uses the following formula:105105 * SCPClkOut = OPBCLK/(4(CDM + 1))106106 * or107107 * CDM = (OPBCLK/4*SCPClkOut) - 1···201201 return -EINVAL;202202 }203203204204- /* Write new configration */204204+ /* Write new configuration */205205 out_8(&hw->regs->mode, cs->mode);206206207207 /* Set the clock */