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drm/amd/pp: Export new smu message for PCC feature on Vega10
used to set PccThrottleLevel and PccResidencyThreshold
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
authored by
Rex Zhu
and committed by
Alex Deucher
cc1bb66f
ada6770e
+2
-2
+2
-2
drivers/gpu/drm/amd/powerplay/inc/smu9.h
+2
-2
drivers/gpu/drm/amd/powerplay/inc/smu9.h
···
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#define FEATURE_FAST_PPT_BIT 26
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#define FEATURE_GFX_EDC_BIT 27
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#define FEATURE_ACG_BIT 28
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-
#define FEATURE_SPARE_29_BIT 29
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+
#define FEATURE_PCC_LIMIT_CONTROL_BIT 29
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#define FEATURE_SPARE_30_BIT 30
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#define FEATURE_SPARE_31_BIT 31
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···
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#define FEATURE_FAST_PPT_MASK (1 << FAST_PPT_BIT )
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#define FEATURE_GFX_EDC_MASK (1 << FEATURE_GFX_EDC_BIT )
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#define FEATURE_ACG_MASK (1 << FEATURE_ACG_BIT )
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-
#define FFEATURE_SPARE_29_MASK (1 << FEATURE_SPARE_29_BIT )
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+
#define FEATURE_PCC_LIMIT_CONTROL_MASK (1 << FEATURE_PCC_LIMIT_CONTROL_BIT )
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#define FFEATURE_SPARE_30_MASK (1 << FEATURE_SPARE_30_BIT )
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#define FFEATURE_SPARE_31_MASK (1 << FEATURE_SPARE_31_BIT )
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/* Workload types */