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ARM: dts: am437x: Disable wait pin monitoring for NAND

The NAND Ready/Busy# line is connected to GPMC_WAIT0 pin and
can't be used for wait state insertion for NAND I/O read/write.
So disable read/write wait monitoring as per Reference Manual's
suggestion [1].

[1] AM437x TRM: SPRUHL7D: 9.1.3.3.12.2 NAND Device-Ready Pin

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

authored by

Roger Quadros and committed by
Tony Lindgren cb9ea8b6 be3f39c8

-9
-5
arch/arm/boot/dts/am437x-cm-t43.dts
··· 170 170 gpmc,access-ns = <64>; 171 171 gpmc,rd-cycle-ns = <82>; 172 172 gpmc,wr-cycle-ns = <82>; 173 - gpmc,wait-on-read = "true"; 174 - gpmc,wait-on-write = "true"; 175 173 gpmc,bus-turnaround-ns = <0>; 176 174 gpmc,cycle2cycle-delay-ns = <0>; 177 175 gpmc,clk-activation-ns = <0>; 178 - gpmc,wait-monitoring-ns = <0>; 179 176 gpmc,wr-access-ns = <40>; 180 177 gpmc,wr-data-mux-bus-ns = <0>; 181 - 182 - gpmc,wait-pin = <0>; 183 178 184 179 #address-cells = <1>; 185 180 #size-cells = <1>;
-2
arch/arm/boot/dts/am437x-gp-evm.dts
··· 837 837 gpmc,access-ns = <30>; 838 838 gpmc,rd-cycle-ns = <40>; 839 839 gpmc,wr-cycle-ns = <40>; 840 - gpmc,wait-pin = <0>; 841 840 gpmc,bus-turnaround-ns = <0>; 842 841 gpmc,cycle2cycle-delay-ns = <0>; 843 842 gpmc,clk-activation-ns = <0>; 844 - gpmc,wait-monitoring-ns = <0>; 845 843 gpmc,wr-access-ns = <40>; 846 844 gpmc,wr-data-mux-bus-ns = <0>; 847 845 /* MTD partition table */
-2
arch/arm/boot/dts/am43x-epos-evm.dts
··· 586 586 gpmc,access-ns = <30>; /* tCEA + 4*/ 587 587 gpmc,rd-cycle-ns = <40>; 588 588 gpmc,wr-cycle-ns = <40>; 589 - gpmc,wait-pin = <0>; 590 589 gpmc,bus-turnaround-ns = <0>; 591 590 gpmc,cycle2cycle-delay-ns = <0>; 592 591 gpmc,clk-activation-ns = <0>; 593 - gpmc,wait-monitoring-ns = <0>; 594 592 gpmc,wr-access-ns = <40>; 595 593 gpmc,wr-data-mux-bus-ns = <0>; 596 594 /* MTD partition table */