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ARM: dts: am437x: Fix NAND device nodes

Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.

The GPMC node will provide an interrupt controller for the
NAND IRQs.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

authored by

Roger Quadros and committed by
Tony Lindgren be3f39c8 79c08261

+17 -3
+2
arch/arm/boot/dts/am4372.dtsi
··· 893 893 gpmc,num-waitpins = <2>; 894 894 #address-cells = <2>; 895 895 #size-cells = <1>; 896 + interrupt-controller; 897 + #interrupt-cells = <2>; 896 898 status = "disabled"; 897 899 }; 898 900
+5 -1
arch/arm/boot/dts/am437x-cm-t43.dts
··· 146 146 pinctrl-0 = <&nand_flash_x8>; 147 147 ranges = <0 0 0x08000000 0x1000000>; 148 148 nand@0,0 { 149 - reg = <0 0 0>; 149 + compatible = "ti,omap2-nand"; 150 + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 151 + interrupt-parent = <&gpmc>; 152 + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 153 + <1 IRQ_TYPE_NONE>; /* termcount */ 150 154 ti,nand-ecc-opt = "bch8"; 151 155 ti,elm-id = <&elm>; 152 156
+5 -1
arch/arm/boot/dts/am437x-gp-evm.dts
··· 812 812 status = "okay"; 813 813 pinctrl-names = "default"; 814 814 pinctrl-0 = <&nand_flash_x8>; 815 - ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */ 815 + ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */ 816 816 nand@0,0 { 817 + compatible = "ti,omap2-nand"; 817 818 reg = <0 0 4>; /* device IO registers */ 819 + interrupt-parent = <&gpmc>; 820 + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 821 + <1 IRQ_TYPE_NONE>; /* termcount */ 818 822 ti,nand-ecc-opt = "bch16"; 819 823 ti,elm-id = <&elm>; 820 824 nand-bus-width = <8>;
+5 -1
arch/arm/boot/dts/am43x-epos-evm.dts
··· 561 561 status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */ 562 562 pinctrl-names = "default"; 563 563 pinctrl-0 = <&nand_flash_x8>; 564 - ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */ 564 + ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */ 565 565 nand@0,0 { 566 + compatible = "ti,omap2-nand"; 566 567 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 568 + interrupt-parent = <&gpmc>; 569 + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 570 + <1 IRQ_TYPE_NONE>; /* termcount */ 567 571 ti,nand-ecc-opt = "bch16"; 568 572 ti,elm-id = <&elm>; 569 573 nand-bus-width = <8>;