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linux
pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 380/385
The Marvell Armada 380/385 are new ARM SoCs from Marvell, part of the
mvebu family, but using a Cortex-A9 CPU core. In terms of pin-muxing,
it is similar to Armada 370 and XP for the register layout, only
different in the number of available pins and their
functions. Therefore, we simply use the existing
drivers/pinctrl/mvebu/ infrastructure, with no other changes that the
list of pins and corresponding functions.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
authored by
Thomas Petazzoni
and committed by
Sebastian Hesselbarth
ca6d9a08
ce3ed59d
+547
+80
Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt
+80
Documentation/devicetree/bindings/pinctrl/marvell,armada-38x-pinctrl.txt
···
1
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* Marvell Armada 380/385 SoC pinctrl driver for mpp
2
+
3
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Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
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part and usage.
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Required properties:
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- compatible: "marvell,88f6810-pinctrl", "marvell,88f6820-pinctrl" or
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"marvell,88f6828-pinctrl" depending on the specific variant of the
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SoC being used.
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- reg: register specifier of MPP registers
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Available mpp pins/groups and functions:
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Note: brackets (x) are not part of the mpp name for marvell,function and given
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only for more detailed description in this document.
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name pins functions
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================================================================================
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mpp0 0 gpio, ua0(rxd)
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mpp1 1 gpio, ua0(txd)
20
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mpp2 2 gpio, i2c0(sck)
21
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mpp3 3 gpio, i2c0(sda)
22
+
mpp4 4 gpio, ge(mdc), ua1(txd), ua0(rts)
23
+
mpp5 5 gpio, ge(mdio), ua1(rxd), ua0(cts)
24
+
mpp6 6 gpio, ge0(txclkout), ge0(crs), dev(cs3)
25
+
mpp7 7 gpio, ge0(txd0), dev(ad9)
26
+
mpp8 8 gpio, ge0(txd1), dev(ad10)
27
+
mpp9 9 gpio, ge0(txd2), dev(ad11)
28
+
mpp10 10 gpio, ge0(txd3), dev(ad12)
29
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mpp11 11 gpio, ge0(txctl), dev(ad13)
30
+
mpp12 12 gpio, ge0(rxd0), pcie0(rstout), pcie1(rstout) [1], spi0(cs1), dev(ad14)
31
+
mpp13 13 gpio, ge0(rxd1), pcie0(clkreq), pcie1(clkreq) [1], spi0(cs2), dev(ad15)
32
+
mpp14 14 gpio, ge0(rxd2), ptp(clk), m(vtt_ctrl), spi0(cs3), dev(wen1)
33
+
mpp15 15 gpio, ge0(rxd3), ge(mdc slave), pcie0(rstout), spi0(mosi), pcie1(rstout) [1]
34
+
mpp16 16 gpio, ge0(rxctl), ge(mdio slave), m(decc_err), spi0(miso), pcie0(clkreq)
35
+
mpp17 17 gpio, ge0(rxclk), ptp(clk), ua1(rxd), spi0(sck), sata1(prsnt)
36
+
mpp18 18 gpio, ge0(rxerr), ptp(trig_gen), ua1(txd), spi0(cs0), pcie1(rstout) [1]
37
+
mpp19 19 gpio, ge0(col), ptp(event_req), pcie0(clkreq), sata1(prsnt), ua0(cts)
38
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mpp20 20 gpio, ge0(txclk), ptp(clk), pcie1(rstout) [1], sata0(prsnt), ua0(rts)
39
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mpp21 21 gpio, spi0(cs1), ge1(rxd0), sata0(prsnt), sd0(cmd), dev(bootcs)
40
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mpp22 22 gpio, spi0(mosi), dev(ad0)
41
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mpp23 23 gpio, spi0(sck), dev(ad2)
42
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mpp24 24 gpio, spi0(miso), ua0(cts), ua1(rxd), sd0(d4), dev(ready)
43
+
mpp25 25 gpio, spi0(cs0), ua0(rts), ua1(txd), sd0(d5), dev(cs0)
44
+
mpp26 26 gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1)
45
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mpp27 27 gpio, spi0(cs3), ge1(txclkout), i2c1(sda), sd0(d7), dev(cs2)
46
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mpp28 28 gpio, ge1(txd0), sd0(clk), dev(ad5)
47
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mpp29 29 gpio, ge1(txd1), dev(ale0)
48
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mpp30 30 gpio, ge1(txd2), dev(oen)
49
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mpp31 31 gpio, ge1(txd3), dev(ale1)
50
+
mpp32 32 gpio, ge1(txctl), dev(wen0)
51
+
mpp33 33 gpio, m(decc_err), dev(ad3)
52
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mpp34 34 gpio, dev(ad1)
53
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mpp35 35 gpio, ref(clk_out1), dev(a1)
54
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mpp36 36 gpio, ptp(trig_gen), dev(a0)
55
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mpp37 37 gpio, ptp(clk), ge1(rxclk), sd0(d3), dev(ad8)
56
+
mpp38 38 gpio, ptp(event_req), ge1(rxd1), ref(clk_out0), sd0(d0), dev(ad4)
57
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mpp39 39 gpio, i2c1(sck), ge1(rxd2), ua0(cts), sd0(d1), dev(a2)
58
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mpp40 40 gpio, i2c1(sda), ge1(rxd3), ua0(rts), sd0(d2), dev(ad6)
59
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mpp41 41 gpio, ua1(rxd), ge1(rxctl), ua0(cts), spi1(cs3), dev(burst/last)
60
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mpp42 42 gpio, ua1(txd), ua0(rts), dev(ad7)
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mpp43 43 gpio, pcie0(clkreq), m(vtt_ctrl), m(decc_err), pcie0(rstout), dev(clkout)
62
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mpp44 44 gpio, sata0(prsnt), sata1(prsnt), sata2(prsnt) [2], sata3(prsnt) [3], pcie0(rstout)
63
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mpp45 45 gpio, ref(clk_out0), pcie0(rstout), pcie1(rstout) [1], pcie2(rstout), pcie3(rstout)
64
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mpp46 46 gpio, ref(clk_out1), pcie0(rstout), pcie1(rstout) [1], pcie2(rstout), pcie3(rstout)
65
+
mpp47 47 gpio, sata0(prsnt), sata1(prsnt), sata2(prsnt) [2], spi1(cs2), sata3(prsnt) [2]
66
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mpp48 48 gpio, sata0(prsnt), m(vtt_ctrl), tdm2c(pclk), audio(mclk), sd0(d4)
67
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mpp49 49 gpio, sata2(prsnt) [2], sata3(prsnt) [2], tdm2c(fsync), audio(lrclk), sd0(d5)
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mpp50 50 gpio, pcie0(rstout), pcie1(rstout) [1], tdm2c(drx), audio(extclk), sd0(cmd)
69
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mpp51 51 gpio, tdm2c(dtx), audio(sdo), m(decc_err)
70
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mpp52 52 gpio, pcie0(rstout), pcie1(rstout) [1], tdm2c(intn), audio(sdi), sd0(d6)
71
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mpp53 53 gpio, sata1(prsnt), sata0(prsnt), tdm2c(rstn), audio(bclk), sd0(d7)
72
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mpp54 54 gpio, sata0(prsnt), sata1(prsnt), pcie0(rstout), pcie1(rstout) [1], sd0(d3)
73
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mpp55 55 gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0)
74
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mpp56 56 gpio, ua1(rts), ge(mdc), m(decc_err), spi1(mosi)
75
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mpp57 57 gpio, spi1(sck), sd0(clk)
76
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mpp58 58 gpio, pcie1(clkreq) [1], i2c1(sck), pcie2(clkreq), spi1(miso), sd0(d1)
77
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mpp59 59 gpio, pcie0(rstout), i2c1(sda), pcie1(rstout) [1], spi1(cs0), sd0(d2)
78
+
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[1]: only available on 88F6820 and 88F6828
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[2]: only available on 88F6828
+4
drivers/pinctrl/mvebu/Kconfig
+4
drivers/pinctrl/mvebu/Kconfig
+1
drivers/pinctrl/mvebu/Makefile
+1
drivers/pinctrl/mvebu/Makefile
···
3
3
obj-$(CONFIG_PINCTRL_KIRKWOOD) += pinctrl-kirkwood.o
4
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obj-$(CONFIG_PINCTRL_ARMADA_370) += pinctrl-armada-370.o
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obj-$(CONFIG_PINCTRL_ARMADA_375) += pinctrl-armada-375.o
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obj-$(CONFIG_PINCTRL_ARMADA_38X) += pinctrl-armada-38x.o
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obj-$(CONFIG_PINCTRL_ARMADA_XP) += pinctrl-armada-xp.o
+462
drivers/pinctrl/mvebu/pinctrl-armada-38x.c
+462
drivers/pinctrl/mvebu/pinctrl-armada-38x.c
···
1
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/*
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* Marvell Armada 380/385 pinctrl driver based on mvebu pinctrl core
3
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*
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* Copyright (C) 2013 Marvell
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*
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
12
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-mvebu.h"
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static void __iomem *mpp_base;
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static int armada_38x_mpp_ctrl_get(unsigned pid, unsigned long *config)
28
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{
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return default_mpp_ctrl_get(mpp_base, pid, config);
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}
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32
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static int armada_38x_mpp_ctrl_set(unsigned pid, unsigned long config)
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{
34
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return default_mpp_ctrl_set(mpp_base, pid, config);
35
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}
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enum {
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V_88F6810 = BIT(0),
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V_88F6820 = BIT(1),
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V_88F6828 = BIT(2),
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V_88F6810_PLUS = (V_88F6810 | V_88F6820 | V_88F6828),
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V_88F6820_PLUS = (V_88F6820 | V_88F6828),
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};
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static struct mvebu_mpp_mode armada_38x_mpp_modes[] = {
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MPP_MODE(0,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ua0", "rxd", V_88F6810_PLUS)),
49
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MPP_MODE(1,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
51
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MPP_VAR_FUNCTION(1, "ua0", "txd", V_88F6810_PLUS)),
52
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MPP_MODE(2,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
54
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MPP_VAR_FUNCTION(1, "i2c0", "sck", V_88F6810_PLUS)),
55
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MPP_MODE(3,
56
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "i2c0", "sda", V_88F6810_PLUS)),
58
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MPP_MODE(4,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ge", "mdc", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(2, "ua1", "txd", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6810_PLUS)),
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MPP_MODE(5,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ge", "mdio", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(2, "ua1", "rxd", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6810_PLUS)),
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MPP_MODE(6,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ge0", "txclkout", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(2, "ge0", "crs", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(5, "dev", "cs3", V_88F6810_PLUS)),
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MPP_MODE(7,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ge0", "txd0", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(5, "dev", "ad9", V_88F6810_PLUS)),
77
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MPP_MODE(8,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ge0", "txd1", V_88F6810_PLUS),
80
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MPP_VAR_FUNCTION(5, "dev", "ad10", V_88F6810_PLUS)),
81
+
MPP_MODE(9,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
83
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MPP_VAR_FUNCTION(1, "ge0", "txd2", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(5, "dev", "ad11", V_88F6810_PLUS)),
85
+
MPP_MODE(10,
86
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
87
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MPP_VAR_FUNCTION(1, "ge0", "txd3", V_88F6810_PLUS),
88
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MPP_VAR_FUNCTION(5, "dev", "ad12", V_88F6810_PLUS)),
89
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MPP_MODE(11,
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+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
91
+
MPP_VAR_FUNCTION(1, "ge0", "txctl", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(5, "dev", "ad13", V_88F6810_PLUS)),
93
+
MPP_MODE(12,
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+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
95
+
MPP_VAR_FUNCTION(1, "ge0", "rxd0", V_88F6810_PLUS),
96
+
MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
97
+
MPP_VAR_FUNCTION(3, "pcie1", "rstout", V_88F6820_PLUS),
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+
MPP_VAR_FUNCTION(4, "spi0", "cs1", V_88F6810_PLUS),
99
+
MPP_VAR_FUNCTION(5, "dev", "ad14", V_88F6810_PLUS)),
100
+
MPP_MODE(13,
101
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
102
+
MPP_VAR_FUNCTION(1, "ge0", "rxd1", V_88F6810_PLUS),
103
+
MPP_VAR_FUNCTION(2, "pcie0", "clkreq", V_88F6810_PLUS),
104
+
MPP_VAR_FUNCTION(3, "pcie1", "clkreq", V_88F6820_PLUS),
105
+
MPP_VAR_FUNCTION(4, "spi0", "cs2", V_88F6810_PLUS),
106
+
MPP_VAR_FUNCTION(5, "dev", "ad15", V_88F6810_PLUS)),
107
+
MPP_MODE(14,
108
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
109
+
MPP_VAR_FUNCTION(1, "ge0", "rxd2", V_88F6810_PLUS),
110
+
MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
111
+
MPP_VAR_FUNCTION(3, "m", "vtt_ctrl", V_88F6810_PLUS),
112
+
MPP_VAR_FUNCTION(4, "spi0", "cs3", V_88F6810_PLUS),
113
+
MPP_VAR_FUNCTION(5, "dev", "wen1", V_88F6810_PLUS)),
114
+
MPP_MODE(15,
115
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
116
+
MPP_VAR_FUNCTION(1, "ge0", "rxd3", V_88F6810_PLUS),
117
+
MPP_VAR_FUNCTION(2, "ge", "mdc slave", V_88F6810_PLUS),
118
+
MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6810_PLUS),
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+
MPP_VAR_FUNCTION(4, "spi0", "mosi", V_88F6810_PLUS),
120
+
MPP_VAR_FUNCTION(5, "pcie1", "rstout", V_88F6820_PLUS)),
121
+
MPP_MODE(16,
122
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
123
+
MPP_VAR_FUNCTION(1, "ge0", "rxctl", V_88F6810_PLUS),
124
+
MPP_VAR_FUNCTION(2, "ge", "mdio slave", V_88F6810_PLUS),
125
+
MPP_VAR_FUNCTION(3, "m", "decc_err", V_88F6810_PLUS),
126
+
MPP_VAR_FUNCTION(4, "spi0", "miso", V_88F6810_PLUS),
127
+
MPP_VAR_FUNCTION(5, "pcie0", "clkreq", V_88F6810_PLUS)),
128
+
MPP_MODE(17,
129
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
130
+
MPP_VAR_FUNCTION(1, "ge0", "rxclk", V_88F6810_PLUS),
131
+
MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
132
+
MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6810_PLUS),
133
+
MPP_VAR_FUNCTION(4, "spi0", "sck", V_88F6810_PLUS),
134
+
MPP_VAR_FUNCTION(5, "sata1", "prsnt", V_88F6810_PLUS)),
135
+
MPP_MODE(18,
136
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
137
+
MPP_VAR_FUNCTION(1, "ge0", "rxerr", V_88F6810_PLUS),
138
+
MPP_VAR_FUNCTION(2, "ptp", "trig_gen", V_88F6810_PLUS),
139
+
MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6810_PLUS),
140
+
MPP_VAR_FUNCTION(4, "spi0", "cs0", V_88F6810_PLUS),
141
+
MPP_VAR_FUNCTION(5, "pcie1", "rstout", V_88F6820_PLUS)),
142
+
MPP_MODE(19,
143
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
144
+
MPP_VAR_FUNCTION(1, "ge0", "col", V_88F6810_PLUS),
145
+
MPP_VAR_FUNCTION(2, "ptp", "event_req", V_88F6810_PLUS),
146
+
MPP_VAR_FUNCTION(3, "pcie0", "clkreq", V_88F6810_PLUS),
147
+
MPP_VAR_FUNCTION(4, "sata1", "prsnt", V_88F6810_PLUS),
148
+
MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS)),
149
+
MPP_MODE(20,
150
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
151
+
MPP_VAR_FUNCTION(1, "ge0", "txclk", V_88F6810_PLUS),
152
+
MPP_VAR_FUNCTION(2, "ptp", "clk", V_88F6810_PLUS),
153
+
MPP_VAR_FUNCTION(3, "pcie1", "rstout", V_88F6820_PLUS),
154
+
MPP_VAR_FUNCTION(4, "sata0", "prsnt", V_88F6810_PLUS),
155
+
MPP_VAR_FUNCTION(5, "ua0", "rts", V_88F6810_PLUS)),
156
+
MPP_MODE(21,
157
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
158
+
MPP_VAR_FUNCTION(1, "spi0", "cs1", V_88F6810_PLUS),
159
+
MPP_VAR_FUNCTION(2, "ge1", "rxd0", V_88F6810_PLUS),
160
+
MPP_VAR_FUNCTION(3, "sata0", "prsnt", V_88F6810_PLUS),
161
+
MPP_VAR_FUNCTION(4, "sd0", "cmd", V_88F6810_PLUS),
162
+
MPP_VAR_FUNCTION(5, "dev", "bootcs", V_88F6810_PLUS)),
163
+
MPP_MODE(22,
164
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
165
+
MPP_VAR_FUNCTION(1, "spi0", "mosi", V_88F6810_PLUS),
166
+
MPP_VAR_FUNCTION(5, "dev", "ad0", V_88F6810_PLUS)),
167
+
MPP_MODE(23,
168
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
169
+
MPP_VAR_FUNCTION(1, "spi0", "sck", V_88F6810_PLUS),
170
+
MPP_VAR_FUNCTION(5, "dev", "ad2", V_88F6810_PLUS)),
171
+
MPP_MODE(24,
172
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
173
+
MPP_VAR_FUNCTION(1, "spi0", "miso", V_88F6810_PLUS),
174
+
MPP_VAR_FUNCTION(2, "ua0", "cts", V_88F6810_PLUS),
175
+
MPP_VAR_FUNCTION(3, "ua1", "rxd", V_88F6810_PLUS),
176
+
MPP_VAR_FUNCTION(4, "sd0", "d4", V_88F6810_PLUS),
177
+
MPP_VAR_FUNCTION(5, "dev", "ready", V_88F6810_PLUS)),
178
+
MPP_MODE(25,
179
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
180
+
MPP_VAR_FUNCTION(1, "spi0", "cs0", V_88F6810_PLUS),
181
+
MPP_VAR_FUNCTION(2, "ua0", "rts", V_88F6810_PLUS),
182
+
MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6810_PLUS),
183
+
MPP_VAR_FUNCTION(4, "sd0", "d5", V_88F6810_PLUS),
184
+
MPP_VAR_FUNCTION(5, "dev", "cs0", V_88F6810_PLUS)),
185
+
MPP_MODE(26,
186
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
187
+
MPP_VAR_FUNCTION(1, "spi0", "cs2", V_88F6810_PLUS),
188
+
MPP_VAR_FUNCTION(3, "i2c1", "sck", V_88F6810_PLUS),
189
+
MPP_VAR_FUNCTION(4, "sd0", "d6", V_88F6810_PLUS),
190
+
MPP_VAR_FUNCTION(5, "dev", "cs1", V_88F6810_PLUS)),
191
+
MPP_MODE(27,
192
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
193
+
MPP_VAR_FUNCTION(1, "spi0", "cs3", V_88F6810_PLUS),
194
+
MPP_VAR_FUNCTION(2, "ge1", "txclkout", V_88F6810_PLUS),
195
+
MPP_VAR_FUNCTION(3, "i2c1", "sda", V_88F6810_PLUS),
196
+
MPP_VAR_FUNCTION(4, "sd0", "d7", V_88F6810_PLUS),
197
+
MPP_VAR_FUNCTION(5, "dev", "cs2", V_88F6810_PLUS)),
198
+
MPP_MODE(28,
199
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
200
+
MPP_VAR_FUNCTION(2, "ge1", "txd0", V_88F6810_PLUS),
201
+
MPP_VAR_FUNCTION(4, "sd0", "clk", V_88F6810_PLUS),
202
+
MPP_VAR_FUNCTION(5, "dev", "ad5", V_88F6810_PLUS)),
203
+
MPP_MODE(29,
204
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
205
+
MPP_VAR_FUNCTION(2, "ge1", "txd1", V_88F6810_PLUS),
206
+
MPP_VAR_FUNCTION(5, "dev", "ale0", V_88F6810_PLUS)),
207
+
MPP_MODE(30,
208
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
209
+
MPP_VAR_FUNCTION(2, "ge1", "txd2", V_88F6810_PLUS),
210
+
MPP_VAR_FUNCTION(5, "dev", "oen", V_88F6810_PLUS)),
211
+
MPP_MODE(31,
212
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
213
+
MPP_VAR_FUNCTION(2, "ge1", "txd3", V_88F6810_PLUS),
214
+
MPP_VAR_FUNCTION(5, "dev", "ale1", V_88F6810_PLUS)),
215
+
MPP_MODE(32,
216
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
217
+
MPP_VAR_FUNCTION(2, "ge1", "txctl", V_88F6810_PLUS),
218
+
MPP_VAR_FUNCTION(5, "dev", "wen0", V_88F6810_PLUS)),
219
+
MPP_MODE(33,
220
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
221
+
MPP_VAR_FUNCTION(1, "m", "decc_err", V_88F6810_PLUS),
222
+
MPP_VAR_FUNCTION(5, "dev", "ad3", V_88F6810_PLUS)),
223
+
MPP_MODE(34,
224
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
225
+
MPP_VAR_FUNCTION(5, "dev", "ad1", V_88F6810_PLUS)),
226
+
MPP_MODE(35,
227
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
228
+
MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6810_PLUS),
229
+
MPP_VAR_FUNCTION(5, "dev", "a1", V_88F6810_PLUS)),
230
+
MPP_MODE(36,
231
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
232
+
MPP_VAR_FUNCTION(1, "ptp", "trig_gen", V_88F6810_PLUS),
233
+
MPP_VAR_FUNCTION(5, "dev", "a0", V_88F6810_PLUS)),
234
+
MPP_MODE(37,
235
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
236
+
MPP_VAR_FUNCTION(1, "ptp", "clk", V_88F6810_PLUS),
237
+
MPP_VAR_FUNCTION(2, "ge1", "rxclk", V_88F6810_PLUS),
238
+
MPP_VAR_FUNCTION(4, "sd0", "d3", V_88F6810_PLUS),
239
+
MPP_VAR_FUNCTION(5, "dev", "ad8", V_88F6810_PLUS)),
240
+
MPP_MODE(38,
241
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
242
+
MPP_VAR_FUNCTION(1, "ptp", "event_req", V_88F6810_PLUS),
243
+
MPP_VAR_FUNCTION(2, "ge1", "rxd1", V_88F6810_PLUS),
244
+
MPP_VAR_FUNCTION(3, "ref", "clk_out0", V_88F6810_PLUS),
245
+
MPP_VAR_FUNCTION(4, "sd0", "d0", V_88F6810_PLUS),
246
+
MPP_VAR_FUNCTION(5, "dev", "ad4", V_88F6810_PLUS)),
247
+
MPP_MODE(39,
248
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
249
+
MPP_VAR_FUNCTION(1, "i2c1", "sck", V_88F6810_PLUS),
250
+
MPP_VAR_FUNCTION(2, "ge1", "rxd2", V_88F6810_PLUS),
251
+
MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6810_PLUS),
252
+
MPP_VAR_FUNCTION(4, "sd0", "d1", V_88F6810_PLUS),
253
+
MPP_VAR_FUNCTION(5, "dev", "a2", V_88F6810_PLUS)),
254
+
MPP_MODE(40,
255
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
256
+
MPP_VAR_FUNCTION(1, "i2c1", "sda", V_88F6810_PLUS),
257
+
MPP_VAR_FUNCTION(2, "ge1", "rxd3", V_88F6810_PLUS),
258
+
MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6810_PLUS),
259
+
MPP_VAR_FUNCTION(4, "sd0", "d2", V_88F6810_PLUS),
260
+
MPP_VAR_FUNCTION(5, "dev", "ad6", V_88F6810_PLUS)),
261
+
MPP_MODE(41,
262
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
263
+
MPP_VAR_FUNCTION(1, "ua1", "rxd", V_88F6810_PLUS),
264
+
MPP_VAR_FUNCTION(2, "ge1", "rxctl", V_88F6810_PLUS),
265
+
MPP_VAR_FUNCTION(3, "ua0", "cts", V_88F6810_PLUS),
266
+
MPP_VAR_FUNCTION(4, "spi1", "cs3", V_88F6810_PLUS),
267
+
MPP_VAR_FUNCTION(5, "dev", "burst/last", V_88F6810_PLUS)),
268
+
MPP_MODE(42,
269
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
270
+
MPP_VAR_FUNCTION(1, "ua1", "txd", V_88F6810_PLUS),
271
+
MPP_VAR_FUNCTION(3, "ua0", "rts", V_88F6810_PLUS),
272
+
MPP_VAR_FUNCTION(5, "dev", "ad7", V_88F6810_PLUS)),
273
+
MPP_MODE(43,
274
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
275
+
MPP_VAR_FUNCTION(1, "pcie0", "clkreq", V_88F6810_PLUS),
276
+
MPP_VAR_FUNCTION(2, "m", "vtt_ctrl", V_88F6810_PLUS),
277
+
MPP_VAR_FUNCTION(3, "m", "decc_err", V_88F6810_PLUS),
278
+
MPP_VAR_FUNCTION(4, "pcie0", "rstout", V_88F6810_PLUS),
279
+
MPP_VAR_FUNCTION(5, "dev", "clkout", V_88F6810_PLUS)),
280
+
MPP_MODE(44,
281
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
282
+
MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
283
+
MPP_VAR_FUNCTION(2, "sata1", "prsnt", V_88F6810_PLUS),
284
+
MPP_VAR_FUNCTION(3, "sata2", "prsnt", V_88F6828),
285
+
MPP_VAR_FUNCTION(4, "sata3", "prsnt", V_88F6828),
286
+
MPP_VAR_FUNCTION(5, "pcie0", "rstout", V_88F6810_PLUS)),
287
+
MPP_MODE(45,
288
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
289
+
MPP_VAR_FUNCTION(1, "ref", "clk_out0", V_88F6810_PLUS),
290
+
MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
291
+
MPP_VAR_FUNCTION(3, "pcie1", "rstout", V_88F6820_PLUS),
292
+
MPP_VAR_FUNCTION(4, "pcie2", "rstout", V_88F6810_PLUS),
293
+
MPP_VAR_FUNCTION(5, "pcie3", "rstout", V_88F6810_PLUS)),
294
+
MPP_MODE(46,
295
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
296
+
MPP_VAR_FUNCTION(1, "ref", "clk_out1", V_88F6810_PLUS),
297
+
MPP_VAR_FUNCTION(2, "pcie0", "rstout", V_88F6810_PLUS),
298
+
MPP_VAR_FUNCTION(3, "pcie1", "rstout", V_88F6820_PLUS),
299
+
MPP_VAR_FUNCTION(4, "pcie2", "rstout", V_88F6810_PLUS),
300
+
MPP_VAR_FUNCTION(5, "pcie3", "rstout", V_88F6810_PLUS)),
301
+
MPP_MODE(47,
302
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
303
+
MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
304
+
MPP_VAR_FUNCTION(2, "sata1", "prsnt", V_88F6810_PLUS),
305
+
MPP_VAR_FUNCTION(3, "sata2", "prsnt", V_88F6828),
306
+
MPP_VAR_FUNCTION(4, "spi1", "cs2", V_88F6810_PLUS),
307
+
MPP_VAR_FUNCTION(5, "sata3", "prsnt", V_88F6828)),
308
+
MPP_MODE(48,
309
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
310
+
MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
311
+
MPP_VAR_FUNCTION(2, "m", "vtt_ctrl", V_88F6810_PLUS),
312
+
MPP_VAR_FUNCTION(3, "tdm2c", "pclk", V_88F6810_PLUS),
313
+
MPP_VAR_FUNCTION(4, "audio", "mclk", V_88F6810_PLUS),
314
+
MPP_VAR_FUNCTION(5, "sd0", "d4", V_88F6810_PLUS)),
315
+
MPP_MODE(49,
316
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
317
+
MPP_VAR_FUNCTION(1, "sata2", "prsnt", V_88F6828),
318
+
MPP_VAR_FUNCTION(2, "sata3", "prsnt", V_88F6828),
319
+
MPP_VAR_FUNCTION(3, "tdm2c", "fsync", V_88F6810_PLUS),
320
+
MPP_VAR_FUNCTION(4, "audio", "lrclk", V_88F6810_PLUS),
321
+
MPP_VAR_FUNCTION(5, "sd0", "d5", V_88F6810_PLUS)),
322
+
MPP_MODE(50,
323
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
324
+
MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
325
+
MPP_VAR_FUNCTION(2, "pcie1", "rstout", V_88F6820_PLUS),
326
+
MPP_VAR_FUNCTION(3, "tdm2c", "drx", V_88F6810_PLUS),
327
+
MPP_VAR_FUNCTION(4, "audio", "extclk", V_88F6810_PLUS),
328
+
MPP_VAR_FUNCTION(5, "sd0", "cmd", V_88F6810_PLUS)),
329
+
MPP_MODE(51,
330
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
331
+
MPP_VAR_FUNCTION(3, "tdm2c", "dtx", V_88F6810_PLUS),
332
+
MPP_VAR_FUNCTION(4, "audio", "sdo", V_88F6810_PLUS),
333
+
MPP_VAR_FUNCTION(5, "m", "decc_err", V_88F6810_PLUS)),
334
+
MPP_MODE(52,
335
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
336
+
MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
337
+
MPP_VAR_FUNCTION(2, "pcie1", "rstout", V_88F6820_PLUS),
338
+
MPP_VAR_FUNCTION(3, "tdm2c", "intn", V_88F6810_PLUS),
339
+
MPP_VAR_FUNCTION(4, "audio", "sdi", V_88F6810_PLUS),
340
+
MPP_VAR_FUNCTION(5, "sd0", "d6", V_88F6810_PLUS)),
341
+
MPP_MODE(53,
342
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
343
+
MPP_VAR_FUNCTION(1, "sata1", "prsnt", V_88F6810_PLUS),
344
+
MPP_VAR_FUNCTION(2, "sata0", "prsnt", V_88F6810_PLUS),
345
+
MPP_VAR_FUNCTION(3, "tdm2c", "rstn", V_88F6810_PLUS),
346
+
MPP_VAR_FUNCTION(4, "audio", "bclk", V_88F6810_PLUS),
347
+
MPP_VAR_FUNCTION(5, "sd0", "d7", V_88F6810_PLUS)),
348
+
MPP_MODE(54,
349
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
350
+
MPP_VAR_FUNCTION(1, "sata0", "prsnt", V_88F6810_PLUS),
351
+
MPP_VAR_FUNCTION(2, "sata1", "prsnt", V_88F6810_PLUS),
352
+
MPP_VAR_FUNCTION(3, "pcie0", "rstout", V_88F6810_PLUS),
353
+
MPP_VAR_FUNCTION(4, "pcie1", "rstout", V_88F6820_PLUS),
354
+
MPP_VAR_FUNCTION(5, "sd0", "d3", V_88F6810_PLUS)),
355
+
MPP_MODE(55,
356
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
357
+
MPP_VAR_FUNCTION(1, "ua1", "cts", V_88F6810_PLUS),
358
+
MPP_VAR_FUNCTION(2, "ge", "mdio", V_88F6810_PLUS),
359
+
MPP_VAR_FUNCTION(3, "pcie1", "clkreq", V_88F6820_PLUS),
360
+
MPP_VAR_FUNCTION(4, "spi1", "cs1", V_88F6810_PLUS),
361
+
MPP_VAR_FUNCTION(5, "sd0", "d0", V_88F6810_PLUS)),
362
+
MPP_MODE(56,
363
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
364
+
MPP_VAR_FUNCTION(1, "ua1", "rts", V_88F6810_PLUS),
365
+
MPP_VAR_FUNCTION(2, "ge", "mdc", V_88F6810_PLUS),
366
+
MPP_VAR_FUNCTION(3, "m", "decc_err", V_88F6810_PLUS),
367
+
MPP_VAR_FUNCTION(4, "spi1", "mosi", V_88F6810_PLUS)),
368
+
MPP_MODE(57,
369
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
370
+
MPP_VAR_FUNCTION(4, "spi1", "sck", V_88F6810_PLUS),
371
+
MPP_VAR_FUNCTION(5, "sd0", "clk", V_88F6810_PLUS)),
372
+
MPP_MODE(58,
373
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
374
+
MPP_VAR_FUNCTION(1, "pcie1", "clkreq", V_88F6820_PLUS),
375
+
MPP_VAR_FUNCTION(2, "i2c1", "sck", V_88F6810_PLUS),
376
+
MPP_VAR_FUNCTION(3, "pcie2", "clkreq", V_88F6810_PLUS),
377
+
MPP_VAR_FUNCTION(4, "spi1", "miso", V_88F6810_PLUS),
378
+
MPP_VAR_FUNCTION(5, "sd0", "d1", V_88F6810_PLUS)),
379
+
MPP_MODE(59,
380
+
MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
381
+
MPP_VAR_FUNCTION(1, "pcie0", "rstout", V_88F6810_PLUS),
382
+
MPP_VAR_FUNCTION(2, "i2c1", "sda", V_88F6810_PLUS),
383
+
MPP_VAR_FUNCTION(3, "pcie1", "rstout", V_88F6820_PLUS),
384
+
MPP_VAR_FUNCTION(4, "spi1", "cs0", V_88F6810_PLUS),
385
+
MPP_VAR_FUNCTION(5, "sd0", "d2", V_88F6810_PLUS)),
386
+
};
387
+
388
+
static struct mvebu_pinctrl_soc_info armada_38x_pinctrl_info;
389
+
390
+
static struct of_device_id armada_38x_pinctrl_of_match[] = {
391
+
{
392
+
.compatible = "marvell,mv88f6810-pinctrl",
393
+
.data = (void *) V_88F6810,
394
+
},
395
+
{
396
+
.compatible = "marvell,mv88f6820-pinctrl",
397
+
.data = (void *) V_88F6820,
398
+
},
399
+
{
400
+
.compatible = "marvell,mv88f6828-pinctrl",
401
+
.data = (void *) V_88F6828,
402
+
},
403
+
{ },
404
+
};
405
+
406
+
static struct mvebu_mpp_ctrl armada_38x_mpp_controls[] = {
407
+
MPP_FUNC_CTRL(0, 59, NULL, armada_38x_mpp_ctrl),
408
+
};
409
+
410
+
static struct pinctrl_gpio_range armada_38x_mpp_gpio_ranges[] = {
411
+
MPP_GPIO_RANGE(0, 0, 0, 32),
412
+
MPP_GPIO_RANGE(1, 32, 32, 27),
413
+
};
414
+
415
+
static int armada_38x_pinctrl_probe(struct platform_device *pdev)
416
+
{
417
+
struct mvebu_pinctrl_soc_info *soc = &armada_38x_pinctrl_info;
418
+
const struct of_device_id *match =
419
+
of_match_device(armada_38x_pinctrl_of_match, &pdev->dev);
420
+
struct resource *res;
421
+
422
+
if (!match)
423
+
return -ENODEV;
424
+
425
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
426
+
mpp_base = devm_ioremap_resource(&pdev->dev, res);
427
+
if (IS_ERR(mpp_base))
428
+
return PTR_ERR(mpp_base);
429
+
430
+
soc->variant = (unsigned) match->data & 0xff;
431
+
soc->controls = armada_38x_mpp_controls;
432
+
soc->ncontrols = ARRAY_SIZE(armada_38x_mpp_controls);
433
+
soc->gpioranges = armada_38x_mpp_gpio_ranges;
434
+
soc->ngpioranges = ARRAY_SIZE(armada_38x_mpp_gpio_ranges);
435
+
soc->modes = armada_38x_mpp_modes;
436
+
soc->nmodes = armada_38x_mpp_controls[0].npins;
437
+
438
+
pdev->dev.platform_data = soc;
439
+
440
+
return mvebu_pinctrl_probe(pdev);
441
+
}
442
+
443
+
static int armada_38x_pinctrl_remove(struct platform_device *pdev)
444
+
{
445
+
return mvebu_pinctrl_remove(pdev);
446
+
}
447
+
448
+
static struct platform_driver armada_38x_pinctrl_driver = {
449
+
.driver = {
450
+
.name = "armada-38x-pinctrl",
451
+
.owner = THIS_MODULE,
452
+
.of_match_table = of_match_ptr(armada_38x_pinctrl_of_match),
453
+
},
454
+
.probe = armada_38x_pinctrl_probe,
455
+
.remove = armada_38x_pinctrl_remove,
456
+
};
457
+
458
+
module_platform_driver(armada_38x_pinctrl_driver);
459
+
460
+
MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
461
+
MODULE_DESCRIPTION("Marvell Armada 38x pinctrl driver");
462
+
MODULE_LICENSE("GPL v2");