tjh.dev / kernel
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ARM: dts: bcm-mobile: Fix most DTC W=1 warnings

Fix the bulk of the unit_address_vs_reg warnings and unnecessary
\#address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

Florian Fainelli c8159a6b c7b23bcb

+18 -18
+6 -6
arch/arm/boot/dts/bcm11351.dtsi
··· 100 100 reg-io-width = <4>; 101 101 }; 102 102 103 - L2: l2-cache { 103 + L2: l2-cache@3ff20000 { 104 104 compatible = "brcm,bcm11351-a2-pl310-cache"; 105 105 reg = <0x3ff20000 0x1000>; 106 106 cache-unified; ··· 225 225 #size-cells = <1>; 226 226 ranges; 227 227 228 - root_ccu: root_ccu { 228 + root_ccu: root_ccu@35001000 { 229 229 compatible = "brcm,bcm11351-root-ccu"; 230 230 reg = <0x35001000 0x0f00>; 231 231 #clock-cells = <1>; 232 232 clock-output-names = "frac_1m"; 233 233 }; 234 234 235 - hub_ccu: hub_ccu { 235 + hub_ccu: hub_ccu@34000000 { 236 236 compatible = "brcm,bcm11351-hub-ccu"; 237 237 reg = <0x34000000 0x0f00>; 238 238 #clock-cells = <1>; 239 239 clock-output-names = "tmon_1m"; 240 240 }; 241 241 242 - aon_ccu: aon_ccu { 242 + aon_ccu: aon_ccu@35002000 { 243 243 compatible = "brcm,bcm11351-aon-ccu"; 244 244 reg = <0x35002000 0x0f00>; 245 245 #clock-cells = <1>; ··· 248 248 "pmu_bsc_var"; 249 249 }; 250 250 251 - master_ccu: master_ccu { 251 + master_ccu: master_ccu@3f001000 { 252 252 compatible = "brcm,bcm11351-master-ccu"; 253 253 reg = <0x3f001000 0x0f00>; 254 254 #clock-cells = <1>; ··· 261 261 "hsic2_12m"; 262 262 }; 263 263 264 - slave_ccu: slave_ccu { 264 + slave_ccu: slave_ccu@3e011000 { 265 265 compatible = "brcm,bcm11351-slave-ccu"; 266 266 reg = <0x3e011000 0x0f00>; 267 267 #clock-cells = <1>;
+1 -1
arch/arm/boot/dts/bcm21664-garnet.dts
··· 21 21 model = "BCM21664 Garnet board"; 22 22 compatible = "brcm,bcm21664-garnet", "brcm,bcm21664"; 23 23 24 - memory { 24 + memory@80000000 { 25 25 device_type = "memory"; 26 26 reg = <0x80000000 0x40000000>; /* 1 GB */ 27 27 };
+5 -5
arch/arm/boot/dts/bcm21664.dtsi
··· 90 90 reg-io-width = <4>; 91 91 }; 92 92 93 - L2: l2-cache { 93 + L2: l2-cache@3ff20000 { 94 94 compatible = "arm,pl310-cache"; 95 95 reg = <0x3ff20000 0x1000>; 96 96 cache-unified; ··· 295 295 clock-frequency = <156000000>; 296 296 }; 297 297 298 - root_ccu: root_ccu { 298 + root_ccu: root_ccu@35001000 { 299 299 compatible = BCM21664_DT_ROOT_CCU_COMPAT; 300 300 reg = <0x35001000 0x0f00>; 301 301 #clock-cells = <1>; 302 302 clock-output-names = "frac_1m"; 303 303 }; 304 304 305 - aon_ccu: aon_ccu { 305 + aon_ccu: aon_ccu@35002000 { 306 306 compatible = BCM21664_DT_AON_CCU_COMPAT; 307 307 reg = <0x35002000 0x0f00>; 308 308 #clock-cells = <1>; 309 309 clock-output-names = "hub_timer"; 310 310 }; 311 311 312 - master_ccu: master_ccu { 312 + master_ccu: master_ccu@3f001000 { 313 313 compatible = BCM21664_DT_MASTER_CCU_COMPAT; 314 314 reg = <0x3f001000 0x0f00>; 315 315 #clock-cells = <1>; ··· 323 323 "sdio4_sleep"; 324 324 }; 325 325 326 - slave_ccu: slave_ccu { 326 + slave_ccu: slave_ccu@3e011000 { 327 327 compatible = BCM21664_DT_SLAVE_CCU_COMPAT; 328 328 reg = <0x3e011000 0x0f00>; 329 329 #clock-cells = <1>;
+1 -1
arch/arm/boot/dts/bcm23550-sparrow.dts
··· 45 45 bootargs = "console=ttyS0,115200n8"; 46 46 }; 47 47 48 - memory { 48 + memory@80000000 { 49 49 device_type = "memory"; 50 50 reg = <0x80000000 0x20000000>; /* 512 MB */ 51 51 };
+4 -4
arch/arm/boot/dts/bcm23550.dtsi
··· 371 371 clock-frequency = <156000000>; 372 372 }; 373 373 374 - root_ccu: root_ccu { 374 + root_ccu: root_ccu@35001000 { 375 375 compatible = BCM21664_DT_ROOT_CCU_COMPAT; 376 376 reg = <0x35001000 0x0f00>; 377 377 #clock-cells = <1>; 378 378 clock-output-names = "frac_1m"; 379 379 }; 380 380 381 - aon_ccu: aon_ccu { 381 + aon_ccu: aon_ccu@35002000 { 382 382 compatible = BCM21664_DT_AON_CCU_COMPAT; 383 383 reg = <0x35002000 0x0f00>; 384 384 #clock-cells = <1>; 385 385 clock-output-names = "hub_timer"; 386 386 }; 387 387 388 - slave_ccu: slave_ccu { 388 + slave_ccu: slave_ccu@3e011000 { 389 389 compatible = BCM21664_DT_SLAVE_CCU_COMPAT; 390 390 reg = <0x3e011000 0x0f00>; 391 391 #clock-cells = <1>; ··· 398 398 "bsc4"; 399 399 }; 400 400 401 - master_ccu: master_ccu { 401 + master_ccu: master_ccu@3f001000 { 402 402 compatible = BCM21664_DT_MASTER_CCU_COMPAT; 403 403 reg = <0x3f001000 0x0f00>; 404 404 #clock-cells = <1>;
+1 -1
arch/arm/boot/dts/bcm28155-ap.dts
··· 21 21 model = "BCM28155 AP board"; 22 22 compatible = "brcm,bcm28155-ap", "brcm,bcm11351"; 23 23 24 - memory { 24 + memory@80000000 { 25 25 device_type = "memory"; 26 26 reg = <0x80000000 0x40000000>; /* 1 GB */ 27 27 };