Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/radeon: add get_allowed_info_register for r6xx/r7xx

Registers that can be fetched from the info ioctl.

Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

+32
+26
drivers/gpu/drm/radeon/r600.c
··· 109 109 extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev); 110 110 111 111 /** 112 + * r600_get_allowed_info_register - fetch the register for the info ioctl 113 + * 114 + * @rdev: radeon_device pointer 115 + * @reg: register offset in bytes 116 + * @val: register value 117 + * 118 + * Returns 0 for success or -EINVAL for an invalid register 119 + * 120 + */ 121 + int r600_get_allowed_info_register(struct radeon_device *rdev, 122 + u32 reg, u32 *val) 123 + { 124 + switch (reg) { 125 + case GRBM_STATUS: 126 + case GRBM_STATUS2: 127 + case R_000E50_SRBM_STATUS: 128 + case DMA_STATUS_REG: 129 + case UVD_STATUS: 130 + *val = RREG32(reg); 131 + return 0; 132 + default: 133 + return -EINVAL; 134 + } 135 + } 136 + 137 + /** 112 138 * r600_get_xclk - get the xclk 113 139 * 114 140 * @rdev: radeon_device pointer
+4
drivers/gpu/drm/radeon/radeon_asic.c
··· 940 940 .mc_wait_for_idle = &r600_mc_wait_for_idle, 941 941 .get_xclk = &r600_get_xclk, 942 942 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 943 + .get_allowed_info_register = r600_get_allowed_info_register, 943 944 .gart = { 944 945 .tlb_flush = &r600_pcie_gart_tlb_flush, 945 946 .get_page_entry = &rs600_gart_get_page_entry, ··· 1025 1024 .mc_wait_for_idle = &r600_mc_wait_for_idle, 1026 1025 .get_xclk = &r600_get_xclk, 1027 1026 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1027 + .get_allowed_info_register = r600_get_allowed_info_register, 1028 1028 .gart = { 1029 1029 .tlb_flush = &r600_pcie_gart_tlb_flush, 1030 1030 .get_page_entry = &rs600_gart_get_page_entry, ··· 1118 1116 .mc_wait_for_idle = &r600_mc_wait_for_idle, 1119 1117 .get_xclk = &r600_get_xclk, 1120 1118 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1119 + .get_allowed_info_register = r600_get_allowed_info_register, 1121 1120 .gart = { 1122 1121 .tlb_flush = &r600_pcie_gart_tlb_flush, 1123 1122 .get_page_entry = &rs600_gart_get_page_entry, ··· 1224 1221 .mc_wait_for_idle = &r600_mc_wait_for_idle, 1225 1222 .get_xclk = &rv770_get_xclk, 1226 1223 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1224 + .get_allowed_info_register = r600_get_allowed_info_register, 1227 1225 .gart = { 1228 1226 .tlb_flush = &r600_pcie_gart_tlb_flush, 1229 1227 .get_page_entry = &rs600_gart_get_page_entry,
+2
drivers/gpu/drm/radeon/radeon_asic.h
··· 384 384 struct radeon_ring *ring); 385 385 void r600_gfx_set_wptr(struct radeon_device *rdev, 386 386 struct radeon_ring *ring); 387 + int r600_get_allowed_info_register(struct radeon_device *rdev, 388 + u32 reg, u32 *val); 387 389 /* r600 irq */ 388 390 int r600_irq_process(struct radeon_device *rdev); 389 391 int r600_irq_init(struct radeon_device *rdev);