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ARM: dts: exynos: Move Exynos5420 bus related OPPs to the Odroid boards DTS

Currently the only Exynos5422-based boards that support bus frequency
scaling are Hardkernel's Odroid XU3/XU4/HC1. Move the bus related OPPs
to the boards DTS, because those OPPs heavily depend on the clock
topology and top PLL rates, which are being configured by the board's
bootloader.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

authored by

Marek Szyprowski and committed by
Krzysztof Kozlowski c6d0192a 5206265f

+260 -260
-259
arch/arm/boot/dts/exynos5420.dtsi
··· 1042 1042 compatible = "samsung,exynos-bus"; 1043 1043 clocks = <&clock CLK_DOUT_ACLK400_WCORE>; 1044 1044 clock-names = "bus"; 1045 - operating-points-v2 = <&bus_wcore_opp_table>; 1046 1045 status = "disabled"; 1047 1046 }; 1048 1047 ··· 1049 1050 compatible = "samsung,exynos-bus"; 1050 1051 clocks = <&clock CLK_DOUT_ACLK100_NOC>; 1051 1052 clock-names = "bus"; 1052 - operating-points-v2 = <&bus_noc_opp_table>; 1053 1053 status = "disabled"; 1054 1054 }; 1055 1055 ··· 1056 1058 compatible = "samsung,exynos-bus"; 1057 1059 clocks = <&clock CLK_DOUT_PCLK200_FSYS>; 1058 1060 clock-names = "bus"; 1059 - operating-points-v2 = <&bus_fsys_apb_opp_table>; 1060 1061 status = "disabled"; 1061 1062 }; 1062 1063 ··· 1063 1066 compatible = "samsung,exynos-bus"; 1064 1067 clocks = <&clock CLK_DOUT_ACLK200_FSYS>; 1065 1068 clock-names = "bus"; 1066 - operating-points-v2 = <&bus_fsys_apb_opp_table>; 1067 1069 status = "disabled"; 1068 1070 }; 1069 1071 ··· 1070 1074 compatible = "samsung,exynos-bus"; 1071 1075 clocks = <&clock CLK_DOUT_ACLK200_FSYS2>; 1072 1076 clock-names = "bus"; 1073 - operating-points-v2 = <&bus_fsys2_opp_table>; 1074 1077 status = "disabled"; 1075 1078 }; 1076 1079 ··· 1077 1082 compatible = "samsung,exynos-bus"; 1078 1083 clocks = <&clock CLK_DOUT_ACLK333>; 1079 1084 clock-names = "bus"; 1080 - operating-points-v2 = <&bus_mfc_opp_table>; 1081 1085 status = "disabled"; 1082 1086 }; 1083 1087 ··· 1084 1090 compatible = "samsung,exynos-bus"; 1085 1091 clocks = <&clock CLK_DOUT_ACLK266>; 1086 1092 clock-names = "bus"; 1087 - operating-points-v2 = <&bus_gen_opp_table>; 1088 1093 status = "disabled"; 1089 1094 }; 1090 1095 ··· 1091 1098 compatible = "samsung,exynos-bus"; 1092 1099 clocks = <&clock CLK_DOUT_ACLK66>; 1093 1100 clock-names = "bus"; 1094 - operating-points-v2 = <&bus_peri_opp_table>; 1095 1101 status = "disabled"; 1096 1102 }; 1097 1103 ··· 1098 1106 compatible = "samsung,exynos-bus"; 1099 1107 clocks = <&clock CLK_DOUT_ACLK333_G2D>; 1100 1108 clock-names = "bus"; 1101 - operating-points-v2 = <&bus_g2d_opp_table>; 1102 1109 status = "disabled"; 1103 1110 }; 1104 1111 ··· 1105 1114 compatible = "samsung,exynos-bus"; 1106 1115 clocks = <&clock CLK_DOUT_ACLK266_G2D>; 1107 1116 clock-names = "bus"; 1108 - operating-points-v2 = <&bus_g2d_acp_opp_table>; 1109 1117 status = "disabled"; 1110 1118 }; 1111 1119 ··· 1112 1122 compatible = "samsung,exynos-bus"; 1113 1123 clocks = <&clock CLK_DOUT_ACLK300_JPEG>; 1114 1124 clock-names = "bus"; 1115 - operating-points-v2 = <&bus_jpeg_opp_table>; 1116 1125 status = "disabled"; 1117 1126 }; 1118 1127 ··· 1119 1130 compatible = "samsung,exynos-bus"; 1120 1131 clocks = <&clock CLK_DOUT_ACLK166>; 1121 1132 clock-names = "bus"; 1122 - operating-points-v2 = <&bus_jpeg_apb_opp_table>; 1123 1133 status = "disabled"; 1124 1134 }; 1125 1135 ··· 1126 1138 compatible = "samsung,exynos-bus"; 1127 1139 clocks = <&clock CLK_DOUT_ACLK300_DISP1>; 1128 1140 clock-names = "bus"; 1129 - operating-points-v2 = <&bus_disp1_fimd_opp_table>; 1130 1141 status = "disabled"; 1131 1142 }; 1132 1143 ··· 1133 1146 compatible = "samsung,exynos-bus"; 1134 1147 clocks = <&clock CLK_DOUT_ACLK400_DISP1>; 1135 1148 clock-names = "bus"; 1136 - operating-points-v2 = <&bus_disp1_opp_table>; 1137 1149 status = "disabled"; 1138 1150 }; 1139 1151 ··· 1140 1154 compatible = "samsung,exynos-bus"; 1141 1155 clocks = <&clock CLK_DOUT_ACLK300_GSCL>; 1142 1156 clock-names = "bus"; 1143 - operating-points-v2 = <&bus_gscl_opp_table>; 1144 1157 status = "disabled"; 1145 1158 }; 1146 1159 ··· 1147 1162 compatible = "samsung,exynos-bus"; 1148 1163 clocks = <&clock CLK_DOUT_ACLK400_MSCL>; 1149 1164 clock-names = "bus"; 1150 - operating-points-v2 = <&bus_mscl_opp_table>; 1151 1165 status = "disabled"; 1152 - }; 1153 - 1154 - bus_wcore_opp_table: opp_table2 { 1155 - compatible = "operating-points-v2"; 1156 - 1157 - opp00 { 1158 - opp-hz = /bits/ 64 <84000000>; 1159 - opp-microvolt = <925000 925000 1400000>; 1160 - }; 1161 - opp01 { 1162 - opp-hz = /bits/ 64 <111000000>; 1163 - opp-microvolt = <950000 950000 1400000>; 1164 - }; 1165 - opp02 { 1166 - opp-hz = /bits/ 64 <222000000>; 1167 - opp-microvolt = <950000 950000 1400000>; 1168 - }; 1169 - opp03 { 1170 - opp-hz = /bits/ 64 <333000000>; 1171 - opp-microvolt = <950000 950000 1400000>; 1172 - }; 1173 - opp04 { 1174 - opp-hz = /bits/ 64 <400000000>; 1175 - opp-microvolt = <987500 987500 1400000>; 1176 - }; 1177 - }; 1178 - 1179 - bus_noc_opp_table: opp_table3 { 1180 - compatible = "operating-points-v2"; 1181 - 1182 - opp00 { 1183 - opp-hz = /bits/ 64 <67000000>; 1184 - }; 1185 - opp01 { 1186 - opp-hz = /bits/ 64 <75000000>; 1187 - }; 1188 - opp02 { 1189 - opp-hz = /bits/ 64 <86000000>; 1190 - }; 1191 - opp03 { 1192 - opp-hz = /bits/ 64 <100000000>; 1193 - }; 1194 - }; 1195 - 1196 - bus_fsys_apb_opp_table: opp_table4 { 1197 - compatible = "operating-points-v2"; 1198 - opp-shared; 1199 - 1200 - opp00 { 1201 - opp-hz = /bits/ 64 <100000000>; 1202 - }; 1203 - opp01 { 1204 - opp-hz = /bits/ 64 <200000000>; 1205 - }; 1206 - }; 1207 - 1208 - bus_fsys2_opp_table: opp_table5 { 1209 - compatible = "operating-points-v2"; 1210 - 1211 - opp00 { 1212 - opp-hz = /bits/ 64 <75000000>; 1213 - }; 1214 - opp01 { 1215 - opp-hz = /bits/ 64 <100000000>; 1216 - }; 1217 - opp02 { 1218 - opp-hz = /bits/ 64 <150000000>; 1219 - }; 1220 - }; 1221 - 1222 - bus_mfc_opp_table: opp_table6 { 1223 - compatible = "operating-points-v2"; 1224 - 1225 - opp00 { 1226 - opp-hz = /bits/ 64 <96000000>; 1227 - }; 1228 - opp01 { 1229 - opp-hz = /bits/ 64 <111000000>; 1230 - }; 1231 - opp02 { 1232 - opp-hz = /bits/ 64 <167000000>; 1233 - }; 1234 - opp03 { 1235 - opp-hz = /bits/ 64 <222000000>; 1236 - }; 1237 - opp04 { 1238 - opp-hz = /bits/ 64 <333000000>; 1239 - }; 1240 - }; 1241 - 1242 - bus_gen_opp_table: opp_table7 { 1243 - compatible = "operating-points-v2"; 1244 - 1245 - opp00 { 1246 - opp-hz = /bits/ 64 <89000000>; 1247 - }; 1248 - opp01 { 1249 - opp-hz = /bits/ 64 <133000000>; 1250 - }; 1251 - opp02 { 1252 - opp-hz = /bits/ 64 <178000000>; 1253 - }; 1254 - opp03 { 1255 - opp-hz = /bits/ 64 <267000000>; 1256 - }; 1257 - }; 1258 - 1259 - bus_peri_opp_table: opp_table8 { 1260 - compatible = "operating-points-v2"; 1261 - 1262 - opp00 { 1263 - opp-hz = /bits/ 64 <67000000>; 1264 - }; 1265 - }; 1266 - 1267 - bus_g2d_opp_table: opp_table9 { 1268 - compatible = "operating-points-v2"; 1269 - 1270 - opp00 { 1271 - opp-hz = /bits/ 64 <84000000>; 1272 - }; 1273 - opp01 { 1274 - opp-hz = /bits/ 64 <167000000>; 1275 - }; 1276 - opp02 { 1277 - opp-hz = /bits/ 64 <222000000>; 1278 - }; 1279 - opp03 { 1280 - opp-hz = /bits/ 64 <300000000>; 1281 - }; 1282 - opp04 { 1283 - opp-hz = /bits/ 64 <333000000>; 1284 - }; 1285 - }; 1286 - 1287 - bus_g2d_acp_opp_table: opp_table10 { 1288 - compatible = "operating-points-v2"; 1289 - 1290 - opp00 { 1291 - opp-hz = /bits/ 64 <67000000>; 1292 - }; 1293 - opp01 { 1294 - opp-hz = /bits/ 64 <133000000>; 1295 - }; 1296 - opp02 { 1297 - opp-hz = /bits/ 64 <178000000>; 1298 - }; 1299 - opp03 { 1300 - opp-hz = /bits/ 64 <267000000>; 1301 - }; 1302 - }; 1303 - 1304 - bus_jpeg_opp_table: opp_table11 { 1305 - compatible = "operating-points-v2"; 1306 - 1307 - opp00 { 1308 - opp-hz = /bits/ 64 <75000000>; 1309 - }; 1310 - opp01 { 1311 - opp-hz = /bits/ 64 <150000000>; 1312 - }; 1313 - opp02 { 1314 - opp-hz = /bits/ 64 <200000000>; 1315 - }; 1316 - opp03 { 1317 - opp-hz = /bits/ 64 <300000000>; 1318 - }; 1319 - }; 1320 - 1321 - bus_jpeg_apb_opp_table: opp_table12 { 1322 - compatible = "operating-points-v2"; 1323 - 1324 - opp00 { 1325 - opp-hz = /bits/ 64 <84000000>; 1326 - }; 1327 - opp01 { 1328 - opp-hz = /bits/ 64 <111000000>; 1329 - }; 1330 - opp02 { 1331 - opp-hz = /bits/ 64 <134000000>; 1332 - }; 1333 - opp03 { 1334 - opp-hz = /bits/ 64 <167000000>; 1335 - }; 1336 - }; 1337 - 1338 - bus_disp1_fimd_opp_table: opp_table13 { 1339 - compatible = "operating-points-v2"; 1340 - 1341 - opp00 { 1342 - opp-hz = /bits/ 64 <120000000>; 1343 - }; 1344 - opp01 { 1345 - opp-hz = /bits/ 64 <200000000>; 1346 - }; 1347 - }; 1348 - 1349 - bus_disp1_opp_table: opp_table14 { 1350 - compatible = "operating-points-v2"; 1351 - 1352 - opp00 { 1353 - opp-hz = /bits/ 64 <120000000>; 1354 - }; 1355 - opp01 { 1356 - opp-hz = /bits/ 64 <200000000>; 1357 - }; 1358 - opp02 { 1359 - opp-hz = /bits/ 64 <300000000>; 1360 - }; 1361 - }; 1362 - 1363 - bus_gscl_opp_table: opp_table15 { 1364 - compatible = "operating-points-v2"; 1365 - 1366 - opp00 { 1367 - opp-hz = /bits/ 64 <150000000>; 1368 - }; 1369 - opp01 { 1370 - opp-hz = /bits/ 64 <200000000>; 1371 - }; 1372 - opp02 { 1373 - opp-hz = /bits/ 64 <300000000>; 1374 - }; 1375 - }; 1376 - 1377 - bus_mscl_opp_table: opp_table16 { 1378 - compatible = "operating-points-v2"; 1379 - 1380 - opp00 { 1381 - opp-hz = /bits/ 64 <84000000>; 1382 - }; 1383 - opp01 { 1384 - opp-hz = /bits/ 64 <167000000>; 1385 - }; 1386 - opp02 { 1387 - opp-hz = /bits/ 64 <222000000>; 1388 - }; 1389 - opp03 { 1390 - opp-hz = /bits/ 64 <333000000>; 1391 - }; 1392 - opp04 { 1393 - opp-hz = /bits/ 64 <400000000>; 1394 - }; 1395 1166 }; 1396 1167 }; 1397 1168
+260 -1
arch/arm/boot/dts/exynos5422-odroid-core.dtsi
··· 35 35 }; 36 36 }; 37 37 38 - dmc_opp_table: opp_table2 { 38 + bus_wcore_opp_table: opp_table2 { 39 + compatible = "operating-points-v2"; 40 + 41 + opp00 { 42 + opp-hz = /bits/ 64 <84000000>; 43 + opp-microvolt = <925000 925000 1400000>; 44 + }; 45 + opp01 { 46 + opp-hz = /bits/ 64 <111000000>; 47 + opp-microvolt = <950000 950000 1400000>; 48 + }; 49 + opp02 { 50 + opp-hz = /bits/ 64 <222000000>; 51 + opp-microvolt = <950000 950000 1400000>; 52 + }; 53 + opp03 { 54 + opp-hz = /bits/ 64 <333000000>; 55 + opp-microvolt = <950000 950000 1400000>; 56 + }; 57 + opp04 { 58 + opp-hz = /bits/ 64 <400000000>; 59 + opp-microvolt = <987500 987500 1400000>; 60 + }; 61 + }; 62 + 63 + bus_noc_opp_table: opp_table3 { 64 + compatible = "operating-points-v2"; 65 + 66 + opp00 { 67 + opp-hz = /bits/ 64 <67000000>; 68 + }; 69 + opp01 { 70 + opp-hz = /bits/ 64 <75000000>; 71 + }; 72 + opp02 { 73 + opp-hz = /bits/ 64 <86000000>; 74 + }; 75 + opp03 { 76 + opp-hz = /bits/ 64 <100000000>; 77 + }; 78 + }; 79 + 80 + bus_fsys_apb_opp_table: opp_table4 { 81 + compatible = "operating-points-v2"; 82 + opp-shared; 83 + 84 + opp00 { 85 + opp-hz = /bits/ 64 <100000000>; 86 + }; 87 + opp01 { 88 + opp-hz = /bits/ 64 <200000000>; 89 + }; 90 + }; 91 + 92 + bus_fsys2_opp_table: opp_table5 { 93 + compatible = "operating-points-v2"; 94 + 95 + opp00 { 96 + opp-hz = /bits/ 64 <75000000>; 97 + }; 98 + opp01 { 99 + opp-hz = /bits/ 64 <100000000>; 100 + }; 101 + opp02 { 102 + opp-hz = /bits/ 64 <150000000>; 103 + }; 104 + }; 105 + 106 + bus_mfc_opp_table: opp_table6 { 107 + compatible = "operating-points-v2"; 108 + 109 + opp00 { 110 + opp-hz = /bits/ 64 <96000000>; 111 + }; 112 + opp01 { 113 + opp-hz = /bits/ 64 <111000000>; 114 + }; 115 + opp02 { 116 + opp-hz = /bits/ 64 <167000000>; 117 + }; 118 + opp03 { 119 + opp-hz = /bits/ 64 <222000000>; 120 + }; 121 + opp04 { 122 + opp-hz = /bits/ 64 <333000000>; 123 + }; 124 + }; 125 + 126 + bus_gen_opp_table: opp_table7 { 127 + compatible = "operating-points-v2"; 128 + 129 + opp00 { 130 + opp-hz = /bits/ 64 <89000000>; 131 + }; 132 + opp01 { 133 + opp-hz = /bits/ 64 <133000000>; 134 + }; 135 + opp02 { 136 + opp-hz = /bits/ 64 <178000000>; 137 + }; 138 + opp03 { 139 + opp-hz = /bits/ 64 <267000000>; 140 + }; 141 + }; 142 + 143 + bus_peri_opp_table: opp_table8 { 144 + compatible = "operating-points-v2"; 145 + 146 + opp00 { 147 + opp-hz = /bits/ 64 <67000000>; 148 + }; 149 + }; 150 + 151 + bus_g2d_opp_table: opp_table9 { 152 + compatible = "operating-points-v2"; 153 + 154 + opp00 { 155 + opp-hz = /bits/ 64 <84000000>; 156 + }; 157 + opp01 { 158 + opp-hz = /bits/ 64 <167000000>; 159 + }; 160 + opp02 { 161 + opp-hz = /bits/ 64 <222000000>; 162 + }; 163 + opp03 { 164 + opp-hz = /bits/ 64 <300000000>; 165 + }; 166 + opp04 { 167 + opp-hz = /bits/ 64 <333000000>; 168 + }; 169 + }; 170 + 171 + bus_g2d_acp_opp_table: opp_table10 { 172 + compatible = "operating-points-v2"; 173 + 174 + opp00 { 175 + opp-hz = /bits/ 64 <67000000>; 176 + }; 177 + opp01 { 178 + opp-hz = /bits/ 64 <133000000>; 179 + }; 180 + opp02 { 181 + opp-hz = /bits/ 64 <178000000>; 182 + }; 183 + opp03 { 184 + opp-hz = /bits/ 64 <267000000>; 185 + }; 186 + }; 187 + 188 + bus_jpeg_opp_table: opp_table11 { 189 + compatible = "operating-points-v2"; 190 + 191 + opp00 { 192 + opp-hz = /bits/ 64 <75000000>; 193 + }; 194 + opp01 { 195 + opp-hz = /bits/ 64 <150000000>; 196 + }; 197 + opp02 { 198 + opp-hz = /bits/ 64 <200000000>; 199 + }; 200 + opp03 { 201 + opp-hz = /bits/ 64 <300000000>; 202 + }; 203 + }; 204 + 205 + bus_jpeg_apb_opp_table: opp_table12 { 206 + compatible = "operating-points-v2"; 207 + 208 + opp00 { 209 + opp-hz = /bits/ 64 <84000000>; 210 + }; 211 + opp01 { 212 + opp-hz = /bits/ 64 <111000000>; 213 + }; 214 + opp02 { 215 + opp-hz = /bits/ 64 <134000000>; 216 + }; 217 + opp03 { 218 + opp-hz = /bits/ 64 <167000000>; 219 + }; 220 + }; 221 + 222 + bus_disp1_fimd_opp_table: opp_table13 { 223 + compatible = "operating-points-v2"; 224 + 225 + opp00 { 226 + opp-hz = /bits/ 64 <120000000>; 227 + }; 228 + opp01 { 229 + opp-hz = /bits/ 64 <200000000>; 230 + }; 231 + }; 232 + 233 + bus_disp1_opp_table: opp_table14 { 234 + compatible = "operating-points-v2"; 235 + 236 + opp00 { 237 + opp-hz = /bits/ 64 <120000000>; 238 + }; 239 + opp01 { 240 + opp-hz = /bits/ 64 <200000000>; 241 + }; 242 + opp02 { 243 + opp-hz = /bits/ 64 <300000000>; 244 + }; 245 + }; 246 + 247 + bus_gscl_opp_table: opp_table15 { 248 + compatible = "operating-points-v2"; 249 + 250 + opp00 { 251 + opp-hz = /bits/ 64 <150000000>; 252 + }; 253 + opp01 { 254 + opp-hz = /bits/ 64 <200000000>; 255 + }; 256 + opp02 { 257 + opp-hz = /bits/ 64 <300000000>; 258 + }; 259 + }; 260 + 261 + bus_mscl_opp_table: opp_table16 { 262 + compatible = "operating-points-v2"; 263 + 264 + opp00 { 265 + opp-hz = /bits/ 64 <84000000>; 266 + }; 267 + opp01 { 268 + opp-hz = /bits/ 64 <167000000>; 269 + }; 270 + opp02 { 271 + opp-hz = /bits/ 64 <222000000>; 272 + }; 273 + opp03 { 274 + opp-hz = /bits/ 64 <333000000>; 275 + }; 276 + opp04 { 277 + opp-hz = /bits/ 64 <400000000>; 278 + }; 279 + }; 280 + 281 + dmc_opp_table: opp_table17 { 39 282 compatible = "operating-points-v2"; 40 283 41 284 opp00 { ··· 377 134 }; 378 135 379 136 &bus_wcore { 137 + operating-points-v2 = <&bus_wcore_opp_table>; 380 138 devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>, 381 139 <&nocp_mem1_0>, <&nocp_mem1_1>; 382 140 vdd-supply = <&buck3_reg>; ··· 386 142 }; 387 143 388 144 &bus_noc { 145 + operating-points-v2 = <&bus_noc_opp_table>; 389 146 devfreq = <&bus_wcore>; 390 147 status = "okay"; 391 148 }; 392 149 393 150 &bus_fsys_apb { 151 + operating-points-v2 = <&bus_fsys_apb_opp_table>; 394 152 devfreq = <&bus_wcore>; 395 153 status = "okay"; 396 154 }; 397 155 398 156 &bus_fsys { 157 + operating-points-v2 = <&bus_fsys_apb_opp_table>; 399 158 devfreq = <&bus_wcore>; 400 159 status = "okay"; 401 160 }; 402 161 403 162 &bus_fsys2 { 163 + operating-points-v2 = <&bus_fsys2_opp_table>; 404 164 devfreq = <&bus_wcore>; 405 165 status = "okay"; 406 166 }; 407 167 408 168 &bus_mfc { 169 + operating-points-v2 = <&bus_mfc_opp_table>; 409 170 devfreq = <&bus_wcore>; 410 171 status = "okay"; 411 172 }; 412 173 413 174 &bus_gen { 175 + operating-points-v2 = <&bus_gen_opp_table>; 414 176 devfreq = <&bus_wcore>; 415 177 status = "okay"; 416 178 }; 417 179 418 180 &bus_peri { 181 + operating-points-v2 = <&bus_peri_opp_table>; 419 182 devfreq = <&bus_wcore>; 420 183 status = "okay"; 421 184 }; 422 185 423 186 &bus_g2d { 187 + operating-points-v2 = <&bus_g2d_opp_table>; 424 188 devfreq = <&bus_wcore>; 425 189 status = "okay"; 426 190 }; 427 191 428 192 &bus_g2d_acp { 193 + operating-points-v2 = <&bus_g2d_acp_opp_table>; 429 194 devfreq = <&bus_wcore>; 430 195 status = "okay"; 431 196 }; 432 197 433 198 &bus_jpeg { 199 + operating-points-v2 = <&bus_jpeg_opp_table>; 434 200 devfreq = <&bus_wcore>; 435 201 status = "okay"; 436 202 }; 437 203 438 204 &bus_jpeg_apb { 205 + operating-points-v2 = <&bus_jpeg_apb_opp_table>; 439 206 devfreq = <&bus_wcore>; 440 207 status = "okay"; 441 208 }; 442 209 443 210 &bus_disp1_fimd { 211 + operating-points-v2 = <&bus_disp1_fimd_opp_table>; 444 212 devfreq = <&bus_wcore>; 445 213 status = "okay"; 446 214 }; 447 215 448 216 &bus_disp1 { 217 + operating-points-v2 = <&bus_disp1_opp_table>; 449 218 devfreq = <&bus_wcore>; 450 219 status = "okay"; 451 220 }; 452 221 453 222 &bus_gscl_scaler { 223 + operating-points-v2 = <&bus_gscl_opp_table>; 454 224 devfreq = <&bus_wcore>; 455 225 status = "okay"; 456 226 }; 457 227 458 228 &bus_mscl { 229 + operating-points-v2 = <&bus_mscl_opp_table>; 459 230 devfreq = <&bus_wcore>; 460 231 status = "okay"; 461 232 };