Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: interrupt-controller: Convert marvell,orion-bridge-intc to DT schema

Convert the Marvell Orion bridge interrupt controller binding to schema
format.

marvell,orion-intc is already covered by mrvl,intc.yaml schema, so it
can be dropped.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250505144743.1290672-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>

+52 -48
+52
Documentation/devicetree/bindings/interrupt-controller/marvell,orion-bridge-intc.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + --- 3 + $id: http://devicetree.org/schemas/interrupt-controller/marvell,orion-bridge-intc.yaml# 4 + $schema: http://devicetree.org/meta-schemas/core.yaml# 5 + 6 + title: Marvell Orion SoC Bridge Interrupt Controller 7 + 8 + maintainers: 9 + - Andrew Lunn <andrew@lunn.ch> 10 + - Gregory Clement <gregory.clement@bootlin.com> 11 + 12 + properties: 13 + compatible: 14 + const: marvell,orion-bridge-intc 15 + 16 + reg: 17 + minItems: 1 18 + maxItems: 2 19 + 20 + interrupt-controller: true 21 + 22 + '#interrupt-cells': 23 + const: 1 24 + 25 + interrupts: 26 + description: Bridge interrupt of the main interrupt controller 27 + 28 + marvell,#interrupts: 29 + description: Number of interrupts provided by bridge interrupt controller. 30 + $ref: /schemas/types.yaml#/definitions/uint32 31 + default: 32 32 + 33 + required: 34 + - compatible 35 + - reg 36 + - interrupt-controller 37 + - '#interrupt-cells' 38 + - interrupts 39 + 40 + additionalProperties: false 41 + 42 + examples: 43 + - | 44 + interrupt-controller@20110 { 45 + compatible = "marvell,orion-bridge-intc"; 46 + reg = <0x20110 0x8>; 47 + interrupt-controller; 48 + #interrupt-cells = <1>; 49 + interrupts = <0>; 50 + /* Dove bridge provides 5 interrupts */ 51 + marvell,#interrupts = <5>; 52 + };
-48
Documentation/devicetree/bindings/interrupt-controller/marvell,orion-intc.txt
··· 1 - Marvell Orion SoC interrupt controllers 2 - 3 - * Main interrupt controller 4 - 5 - Required properties: 6 - - compatible: shall be "marvell,orion-intc" 7 - - reg: base address(es) of interrupt registers starting with CAUSE register 8 - - interrupt-controller: identifies the node as an interrupt controller 9 - - #interrupt-cells: number of cells to encode an interrupt source, shall be 1 10 - 11 - The interrupt sources map to the corresponding bits in the interrupt 12 - registers, i.e. 13 - - 0 maps to bit 0 of first base address, 14 - - 1 maps to bit 1 of first base address, 15 - - 32 maps to bit 0 of second base address, and so on. 16 - 17 - Example: 18 - intc: interrupt-controller { 19 - compatible = "marvell,orion-intc"; 20 - interrupt-controller; 21 - #interrupt-cells = <1>; 22 - /* Dove has 64 first level interrupts */ 23 - reg = <0x20200 0x10>, <0x20210 0x10>; 24 - }; 25 - 26 - * Bridge interrupt controller 27 - 28 - Required properties: 29 - - compatible: shall be "marvell,orion-bridge-intc" 30 - - reg: base address of bridge interrupt registers starting with CAUSE register 31 - - interrupts: bridge interrupt of the main interrupt controller 32 - - interrupt-controller: identifies the node as an interrupt controller 33 - - #interrupt-cells: number of cells to encode an interrupt source, shall be 1 34 - 35 - Optional properties: 36 - - marvell,#interrupts: number of interrupts provided by bridge interrupt 37 - controller, defaults to 32 if not set 38 - 39 - Example: 40 - bridge_intc: interrupt-controller { 41 - compatible = "marvell,orion-bridge-intc"; 42 - interrupt-controller; 43 - #interrupt-cells = <1>; 44 - reg = <0x20110 0x8>; 45 - interrupts = <0>; 46 - /* Dove bridge provides 5 interrupts */ 47 - marvell,#interrupts = <5>; 48 - };