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ARM: dts: r8a7791: Add SCIF fallback compatibility strings

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

authored by

Geert Uytterhoeven and committed by
Simon Horman b5b52dd7 a20dc9f2

+36 -18
+36 -18
arch/arm/boot/dts/r8a7791.dtsi
··· 564 564 }; 565 565 566 566 scifa0: serial@e6c40000 { 567 - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 567 + compatible = "renesas,scifa-r8a7791", 568 + "renesas,rcar-gen2-scifa", "renesas,scifa"; 568 569 reg = <0 0xe6c40000 0 64>; 569 570 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 570 571 clocks = <&mstp2_clks R8A7791_CLK_SCIFA0>; ··· 577 576 }; 578 577 579 578 scifa1: serial@e6c50000 { 580 - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 579 + compatible = "renesas,scifa-r8a7791", 580 + "renesas,rcar-gen2-scifa", "renesas,scifa"; 581 581 reg = <0 0xe6c50000 0 64>; 582 582 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 583 583 clocks = <&mstp2_clks R8A7791_CLK_SCIFA1>; ··· 590 588 }; 591 589 592 590 scifa2: serial@e6c60000 { 593 - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 591 + compatible = "renesas,scifa-r8a7791", 592 + "renesas,rcar-gen2-scifa", "renesas,scifa"; 594 593 reg = <0 0xe6c60000 0 64>; 595 594 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; 596 595 clocks = <&mstp2_clks R8A7791_CLK_SCIFA2>; ··· 603 600 }; 604 601 605 602 scifa3: serial@e6c70000 { 606 - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 603 + compatible = "renesas,scifa-r8a7791", 604 + "renesas,rcar-gen2-scifa", "renesas,scifa"; 607 605 reg = <0 0xe6c70000 0 64>; 608 606 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 609 607 clocks = <&mstp11_clks R8A7791_CLK_SCIFA3>; ··· 616 612 }; 617 613 618 614 scifa4: serial@e6c78000 { 619 - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 615 + compatible = "renesas,scifa-r8a7791", 616 + "renesas,rcar-gen2-scifa", "renesas,scifa"; 620 617 reg = <0 0xe6c78000 0 64>; 621 618 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 622 619 clocks = <&mstp11_clks R8A7791_CLK_SCIFA4>; ··· 629 624 }; 630 625 631 626 scifa5: serial@e6c80000 { 632 - compatible = "renesas,scifa-r8a7791", "renesas,scifa"; 627 + compatible = "renesas,scifa-r8a7791", 628 + "renesas,rcar-gen2-scifa", "renesas,scifa"; 633 629 reg = <0 0xe6c80000 0 64>; 634 630 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; 635 631 clocks = <&mstp11_clks R8A7791_CLK_SCIFA5>; ··· 642 636 }; 643 637 644 638 scifb0: serial@e6c20000 { 645 - compatible = "renesas,scifb-r8a7791", "renesas,scifb"; 639 + compatible = "renesas,scifb-r8a7791", 640 + "renesas,rcar-gen2-scifb", "renesas,scifb"; 646 641 reg = <0 0xe6c20000 0 64>; 647 642 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 648 643 clocks = <&mstp2_clks R8A7791_CLK_SCIFB0>; ··· 655 648 }; 656 649 657 650 scifb1: serial@e6c30000 { 658 - compatible = "renesas,scifb-r8a7791", "renesas,scifb"; 651 + compatible = "renesas,scifb-r8a7791", 652 + "renesas,rcar-gen2-scifb", "renesas,scifb"; 659 653 reg = <0 0xe6c30000 0 64>; 660 654 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; 661 655 clocks = <&mstp2_clks R8A7791_CLK_SCIFB1>; ··· 668 660 }; 669 661 670 662 scifb2: serial@e6ce0000 { 671 - compatible = "renesas,scifb-r8a7791", "renesas,scifb"; 663 + compatible = "renesas,scifb-r8a7791", 664 + "renesas,rcar-gen2-scifb", "renesas,scifb"; 672 665 reg = <0 0xe6ce0000 0 64>; 673 666 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 674 667 clocks = <&mstp2_clks R8A7791_CLK_SCIFB2>; ··· 681 672 }; 682 673 683 674 scif0: serial@e6e60000 { 684 - compatible = "renesas,scif-r8a7791", "renesas,scif"; 675 + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", 676 + "renesas,scif"; 685 677 reg = <0 0xe6e60000 0 64>; 686 678 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 687 679 clocks = <&mstp7_clks R8A7791_CLK_SCIF0>; ··· 694 684 }; 695 685 696 686 scif1: serial@e6e68000 { 697 - compatible = "renesas,scif-r8a7791", "renesas,scif"; 687 + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", 688 + "renesas,scif"; 698 689 reg = <0 0xe6e68000 0 64>; 699 690 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 700 691 clocks = <&mstp7_clks R8A7791_CLK_SCIF1>; ··· 707 696 }; 708 697 709 698 scif2: serial@e6e58000 { 710 - compatible = "renesas,scif-r8a7791", "renesas,scif"; 699 + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", 700 + "renesas,scif"; 711 701 reg = <0 0xe6e58000 0 64>; 712 702 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; 713 703 clocks = <&mstp7_clks R8A7791_CLK_SCIF2>; ··· 720 708 }; 721 709 722 710 scif3: serial@e6ea8000 { 723 - compatible = "renesas,scif-r8a7791", "renesas,scif"; 711 + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", 712 + "renesas,scif"; 724 713 reg = <0 0xe6ea8000 0 64>; 725 714 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 726 715 clocks = <&mstp7_clks R8A7791_CLK_SCIF3>; ··· 733 720 }; 734 721 735 722 scif4: serial@e6ee0000 { 736 - compatible = "renesas,scif-r8a7791", "renesas,scif"; 723 + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", 724 + "renesas,scif"; 737 725 reg = <0 0xe6ee0000 0 64>; 738 726 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 739 727 clocks = <&mstp7_clks R8A7791_CLK_SCIF4>; ··· 746 732 }; 747 733 748 734 scif5: serial@e6ee8000 { 749 - compatible = "renesas,scif-r8a7791", "renesas,scif"; 735 + compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", 736 + "renesas,scif"; 750 737 reg = <0 0xe6ee8000 0 64>; 751 738 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 752 739 clocks = <&mstp7_clks R8A7791_CLK_SCIF5>; ··· 759 744 }; 760 745 761 746 hscif0: serial@e62c0000 { 762 - compatible = "renesas,hscif-r8a7791", "renesas,hscif"; 747 + compatible = "renesas,hscif-r8a7791", 748 + "renesas,rcar-gen2-hscif", "renesas,hscif"; 763 749 reg = <0 0xe62c0000 0 96>; 764 750 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 765 751 clocks = <&mstp7_clks R8A7791_CLK_HSCIF0>; ··· 772 756 }; 773 757 774 758 hscif1: serial@e62c8000 { 775 - compatible = "renesas,hscif-r8a7791", "renesas,hscif"; 759 + compatible = "renesas,hscif-r8a7791", 760 + "renesas,rcar-gen2-hscif", "renesas,hscif"; 776 761 reg = <0 0xe62c8000 0 96>; 777 762 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 778 763 clocks = <&mstp7_clks R8A7791_CLK_HSCIF1>; ··· 785 768 }; 786 769 787 770 hscif2: serial@e62d0000 { 788 - compatible = "renesas,hscif-r8a7791", "renesas,hscif"; 771 + compatible = "renesas,hscif-r8a7791", 772 + "renesas,rcar-gen2-hscif", "renesas,hscif"; 789 773 reg = <0 0xe62d0000 0 96>; 790 774 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 791 775 clocks = <&mstp7_clks R8A7791_CLK_HSCIF2>;