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ARM: dts: r8a7790: Add SCIF fallback compatibility strings
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
authored by
Geert Uytterhoeven
and committed by
Simon Horman
a20dc9f2
b2ac44fa
+20
-10
+20
-10
arch/arm/boot/dts/r8a7790.dtsi
+20
-10
arch/arm/boot/dts/r8a7790.dtsi
···
585
585
};
586
586
587
587
scifa0: serial@e6c40000 {
588
-
compatible = "renesas,scifa-r8a7790", "renesas,scifa";
588
+
compatible = "renesas,scifa-r8a7790",
589
+
"renesas,rcar-gen2-scifa", "renesas,scifa";
589
590
reg = <0 0xe6c40000 0 64>;
590
591
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
591
592
clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;
···
598
597
};
599
598
600
599
scifa1: serial@e6c50000 {
601
-
compatible = "renesas,scifa-r8a7790", "renesas,scifa";
600
+
compatible = "renesas,scifa-r8a7790",
601
+
"renesas,rcar-gen2-scifa", "renesas,scifa";
602
602
reg = <0 0xe6c50000 0 64>;
603
603
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
604
604
clocks = <&mstp2_clks R8A7790_CLK_SCIFA1>;
···
611
609
};
612
610
613
611
scifa2: serial@e6c60000 {
614
-
compatible = "renesas,scifa-r8a7790", "renesas,scifa";
612
+
compatible = "renesas,scifa-r8a7790",
613
+
"renesas,rcar-gen2-scifa", "renesas,scifa";
615
614
reg = <0 0xe6c60000 0 64>;
616
615
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
617
616
clocks = <&mstp2_clks R8A7790_CLK_SCIFA2>;
···
624
621
};
625
622
626
623
scifb0: serial@e6c20000 {
627
-
compatible = "renesas,scifb-r8a7790", "renesas,scifb";
624
+
compatible = "renesas,scifb-r8a7790",
625
+
"renesas,rcar-gen2-scifb", "renesas,scifb";
628
626
reg = <0 0xe6c20000 0 64>;
629
627
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
630
628
clocks = <&mstp2_clks R8A7790_CLK_SCIFB0>;
···
637
633
};
638
634
639
635
scifb1: serial@e6c30000 {
640
-
compatible = "renesas,scifb-r8a7790", "renesas,scifb";
636
+
compatible = "renesas,scifb-r8a7790",
637
+
"renesas,rcar-gen2-scifb", "renesas,scifb";
641
638
reg = <0 0xe6c30000 0 64>;
642
639
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
643
640
clocks = <&mstp2_clks R8A7790_CLK_SCIFB1>;
···
650
645
};
651
646
652
647
scifb2: serial@e6ce0000 {
653
-
compatible = "renesas,scifb-r8a7790", "renesas,scifb";
648
+
compatible = "renesas,scifb-r8a7790",
649
+
"renesas,rcar-gen2-scifb", "renesas,scifb";
654
650
reg = <0 0xe6ce0000 0 64>;
655
651
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
656
652
clocks = <&mstp2_clks R8A7790_CLK_SCIFB2>;
···
663
657
};
664
658
665
659
scif0: serial@e6e60000 {
666
-
compatible = "renesas,scif-r8a7790", "renesas,scif";
660
+
compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
661
+
"renesas,scif";
667
662
reg = <0 0xe6e60000 0 64>;
668
663
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
669
664
clocks = <&mstp7_clks R8A7790_CLK_SCIF0>;
···
676
669
};
677
670
678
671
scif1: serial@e6e68000 {
679
-
compatible = "renesas,scif-r8a7790", "renesas,scif";
672
+
compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
673
+
"renesas,scif";
680
674
reg = <0 0xe6e68000 0 64>;
681
675
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
682
676
clocks = <&mstp7_clks R8A7790_CLK_SCIF1>;
···
689
681
};
690
682
691
683
hscif0: serial@e62c0000 {
692
-
compatible = "renesas,hscif-r8a7790", "renesas,hscif";
684
+
compatible = "renesas,hscif-r8a7790",
685
+
"renesas,rcar-gen2-hscif", "renesas,hscif";
693
686
reg = <0 0xe62c0000 0 96>;
694
687
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
695
688
clocks = <&mstp7_clks R8A7790_CLK_HSCIF0>;
···
702
693
};
703
694
704
695
hscif1: serial@e62c8000 {
705
-
compatible = "renesas,hscif-r8a7790", "renesas,hscif";
696
+
compatible = "renesas,hscif-r8a7790",
697
+
"renesas,rcar-gen2-hscif", "renesas,hscif";
706
698
reg = <0 0xe62c8000 0 96>;
707
699
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
708
700
clocks = <&mstp7_clks R8A7790_CLK_HSCIF1>;