···27#define L2_CACHE_ALIGN(x) (((x)+(L2_CACHE_BYTES-1)) & -L2_CACHE_BYTES)2829/*30- * TILE-Gx is fully coherents so we don't need to define31- * ARCH_KMALLOC_MINALIGN.32 */33#ifndef __tilegx__34-#define ARCH_KMALLOC_MINALIGN L2_CACHE_BYTES35#endif3637/* use the cache line size for the L2, which is where it counts */
···27#define L2_CACHE_ALIGN(x) (((x)+(L2_CACHE_BYTES-1)) & -L2_CACHE_BYTES)2829/*30+ * TILE-Gx is fully coherent so we don't need to define ARCH_DMA_MINALIGN.031 */32#ifndef __tilegx__33+#define ARCH_DMA_MINALIGN L2_CACHE_BYTES34#endif3536/* use the cache line size for the L2, which is where it counts */