···2727#define L2_CACHE_ALIGN(x) (((x)+(L2_CACHE_BYTES-1)) & -L2_CACHE_BYTES)28282929/*3030- * TILE-Gx is fully coherents so we don't need to define3131- * ARCH_KMALLOC_MINALIGN.3030+ * TILE-Gx is fully coherent so we don't need to define ARCH_DMA_MINALIGN.3231 */3332#ifndef __tilegx__3434-#define ARCH_KMALLOC_MINALIGN L2_CACHE_BYTES3333+#define ARCH_DMA_MINALIGN L2_CACHE_BYTES3534#endif36353736/* use the cache line size for the L2, which is where it counts */