tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
media: hantro: add support for STM32MP25 VENC
Add support for STM32MP25 VENC video hardware encoder.
Support of JPEG encoding.
VENC has its own reset/clock/irq.
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hugues Fruchet <hugues.fruchet@foss.st.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
authored by
Hugues Fruchet
and committed by
Mauro Carvalho Chehab
b0fb9ca3
46c4dffb
+92
+1
drivers/media/platform/verisilicon/hantro_drv.c
+1
drivers/media/platform/verisilicon/hantro_drv.c
+1
drivers/media/platform/verisilicon/hantro_hw.h
+1
drivers/media/platform/verisilicon/hantro_hw.h
···
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extern const struct hantro_variant sama5d4_vdec_variant;
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extern const struct hantro_variant sunxi_vpu_variant;
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extern const struct hantro_variant stm32mp25_vdec_variant;
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extern const struct hantro_variant stm32mp25_venc_variant;
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extern const struct hantro_postproc_ops hantro_g1_postproc_ops;
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extern const struct hantro_postproc_ops hantro_g2_postproc_ops;
+90
drivers/media/platform/verisilicon/stm32mp25_vpu_hw.c
+90
drivers/media/platform/verisilicon/stm32mp25_vpu_hw.c
···
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*/
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#include "hantro.h"
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#include "hantro_jpeg.h"
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#include "hantro_h1_regs.h"
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/*
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* Supported formats.
···
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},
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};
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static const struct hantro_fmt stm32mp25_venc_fmts[] = {
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{
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.fourcc = V4L2_PIX_FMT_YUV420M,
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.codec_mode = HANTRO_MODE_NONE,
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.enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420P,
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},
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{
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.fourcc = V4L2_PIX_FMT_NV12M,
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.codec_mode = HANTRO_MODE_NONE,
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.enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420SP,
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},
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{
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.fourcc = V4L2_PIX_FMT_YUYV,
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.codec_mode = HANTRO_MODE_NONE,
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.enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUYV422,
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},
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{
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.fourcc = V4L2_PIX_FMT_UYVY,
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.codec_mode = HANTRO_MODE_NONE,
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.enc_fmt = ROCKCHIP_VPU_ENC_FMT_UYVY422,
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},
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{
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.fourcc = V4L2_PIX_FMT_JPEG,
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.codec_mode = HANTRO_MODE_JPEG_ENC,
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.max_depth = 2,
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.header_size = JPEG_HEADER_SIZE,
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.frmsize = {
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.min_width = 96,
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.max_width = FMT_4K_WIDTH,
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.step_width = MB_DIM,
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.min_height = 96,
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.max_height = FMT_4K_HEIGHT,
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.step_height = MB_DIM,
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},
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},
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};
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static irqreturn_t stm32mp25_venc_irq(int irq, void *dev_id)
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{
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struct hantro_dev *vpu = dev_id;
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enum vb2_buffer_state state;
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u32 status;
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status = vepu_read(vpu, H1_REG_INTERRUPT);
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state = (status & H1_REG_INTERRUPT_FRAME_RDY) ?
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VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
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vepu_write(vpu, H1_REG_INTERRUPT_BIT, H1_REG_INTERRUPT);
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hantro_irq_done(vpu, state);
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return IRQ_HANDLED;
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}
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static void stm32mp25_venc_reset(struct hantro_ctx *ctx)
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{
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struct hantro_dev *vpu = ctx->dev;
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reset_control_reset(vpu->resets);
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}
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/*
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* Supported codec ops.
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*/
···
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.reset = hantro_g1_reset,
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.init = hantro_h264_dec_init,
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.exit = hantro_h264_dec_exit,
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},
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};
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static const struct hantro_codec_ops stm32mp25_venc_codec_ops[] = {
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[HANTRO_MODE_JPEG_ENC] = {
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.run = hantro_h1_jpeg_enc_run,
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.reset = stm32mp25_venc_reset,
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.done = hantro_h1_jpeg_enc_done,
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},
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};
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···
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.num_irqs = ARRAY_SIZE(stm32mp25_vdec_irqs),
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.clk_names = stm32mp25_vdec_clk_names,
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.num_clocks = ARRAY_SIZE(stm32mp25_vdec_clk_names),
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};
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static const struct hantro_irq stm32mp25_venc_irqs[] = {
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{ "venc", stm32mp25_venc_irq },
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};
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static const char * const stm32mp25_venc_clk_names[] = {
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"venc-clk"
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};
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const struct hantro_variant stm32mp25_venc_variant = {
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.enc_fmts = stm32mp25_venc_fmts,
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.num_enc_fmts = ARRAY_SIZE(stm32mp25_venc_fmts),
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.codec = HANTRO_JPEG_ENCODER,
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.codec_ops = stm32mp25_venc_codec_ops,
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.irqs = stm32mp25_venc_irqs,
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.num_irqs = ARRAY_SIZE(stm32mp25_venc_irqs),
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.clk_names = stm32mp25_venc_clk_names,
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.num_clocks = ARRAY_SIZE(stm32mp25_venc_clk_names)
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};