Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: spear: Remove CLK_IS_ROOT

This flag is a no-op now. Remove usage of the flag.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

+19 -32
+8 -13
drivers/clk/spear/spear1310_clock.c
··· 386 386 { 387 387 struct clk *clk, *clk1; 388 388 389 - clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, 390 - 32000); 389 + clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000); 391 390 clk_register_clkdev(clk, "osc_32k_clk", NULL); 392 391 393 - clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT, 394 - 24000000); 392 + clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000); 395 393 clk_register_clkdev(clk, "osc_24m_clk", NULL); 396 394 397 - clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT, 398 - 25000000); 395 + clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000); 399 396 clk_register_clkdev(clk, "osc_25m_clk", NULL); 400 397 401 - clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT, 402 - 125000000); 398 + clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000); 403 399 clk_register_clkdev(clk, "gmii_pad_clk", NULL); 404 400 405 - clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 406 - CLK_IS_ROOT, 12288000); 401 + clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0, 402 + 12288000); 407 403 clk_register_clkdev(clk, "i2s_src_pad_clk", NULL); 408 404 409 405 /* clock derived from 32 KHz osc clk */ ··· 893 897 &_lock); 894 898 clk_register_clkdev(clk, "ras_apb_clk", NULL); 895 899 896 - clk = clk_register_fixed_rate(NULL, "ras_plclk0_clk", NULL, CLK_IS_ROOT, 900 + clk = clk_register_fixed_rate(NULL, "ras_plclk0_clk", NULL, 0, 897 901 50000000); 898 902 899 - clk = clk_register_fixed_rate(NULL, "ras_tx50_clk", NULL, CLK_IS_ROOT, 900 - 50000000); 903 + clk = clk_register_fixed_rate(NULL, "ras_tx50_clk", NULL, 0, 50000000); 901 904 902 905 clk = clk_register_gate(NULL, "can0_clk", "apb_clk", 0, 903 906 SPEAR1310_RAS_SW_CLK_CTRL, SPEAR1310_CAN0_CLK_ENB, 0,
+6 -10
drivers/clk/spear/spear1340_clock.c
··· 443 443 { 444 444 struct clk *clk, *clk1; 445 445 446 - clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, 447 - 32000); 446 + clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000); 448 447 clk_register_clkdev(clk, "osc_32k_clk", NULL); 449 448 450 - clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT, 451 - 24000000); 449 + clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000); 452 450 clk_register_clkdev(clk, "osc_24m_clk", NULL); 453 451 454 - clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, CLK_IS_ROOT, 455 - 25000000); 452 + clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000); 456 453 clk_register_clkdev(clk, "osc_25m_clk", NULL); 457 454 458 - clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, CLK_IS_ROOT, 459 - 125000000); 455 + clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000); 460 456 clk_register_clkdev(clk, "gmii_pad_clk", NULL); 461 457 462 - clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 463 - CLK_IS_ROOT, 12288000); 458 + clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0, 459 + 12288000); 464 460 clk_register_clkdev(clk, "i2s_src_pad_clk", NULL); 465 461 466 462 /* clock derived from 32 KHz osc clk */
+3 -5
drivers/clk/spear/spear3xx_clock.c
··· 251 251 struct clk *clk; 252 252 253 253 clk = clk_register_fixed_rate(NULL, "smii_125m_pad_clk", NULL, 254 - CLK_IS_ROOT, 125000000); 254 + 0, 125000000); 255 255 clk_register_clkdev(clk, "smii_125m_pad", NULL); 256 256 257 257 clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0, ··· 391 391 { 392 392 struct clk *clk, *clk1, *ras_apb_clk; 393 393 394 - clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, 395 - 32000); 394 + clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000); 396 395 clk_register_clkdev(clk, "osc_32k_clk", NULL); 397 396 398 - clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, CLK_IS_ROOT, 399 - 24000000); 397 + clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000); 400 398 clk_register_clkdev(clk, "osc_24m_clk", NULL); 401 399 402 400 /* clock derived from 32 KHz osc clk */
+2 -4
drivers/clk/spear/spear6xx_clock.c
··· 117 117 { 118 118 struct clk *clk, *clk1; 119 119 120 - clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, 121 - 32000); 120 + clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000); 122 121 clk_register_clkdev(clk, "osc_32k_clk", NULL); 123 122 124 - clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, CLK_IS_ROOT, 125 - 30000000); 123 + clk = clk_register_fixed_rate(NULL, "osc_30m_clk", NULL, 0, 30000000); 126 124 clk_register_clkdev(clk, "osc_30m_clk", NULL); 127 125 128 126 /* clock derived from 32 KHz osc clk */