Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

firmware: imx: scu-pd: add specifying the base of domain name index support

As the domain resource id in the same type may not be continuous, so it's
hard to describe all such power domains with current struct imx_sc_pd_range.

Adding the optional base for domain name index to address this issue.
Then we can add the discrete domains easily later.

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: linux-pm@vger.kernel.org
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Aisheng Dong and committed by
Shawn Guo
ad8cc071 9d616d62

+55 -52
+55 -52
drivers/firmware/imx/scu-pd.c
··· 74 74 char *name; 75 75 u32 rsrc; 76 76 u8 num; 77 + 78 + /* add domain index */ 77 79 bool postfix; 80 + u8 start_from; 78 81 }; 79 82 80 83 struct imx_sc_pd_soc { ··· 87 84 88 85 static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = { 89 86 /* LSIO SS */ 90 - { "lsio-pwm", IMX_SC_R_PWM_0, 8, true }, 91 - { "lsio-gpio", IMX_SC_R_GPIO_0, 8, true }, 92 - { "lsio-gpt", IMX_SC_R_GPT_0, 5, true }, 93 - { "lsio-kpp", IMX_SC_R_KPP, 1, false }, 94 - { "lsio-fspi", IMX_SC_R_FSPI_0, 2, true }, 95 - { "lsio-mu", IMX_SC_R_MU_0A, 14, true }, 87 + { "lsio-pwm", IMX_SC_R_PWM_0, 8, true, 0 }, 88 + { "lsio-gpio", IMX_SC_R_GPIO_0, 8, true, 0 }, 89 + { "lsio-gpt", IMX_SC_R_GPT_0, 5, true, 0 }, 90 + { "lsio-kpp", IMX_SC_R_KPP, 1, false, 0 }, 91 + { "lsio-fspi", IMX_SC_R_FSPI_0, 2, true, 0 }, 92 + { "lsio-mu", IMX_SC_R_MU_0A, 14, true, 0 }, 96 93 97 94 /* CONN SS */ 98 - { "con-usb", IMX_SC_R_USB_0, 2, true }, 99 - { "con-usb0phy", IMX_SC_R_USB_0_PHY, 1, false }, 100 - { "con-usb2", IMX_SC_R_USB_2, 1, false }, 101 - { "con-usb2phy", IMX_SC_R_USB_2_PHY, 1, false }, 102 - { "con-sdhc", IMX_SC_R_SDHC_0, 3, true }, 103 - { "con-enet", IMX_SC_R_ENET_0, 2, true }, 104 - { "con-nand", IMX_SC_R_NAND, 1, false }, 105 - { "con-mlb", IMX_SC_R_MLB_0, 1, true }, 95 + { "con-usb", IMX_SC_R_USB_0, 2, true, 0 }, 96 + { "con-usb0phy", IMX_SC_R_USB_0_PHY, 1, false, 0 }, 97 + { "con-usb2", IMX_SC_R_USB_2, 1, false, 0 }, 98 + { "con-usb2phy", IMX_SC_R_USB_2_PHY, 1, false, 0 }, 99 + { "con-sdhc", IMX_SC_R_SDHC_0, 3, true, 0 }, 100 + { "con-enet", IMX_SC_R_ENET_0, 2, true, 0 }, 101 + { "con-nand", IMX_SC_R_NAND, 1, false, 0 }, 102 + { "con-mlb", IMX_SC_R_MLB_0, 1, true, 0 }, 106 103 107 104 /* Audio DMA SS */ 108 - { "adma-audio-pll0", IMX_SC_R_AUDIO_PLL_0, 1, false }, 109 - { "adma-audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, false }, 110 - { "adma-audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, false }, 111 - { "adma-dma0-ch", IMX_SC_R_DMA_0_CH0, 16, true }, 112 - { "adma-dma1-ch", IMX_SC_R_DMA_1_CH0, 16, true }, 113 - { "adma-dma2-ch", IMX_SC_R_DMA_2_CH0, 5, true }, 114 - { "adma-asrc0", IMX_SC_R_ASRC_0, 1, false }, 115 - { "adma-asrc1", IMX_SC_R_ASRC_1, 1, false }, 116 - { "adma-esai0", IMX_SC_R_ESAI_0, 1, false }, 117 - { "adma-spdif0", IMX_SC_R_SPDIF_0, 1, false }, 118 - { "adma-sai", IMX_SC_R_SAI_0, 3, true }, 119 - { "adma-amix", IMX_SC_R_AMIX, 1, false }, 120 - { "adma-mqs0", IMX_SC_R_MQS_0, 1, false }, 121 - { "adma-dsp", IMX_SC_R_DSP, 1, false }, 122 - { "adma-dsp-ram", IMX_SC_R_DSP_RAM, 1, false }, 123 - { "adma-can", IMX_SC_R_CAN_0, 3, true }, 124 - { "adma-ftm", IMX_SC_R_FTM_0, 2, true }, 125 - { "adma-lpi2c", IMX_SC_R_I2C_0, 4, true }, 126 - { "adma-adc", IMX_SC_R_ADC_0, 1, true }, 127 - { "adma-lcd", IMX_SC_R_LCD_0, 1, true }, 128 - { "adma-lcd0-pwm", IMX_SC_R_LCD_0_PWM_0, 1, true }, 129 - { "adma-lpuart", IMX_SC_R_UART_0, 4, true }, 130 - { "adma-lpspi", IMX_SC_R_SPI_0, 4, true }, 105 + { "adma-audio-pll0", IMX_SC_R_AUDIO_PLL_0, 1, false, 0 }, 106 + { "adma-audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, false, 0 }, 107 + { "adma-audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, false, 0 }, 108 + { "adma-dma0-ch", IMX_SC_R_DMA_0_CH0, 16, true, 0 }, 109 + { "adma-dma1-ch", IMX_SC_R_DMA_1_CH0, 16, true, 0 }, 110 + { "adma-dma2-ch", IMX_SC_R_DMA_2_CH0, 5, true, 0 }, 111 + { "adma-asrc0", IMX_SC_R_ASRC_0, 1, false, 0 }, 112 + { "adma-asrc1", IMX_SC_R_ASRC_1, 1, false, 0 }, 113 + { "adma-esai0", IMX_SC_R_ESAI_0, 1, false, 0 }, 114 + { "adma-spdif0", IMX_SC_R_SPDIF_0, 1, false, 0 }, 115 + { "adma-sai", IMX_SC_R_SAI_0, 3, true, 0 }, 116 + { "adma-amix", IMX_SC_R_AMIX, 1, false, 0 }, 117 + { "adma-mqs0", IMX_SC_R_MQS_0, 1, false, 0 }, 118 + { "adma-dsp", IMX_SC_R_DSP, 1, false, 0 }, 119 + { "adma-dsp-ram", IMX_SC_R_DSP_RAM, 1, false, 0 }, 120 + { "adma-can", IMX_SC_R_CAN_0, 3, true, 0 }, 121 + { "adma-ftm", IMX_SC_R_FTM_0, 2, true, 0 }, 122 + { "adma-lpi2c", IMX_SC_R_I2C_0, 4, true, 0 }, 123 + { "adma-adc", IMX_SC_R_ADC_0, 1, true, 0 }, 124 + { "adma-lcd", IMX_SC_R_LCD_0, 1, true, 0 }, 125 + { "adma-lcd0-pwm", IMX_SC_R_LCD_0_PWM_0, 1, true, 0 }, 126 + { "adma-lpuart", IMX_SC_R_UART_0, 4, true, 0 }, 127 + { "adma-lpspi", IMX_SC_R_SPI_0, 4, true, 0 }, 131 128 132 129 /* VPU SS */ 133 - { "vpu", IMX_SC_R_VPU, 1, false }, 134 - { "vpu-pid", IMX_SC_R_VPU_PID0, 8, true }, 135 - { "vpu-dec0", IMX_SC_R_VPU_DEC_0, 1, false }, 136 - { "vpu-enc0", IMX_SC_R_VPU_ENC_0, 1, false }, 130 + { "vpu", IMX_SC_R_VPU, 1, false, 0 }, 131 + { "vpu-pid", IMX_SC_R_VPU_PID0, 8, true, 0 }, 132 + { "vpu-dec0", IMX_SC_R_VPU_DEC_0, 1, false, 0 }, 133 + { "vpu-enc0", IMX_SC_R_VPU_ENC_0, 1, false, 0 }, 137 134 138 135 /* GPU SS */ 139 - { "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true }, 136 + { "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 }, 140 137 141 138 /* HSIO SS */ 142 - { "hsio-pcie-b", IMX_SC_R_PCIE_B, 1, false }, 143 - { "hsio-serdes-1", IMX_SC_R_SERDES_1, 1, false }, 144 - { "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false }, 139 + { "hsio-pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 }, 140 + { "hsio-serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 }, 141 + { "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 }, 145 142 146 143 /* MIPI/LVDS SS */ 147 - { "mipi0", IMX_SC_R_MIPI_0, 1, false }, 148 - { "mipi0-pwm0", IMX_SC_R_MIPI_0_PWM_0, 1, false }, 149 - { "mipi0-i2c", IMX_SC_R_MIPI_0_I2C_0, 2, true }, 150 - { "lvds0", IMX_SC_R_LVDS_0, 1, false }, 144 + { "mipi0", IMX_SC_R_MIPI_0, 1, false, 0 }, 145 + { "mipi0-pwm0", IMX_SC_R_MIPI_0_PWM_0, 1, false, 0 }, 146 + { "mipi0-i2c", IMX_SC_R_MIPI_0_I2C_0, 2, true, 0 }, 147 + { "lvds0", IMX_SC_R_LVDS_0, 1, false, 0 }, 151 148 152 149 /* DC SS */ 153 - { "dc0", IMX_SC_R_DC_0, 1, false }, 154 - { "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true }, 150 + { "dc0", IMX_SC_R_DC_0, 1, false, 0 }, 151 + { "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 }, 155 152 }; 156 153 157 154 static const struct imx_sc_pd_soc imx8qxp_scu_pd = { ··· 239 236 240 237 if (pd_ranges->postfix) 241 238 snprintf(sc_pd->name, sizeof(sc_pd->name), 242 - "%s%i", pd_ranges->name, idx); 239 + "%s%i", pd_ranges->name, pd_ranges->start_from + idx); 243 240 else 244 241 snprintf(sc_pd->name, sizeof(sc_pd->name), 245 242 "%s", pd_ranges->name);