Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915/tv: convert to struct intel_display

Going forward, struct intel_display shall replace struct
drm_i915_private as the main display device data pointer type. Convert
intel_tv.[ch] to struct intel_display.

Some stragglers are left behind where needed.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/04b1c8d095a52fb817876acdab4e9139d909f306.1724342644.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>

+108 -103
+1 -1
drivers/gpu/drm/i915/display/intel_display.c
··· 7935 7935 g4x_dp_init(dev_priv, DP_D, PORT_D); 7936 7936 7937 7937 if (SUPPORTS_TV(dev_priv)) 7938 - intel_tv_init(dev_priv); 7938 + intel_tv_init(display); 7939 7939 } else if (DISPLAY_VER(dev_priv) == 2) { 7940 7940 if (IS_I85X(dev_priv)) 7941 7941 intel_lvds_init(dev_priv);
+104 -99
drivers/gpu/drm/i915/display/intel_tv.c
··· 914 914 static bool 915 915 intel_tv_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe) 916 916 { 917 - struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 918 - u32 tmp = intel_de_read(dev_priv, TV_CTL); 917 + struct intel_display *display = to_intel_display(encoder); 918 + u32 tmp = intel_de_read(display, TV_CTL); 919 919 920 920 *pipe = (tmp & TV_ENC_PIPE_SEL_MASK) >> TV_ENC_PIPE_SEL_SHIFT; 921 921 ··· 928 928 const struct intel_crtc_state *pipe_config, 929 929 const struct drm_connector_state *conn_state) 930 930 { 931 - struct drm_device *dev = encoder->base.dev; 932 - struct drm_i915_private *dev_priv = to_i915(dev); 931 + struct intel_display *display = to_intel_display(state); 933 932 934 933 /* Prevents vblank waits from timing out in intel_tv_detect_type() */ 935 934 intel_crtc_wait_for_next_vblank(to_intel_crtc(pipe_config->uapi.crtc)); 936 935 937 - intel_de_rmw(dev_priv, TV_CTL, 0, TV_ENC_ENABLE); 936 + intel_de_rmw(display, TV_CTL, 0, TV_ENC_ENABLE); 938 937 } 939 938 940 939 static void ··· 942 943 const struct intel_crtc_state *old_crtc_state, 943 944 const struct drm_connector_state *old_conn_state) 944 945 { 945 - struct drm_device *dev = encoder->base.dev; 946 - struct drm_i915_private *dev_priv = to_i915(dev); 946 + struct intel_display *display = to_intel_display(state); 947 947 948 - intel_de_rmw(dev_priv, TV_CTL, TV_ENC_ENABLE, 0); 948 + intel_de_rmw(display, TV_CTL, TV_ENC_ENABLE, 0); 949 949 } 950 950 951 951 static const struct tv_mode *intel_tv_mode_find(const struct drm_connector_state *conn_state) ··· 958 960 intel_tv_mode_valid(struct drm_connector *connector, 959 961 struct drm_display_mode *mode) 960 962 { 963 + struct intel_display *display = to_intel_display(connector->dev); 961 964 struct drm_i915_private *i915 = to_i915(connector->dev); 962 965 const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state); 963 - int max_dotclk = i915->display.cdclk.max_dotclk_freq; 966 + int max_dotclk = display->cdclk.max_dotclk_freq; 964 967 enum drm_mode_status status; 965 968 966 969 status = intel_cpu_transcoder_mode_valid(i915, mode); ··· 1091 1092 intel_tv_get_config(struct intel_encoder *encoder, 1092 1093 struct intel_crtc_state *pipe_config) 1093 1094 { 1095 + struct intel_display *display = to_intel_display(encoder); 1094 1096 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1095 1097 struct drm_display_mode *adjusted_mode = 1096 1098 &pipe_config->hw.adjusted_mode; ··· 1104 1104 1105 1105 pipe_config->output_types |= BIT(INTEL_OUTPUT_TVOUT); 1106 1106 1107 - tv_ctl = intel_de_read(dev_priv, TV_CTL); 1108 - hctl1 = intel_de_read(dev_priv, TV_H_CTL_1); 1109 - hctl3 = intel_de_read(dev_priv, TV_H_CTL_3); 1110 - vctl1 = intel_de_read(dev_priv, TV_V_CTL_1); 1111 - vctl2 = intel_de_read(dev_priv, TV_V_CTL_2); 1107 + tv_ctl = intel_de_read(display, TV_CTL); 1108 + hctl1 = intel_de_read(display, TV_H_CTL_1); 1109 + hctl3 = intel_de_read(display, TV_H_CTL_3); 1110 + vctl1 = intel_de_read(display, TV_V_CTL_1); 1111 + vctl2 = intel_de_read(display, TV_V_CTL_2); 1112 1112 1113 1113 tv_mode.htotal = (hctl1 & TV_HTOTAL_MASK) >> TV_HTOTAL_SHIFT; 1114 1114 tv_mode.hsync_end = (hctl1 & TV_HSYNC_END_MASK) >> TV_HSYNC_END_SHIFT; ··· 1143 1143 break; 1144 1144 } 1145 1145 1146 - tmp = intel_de_read(dev_priv, TV_WIN_POS); 1146 + tmp = intel_de_read(display, TV_WIN_POS); 1147 1147 xpos = tmp >> 16; 1148 1148 ypos = tmp & 0xffff; 1149 1149 1150 - tmp = intel_de_read(dev_priv, TV_WIN_SIZE); 1150 + tmp = intel_de_read(display, TV_WIN_SIZE); 1151 1151 xsize = tmp >> 16; 1152 1152 ysize = tmp & 0xffff; 1153 1153 1154 1154 intel_tv_mode_to_mode(&mode, &tv_mode, pipe_config->port_clock); 1155 1155 1156 - drm_dbg_kms(&dev_priv->drm, "TV mode: " DRM_MODE_FMT "\n", 1156 + drm_dbg_kms(display->drm, "TV mode: " DRM_MODE_FMT "\n", 1157 1157 DRM_MODE_ARG(&mode)); 1158 1158 1159 1159 intel_tv_scale_mode_horiz(&mode, hdisplay, ··· 1171 1171 I915_MODE_FLAG_USE_SCANLINE_COUNTER; 1172 1172 } 1173 1173 1174 - static bool intel_tv_source_too_wide(struct drm_i915_private *dev_priv, 1174 + static bool intel_tv_source_too_wide(struct intel_display *display, 1175 1175 int hdisplay) 1176 1176 { 1177 - return DISPLAY_VER(dev_priv) == 3 && hdisplay > 1024; 1177 + return DISPLAY_VER(display) == 3 && hdisplay > 1024; 1178 1178 } 1179 1179 1180 1180 static bool intel_tv_vert_scaling(const struct drm_display_mode *tv_mode, ··· 1192 1192 struct intel_crtc_state *pipe_config, 1193 1193 struct drm_connector_state *conn_state) 1194 1194 { 1195 + struct intel_display *display = to_intel_display(encoder); 1195 1196 struct intel_atomic_state *state = 1196 1197 to_intel_atomic_state(pipe_config->uapi.state); 1197 1198 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); ··· 1215 1214 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; 1216 1215 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; 1217 1216 1218 - drm_dbg_kms(&dev_priv->drm, "forcing bpc to 8 for TV\n"); 1217 + drm_dbg_kms(display->drm, "forcing bpc to 8 for TV\n"); 1219 1218 pipe_config->pipe_bpp = 8*3; 1220 1219 1221 1220 pipe_config->port_clock = tv_mode->clock; ··· 1229 1228 intel_tv_mode_to_mode(adjusted_mode, tv_mode, pipe_config->port_clock); 1230 1229 drm_mode_set_crtcinfo(adjusted_mode, 0); 1231 1230 1232 - if (intel_tv_source_too_wide(dev_priv, hdisplay) || 1231 + if (intel_tv_source_too_wide(display, hdisplay) || 1233 1232 !intel_tv_vert_scaling(adjusted_mode, conn_state, vdisplay)) { 1234 1233 int extra, top, bottom; 1235 1234 1236 1235 extra = adjusted_mode->crtc_vdisplay - vdisplay; 1237 1236 1238 1237 if (extra < 0) { 1239 - drm_dbg_kms(&dev_priv->drm, 1238 + drm_dbg_kms(display->drm, 1240 1239 "No vertical scaling for >1024 pixel wide modes\n"); 1241 1240 return -EINVAL; 1242 1241 } ··· 1270 1269 tv_conn_state->bypass_vfilter = false; 1271 1270 } 1272 1271 1273 - drm_dbg_kms(&dev_priv->drm, "TV mode: " DRM_MODE_FMT "\n", 1272 + drm_dbg_kms(display->drm, "TV mode: " DRM_MODE_FMT "\n", 1274 1273 DRM_MODE_ARG(adjusted_mode)); 1275 1274 1276 1275 /* ··· 1356 1355 } 1357 1356 1358 1357 static void 1359 - set_tv_mode_timings(struct drm_i915_private *dev_priv, 1358 + set_tv_mode_timings(struct intel_display *display, 1360 1359 const struct tv_mode *tv_mode, 1361 1360 bool burst_ena) 1362 1361 { ··· 1402 1401 vctl7 = (tv_mode->vburst_start_f4 << TV_VBURST_START_F4_SHIFT) | 1403 1402 (tv_mode->vburst_end_f4 << TV_VBURST_END_F4_SHIFT); 1404 1403 1405 - intel_de_write(dev_priv, TV_H_CTL_1, hctl1); 1406 - intel_de_write(dev_priv, TV_H_CTL_2, hctl2); 1407 - intel_de_write(dev_priv, TV_H_CTL_3, hctl3); 1408 - intel_de_write(dev_priv, TV_V_CTL_1, vctl1); 1409 - intel_de_write(dev_priv, TV_V_CTL_2, vctl2); 1410 - intel_de_write(dev_priv, TV_V_CTL_3, vctl3); 1411 - intel_de_write(dev_priv, TV_V_CTL_4, vctl4); 1412 - intel_de_write(dev_priv, TV_V_CTL_5, vctl5); 1413 - intel_de_write(dev_priv, TV_V_CTL_6, vctl6); 1414 - intel_de_write(dev_priv, TV_V_CTL_7, vctl7); 1404 + intel_de_write(display, TV_H_CTL_1, hctl1); 1405 + intel_de_write(display, TV_H_CTL_2, hctl2); 1406 + intel_de_write(display, TV_H_CTL_3, hctl3); 1407 + intel_de_write(display, TV_V_CTL_1, vctl1); 1408 + intel_de_write(display, TV_V_CTL_2, vctl2); 1409 + intel_de_write(display, TV_V_CTL_3, vctl3); 1410 + intel_de_write(display, TV_V_CTL_4, vctl4); 1411 + intel_de_write(display, TV_V_CTL_5, vctl5); 1412 + intel_de_write(display, TV_V_CTL_6, vctl6); 1413 + intel_de_write(display, TV_V_CTL_7, vctl7); 1415 1414 } 1416 1415 1417 - static void set_color_conversion(struct drm_i915_private *dev_priv, 1416 + static void set_color_conversion(struct intel_display *display, 1418 1417 const struct color_conversion *color_conversion) 1419 1418 { 1420 - intel_de_write(dev_priv, TV_CSC_Y, 1419 + intel_de_write(display, TV_CSC_Y, 1421 1420 (color_conversion->ry << 16) | color_conversion->gy); 1422 - intel_de_write(dev_priv, TV_CSC_Y2, 1421 + intel_de_write(display, TV_CSC_Y2, 1423 1422 (color_conversion->by << 16) | color_conversion->ay); 1424 - intel_de_write(dev_priv, TV_CSC_U, 1423 + intel_de_write(display, TV_CSC_U, 1425 1424 (color_conversion->ru << 16) | color_conversion->gu); 1426 - intel_de_write(dev_priv, TV_CSC_U2, 1425 + intel_de_write(display, TV_CSC_U2, 1427 1426 (color_conversion->bu << 16) | color_conversion->au); 1428 - intel_de_write(dev_priv, TV_CSC_V, 1427 + intel_de_write(display, TV_CSC_V, 1429 1428 (color_conversion->rv << 16) | color_conversion->gv); 1430 - intel_de_write(dev_priv, TV_CSC_V2, 1429 + intel_de_write(display, TV_CSC_V2, 1431 1430 (color_conversion->bv << 16) | color_conversion->av); 1432 1431 } 1433 1432 ··· 1436 1435 const struct intel_crtc_state *pipe_config, 1437 1436 const struct drm_connector_state *conn_state) 1438 1437 { 1438 + struct intel_display *display = to_intel_display(encoder); 1439 1439 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); 1440 1440 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); 1441 1441 struct intel_tv *intel_tv = enc_to_tv(encoder); ··· 1452 1450 int xpos, ypos; 1453 1451 unsigned int xsize, ysize; 1454 1452 1455 - tv_ctl = intel_de_read(dev_priv, TV_CTL); 1453 + tv_ctl = intel_de_read(display, TV_CTL); 1456 1454 tv_ctl &= TV_CTL_SAVE; 1457 1455 1458 1456 switch (intel_tv->type) { ··· 1527 1525 if (IS_I915GM(dev_priv)) 1528 1526 tv_ctl |= TV_ENC_C0_FIX | TV_ENC_SDP_FIX; 1529 1527 1530 - set_tv_mode_timings(dev_priv, tv_mode, burst_ena); 1528 + set_tv_mode_timings(display, tv_mode, burst_ena); 1531 1529 1532 - intel_de_write(dev_priv, TV_SC_CTL_1, scctl1); 1533 - intel_de_write(dev_priv, TV_SC_CTL_2, scctl2); 1534 - intel_de_write(dev_priv, TV_SC_CTL_3, scctl3); 1530 + intel_de_write(display, TV_SC_CTL_1, scctl1); 1531 + intel_de_write(display, TV_SC_CTL_2, scctl2); 1532 + intel_de_write(display, TV_SC_CTL_3, scctl3); 1535 1533 1536 - set_color_conversion(dev_priv, color_conversion); 1534 + set_color_conversion(display, color_conversion); 1537 1535 1538 - if (DISPLAY_VER(dev_priv) >= 4) 1539 - intel_de_write(dev_priv, TV_CLR_KNOBS, 0x00404000); 1536 + if (DISPLAY_VER(display) >= 4) 1537 + intel_de_write(display, TV_CLR_KNOBS, 0x00404000); 1540 1538 else 1541 - intel_de_write(dev_priv, TV_CLR_KNOBS, 0x00606000); 1539 + intel_de_write(display, TV_CLR_KNOBS, 0x00606000); 1542 1540 1543 1541 if (video_levels) 1544 - intel_de_write(dev_priv, TV_CLR_LEVEL, 1542 + intel_de_write(display, TV_CLR_LEVEL, 1545 1543 ((video_levels->black << TV_BLACK_LEVEL_SHIFT) | (video_levels->blank << TV_BLANK_LEVEL_SHIFT))); 1546 1544 1547 1545 assert_transcoder_disabled(dev_priv, pipe_config->cpu_transcoder); ··· 1550 1548 tv_filter_ctl = TV_AUTO_SCALE; 1551 1549 if (tv_conn_state->bypass_vfilter) 1552 1550 tv_filter_ctl |= TV_V_FILTER_BYPASS; 1553 - intel_de_write(dev_priv, TV_FILTER_CTL_1, tv_filter_ctl); 1551 + intel_de_write(display, TV_FILTER_CTL_1, tv_filter_ctl); 1554 1552 1555 1553 xsize = tv_mode->hblank_start - tv_mode->hblank_end; 1556 1554 ysize = intel_tv_mode_vdisplay(tv_mode); ··· 1561 1559 conn_state->tv.margins.right); 1562 1560 ysize -= (tv_conn_state->margins.top + 1563 1561 tv_conn_state->margins.bottom); 1564 - intel_de_write(dev_priv, TV_WIN_POS, (xpos << 16) | ypos); 1565 - intel_de_write(dev_priv, TV_WIN_SIZE, (xsize << 16) | ysize); 1562 + intel_de_write(display, TV_WIN_POS, (xpos << 16) | ypos); 1563 + intel_de_write(display, TV_WIN_SIZE, (xsize << 16) | ysize); 1566 1564 1567 1565 j = 0; 1568 1566 for (i = 0; i < 60; i++) 1569 - intel_de_write(dev_priv, TV_H_LUMA(i), 1567 + intel_de_write(display, TV_H_LUMA(i), 1570 1568 tv_mode->filter_table[j++]); 1571 1569 for (i = 0; i < 60; i++) 1572 - intel_de_write(dev_priv, TV_H_CHROMA(i), 1570 + intel_de_write(display, TV_H_CHROMA(i), 1573 1571 tv_mode->filter_table[j++]); 1574 1572 for (i = 0; i < 43; i++) 1575 - intel_de_write(dev_priv, TV_V_LUMA(i), 1573 + intel_de_write(display, TV_V_LUMA(i), 1576 1574 tv_mode->filter_table[j++]); 1577 1575 for (i = 0; i < 43; i++) 1578 - intel_de_write(dev_priv, TV_V_CHROMA(i), 1576 + intel_de_write(display, TV_V_CHROMA(i), 1579 1577 tv_mode->filter_table[j++]); 1580 - intel_de_write(dev_priv, TV_DAC, 1581 - intel_de_read(dev_priv, TV_DAC) & TV_DAC_SAVE); 1582 - intel_de_write(dev_priv, TV_CTL, tv_ctl); 1578 + intel_de_write(display, TV_DAC, 1579 + intel_de_read(display, TV_DAC) & TV_DAC_SAVE); 1580 + intel_de_write(display, TV_CTL, tv_ctl); 1583 1581 } 1584 1582 1585 1583 static int 1586 1584 intel_tv_detect_type(struct intel_tv *intel_tv, 1587 1585 struct drm_connector *connector) 1588 1586 { 1587 + struct intel_display *display = to_intel_display(connector->dev); 1589 1588 struct intel_crtc *crtc = to_intel_crtc(connector->state->crtc); 1590 1589 struct drm_device *dev = connector->dev; 1591 1590 struct drm_i915_private *dev_priv = to_i915(dev); ··· 1603 1600 spin_unlock_irq(&dev_priv->irq_lock); 1604 1601 } 1605 1602 1606 - save_tv_dac = tv_dac = intel_de_read(dev_priv, TV_DAC); 1607 - save_tv_ctl = tv_ctl = intel_de_read(dev_priv, TV_CTL); 1603 + save_tv_dac = tv_dac = intel_de_read(display, TV_DAC); 1604 + save_tv_ctl = tv_ctl = intel_de_read(display, TV_CTL); 1608 1605 1609 1606 /* Poll for TV detection */ 1610 1607 tv_ctl &= ~(TV_ENC_ENABLE | TV_ENC_PIPE_SEL_MASK | TV_TEST_MODE_MASK); ··· 1630 1627 tv_dac &= ~(TVDAC_STATE_CHG_EN | TVDAC_A_SENSE_CTL | 1631 1628 TVDAC_B_SENSE_CTL | TVDAC_C_SENSE_CTL); 1632 1629 1633 - intel_de_write(dev_priv, TV_CTL, tv_ctl); 1634 - intel_de_write(dev_priv, TV_DAC, tv_dac); 1635 - intel_de_posting_read(dev_priv, TV_DAC); 1630 + intel_de_write(display, TV_CTL, tv_ctl); 1631 + intel_de_write(display, TV_DAC, tv_dac); 1632 + intel_de_posting_read(display, TV_DAC); 1636 1633 1637 1634 intel_crtc_wait_for_next_vblank(crtc); 1638 1635 1639 1636 type = -1; 1640 - tv_dac = intel_de_read(dev_priv, TV_DAC); 1641 - drm_dbg_kms(&dev_priv->drm, "TV detected: %x, %x\n", tv_ctl, tv_dac); 1637 + tv_dac = intel_de_read(display, TV_DAC); 1638 + drm_dbg_kms(display->drm, "TV detected: %x, %x\n", tv_ctl, tv_dac); 1642 1639 /* 1643 1640 * A B C 1644 1641 * 0 1 1 Composite ··· 1646 1643 * 0 0 0 Component 1647 1644 */ 1648 1645 if ((tv_dac & TVDAC_SENSE_MASK) == (TVDAC_B_SENSE | TVDAC_C_SENSE)) { 1649 - drm_dbg_kms(&dev_priv->drm, 1646 + drm_dbg_kms(display->drm, 1650 1647 "Detected Composite TV connection\n"); 1651 1648 type = DRM_MODE_CONNECTOR_Composite; 1652 1649 } else if ((tv_dac & (TVDAC_A_SENSE|TVDAC_B_SENSE)) == TVDAC_A_SENSE) { 1653 - drm_dbg_kms(&dev_priv->drm, 1650 + drm_dbg_kms(display->drm, 1654 1651 "Detected S-Video TV connection\n"); 1655 1652 type = DRM_MODE_CONNECTOR_SVIDEO; 1656 1653 } else if ((tv_dac & TVDAC_SENSE_MASK) == 0) { 1657 - drm_dbg_kms(&dev_priv->drm, 1654 + drm_dbg_kms(display->drm, 1658 1655 "Detected Component TV connection\n"); 1659 1656 type = DRM_MODE_CONNECTOR_Component; 1660 1657 } else { 1661 - drm_dbg_kms(&dev_priv->drm, "Unrecognised TV connection\n"); 1658 + drm_dbg_kms(display->drm, "Unrecognised TV connection\n"); 1662 1659 type = -1; 1663 1660 } 1664 1661 1665 - intel_de_write(dev_priv, TV_DAC, save_tv_dac & ~TVDAC_STATE_CHG_EN); 1666 - intel_de_write(dev_priv, TV_CTL, save_tv_ctl); 1667 - intel_de_posting_read(dev_priv, TV_CTL); 1662 + intel_de_write(display, TV_DAC, save_tv_dac & ~TVDAC_STATE_CHG_EN); 1663 + intel_de_write(display, TV_CTL, save_tv_ctl); 1664 + intel_de_posting_read(display, TV_CTL); 1668 1665 1669 1666 /* For unknown reasons the hw barfs if we don't do this vblank wait. */ 1670 1667 intel_crtc_wait_for_next_vblank(crtc); ··· 1714 1711 struct drm_modeset_acquire_ctx *ctx, 1715 1712 bool force) 1716 1713 { 1714 + struct intel_display *display = to_intel_display(connector->dev); 1717 1715 struct drm_i915_private *i915 = to_i915(connector->dev); 1718 1716 struct intel_tv *intel_tv = intel_attached_tv(to_intel_connector(connector)); 1719 1717 enum drm_connector_status status; 1720 1718 int type; 1721 1719 1722 - drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] force=%d\n", 1720 + drm_dbg_kms(display->drm, "[CONNECTOR:%d:%s] force=%d\n", 1723 1721 connector->base.id, connector->name, force); 1724 1722 1725 1723 if (!intel_display_device_enabled(i915)) ··· 1795 1791 static int 1796 1792 intel_tv_get_modes(struct drm_connector *connector) 1797 1793 { 1798 - struct drm_i915_private *dev_priv = to_i915(connector->dev); 1794 + struct intel_display *display = to_intel_display(connector->dev); 1799 1795 const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state); 1800 1796 int i, count = 0; 1801 1797 ··· 1809 1805 continue; 1810 1806 1811 1807 /* no vertical scaling with wide sources on gen3 */ 1812 - if (DISPLAY_VER(dev_priv) == 3 && input->w > 1024 && 1808 + if (DISPLAY_VER(display) == 3 && input->w > 1024 && 1813 1809 input->h > intel_tv_mode_vdisplay(tv_mode)) 1814 1810 continue; 1815 1811 ··· 1826 1822 */ 1827 1823 intel_tv_mode_to_mode(mode, tv_mode, tv_mode->clock); 1828 1824 if (count == 0) { 1829 - drm_dbg_kms(&dev_priv->drm, "TV mode: " DRM_MODE_FMT "\n", 1825 + drm_dbg_kms(display->drm, 1826 + "TV mode: " DRM_MODE_FMT "\n", 1830 1827 DRM_MODE_ARG(mode)); 1831 1828 } 1832 1829 intel_tv_scale_mode_horiz(mode, input->w, 0, 0); ··· 1892 1887 1893 1888 static void intel_tv_add_properties(struct drm_connector *connector) 1894 1889 { 1895 - struct drm_i915_private *i915 = to_i915(connector->dev); 1890 + struct intel_display *display = to_intel_display(connector->dev); 1896 1891 struct drm_connector_state *conn_state = connector->state; 1897 1892 const char *tv_format_names[ARRAY_SIZE(tv_modes)]; 1898 1893 int i; ··· 1908 1903 /* Create TV properties then attach current values */ 1909 1904 for (i = 0; i < ARRAY_SIZE(tv_modes); i++) { 1910 1905 /* 1080p50/1080p60 not supported on gen3 */ 1911 - if (DISPLAY_VER(i915) == 3 && tv_modes[i].oversample == 1) 1906 + if (DISPLAY_VER(display) == 3 && tv_modes[i].oversample == 1) 1912 1907 break; 1913 1908 1914 1909 tv_format_names[i] = tv_modes[i].name; 1915 1910 } 1916 - drm_mode_create_tv_properties_legacy(&i915->drm, i, tv_format_names); 1911 + drm_mode_create_tv_properties_legacy(display->drm, i, tv_format_names); 1917 1912 1918 1913 drm_object_attach_property(&connector->base, 1919 - i915->drm.mode_config.legacy_tv_mode_property, 1914 + display->drm->mode_config.legacy_tv_mode_property, 1920 1915 conn_state->tv.legacy_mode); 1921 1916 drm_object_attach_property(&connector->base, 1922 - i915->drm.mode_config.tv_left_margin_property, 1917 + display->drm->mode_config.tv_left_margin_property, 1923 1918 conn_state->tv.margins.left); 1924 1919 drm_object_attach_property(&connector->base, 1925 - i915->drm.mode_config.tv_top_margin_property, 1920 + display->drm->mode_config.tv_top_margin_property, 1926 1921 conn_state->tv.margins.top); 1927 1922 drm_object_attach_property(&connector->base, 1928 - i915->drm.mode_config.tv_right_margin_property, 1923 + display->drm->mode_config.tv_right_margin_property, 1929 1924 conn_state->tv.margins.right); 1930 1925 drm_object_attach_property(&connector->base, 1931 - i915->drm.mode_config.tv_bottom_margin_property, 1926 + display->drm->mode_config.tv_bottom_margin_property, 1932 1927 conn_state->tv.margins.bottom); 1933 1928 } 1934 1929 1935 1930 void 1936 - intel_tv_init(struct drm_i915_private *dev_priv) 1931 + intel_tv_init(struct intel_display *display) 1937 1932 { 1938 - struct intel_display *display = &dev_priv->display; 1939 1933 struct drm_connector *connector; 1940 1934 struct intel_tv *intel_tv; 1941 1935 struct intel_encoder *intel_encoder; 1942 1936 struct intel_connector *intel_connector; 1943 1937 u32 tv_dac_on, tv_dac_off, save_tv_dac; 1944 1938 1945 - if ((intel_de_read(dev_priv, TV_CTL) & TV_FUSE_STATE_MASK) == TV_FUSE_STATE_DISABLED) 1939 + if ((intel_de_read(display, TV_CTL) & TV_FUSE_STATE_MASK) == TV_FUSE_STATE_DISABLED) 1946 1940 return; 1947 1941 1948 1942 if (!intel_bios_is_tv_present(display)) { 1949 - drm_dbg_kms(&dev_priv->drm, "Integrated TV is not present.\n"); 1943 + drm_dbg_kms(display->drm, "Integrated TV is not present.\n"); 1950 1944 return; 1951 1945 } 1952 1946 ··· 1953 1949 * Sanity check the TV output by checking to see if the 1954 1950 * DAC register holds a value 1955 1951 */ 1956 - save_tv_dac = intel_de_read(dev_priv, TV_DAC); 1952 + save_tv_dac = intel_de_read(display, TV_DAC); 1957 1953 1958 - intel_de_write(dev_priv, TV_DAC, save_tv_dac | TVDAC_STATE_CHG_EN); 1959 - tv_dac_on = intel_de_read(dev_priv, TV_DAC); 1954 + intel_de_write(display, TV_DAC, save_tv_dac | TVDAC_STATE_CHG_EN); 1955 + tv_dac_on = intel_de_read(display, TV_DAC); 1960 1956 1961 - intel_de_write(dev_priv, TV_DAC, save_tv_dac & ~TVDAC_STATE_CHG_EN); 1962 - tv_dac_off = intel_de_read(dev_priv, TV_DAC); 1957 + intel_de_write(display, TV_DAC, save_tv_dac & ~TVDAC_STATE_CHG_EN); 1958 + tv_dac_off = intel_de_read(display, TV_DAC); 1963 1959 1964 - intel_de_write(dev_priv, TV_DAC, save_tv_dac); 1960 + intel_de_write(display, TV_DAC, save_tv_dac); 1965 1961 1966 1962 /* 1967 1963 * If the register does not hold the state change enable ··· 1999 1995 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT; 2000 1996 intel_connector->base.polled = intel_connector->polled; 2001 1997 2002 - drm_connector_init(&dev_priv->drm, connector, &intel_tv_connector_funcs, 1998 + drm_connector_init(display->drm, connector, &intel_tv_connector_funcs, 2003 1999 DRM_MODE_CONNECTOR_SVIDEO); 2004 2000 2005 - drm_encoder_init(&dev_priv->drm, &intel_encoder->base, &intel_tv_enc_funcs, 2001 + drm_encoder_init(display->drm, &intel_encoder->base, 2002 + &intel_tv_enc_funcs, 2006 2003 DRM_MODE_ENCODER_TVDAC, "TV"); 2007 2004 2008 2005 intel_encoder->compute_config = intel_tv_compute_config;
+3 -3
drivers/gpu/drm/i915/display/intel_tv.h
··· 6 6 #ifndef __INTEL_TV_H__ 7 7 #define __INTEL_TV_H__ 8 8 9 - struct drm_i915_private; 9 + struct intel_display; 10 10 11 11 #ifdef I915 12 - void intel_tv_init(struct drm_i915_private *dev_priv); 12 + void intel_tv_init(struct intel_display *display); 13 13 #else 14 - static inline void intel_tv_init(struct drm_i915_private *dev_priv) 14 + static inline void intel_tv_init(struct intel_display *display) 15 15 { 16 16 } 17 17 #endif