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phy: qcom-qmp: qserdes-txrx: Add some more v6.20 register offsets
Add some missing v6.20 registers offsets that are needed by the new
Snapdragon X Elite (X1E80100) platform.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20231122-phy-qualcomm-v6-v6-20-v7-new-offsets-v3-2-dfd1c375ef61@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Abel Vesa
and committed by
Vinod Koul
a4054250
2226ec07
+4
+4
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_20.h
+4
drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_20.h
···
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#define QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_2 0x08
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#define QSERDES_V6_20_RX_UCDR_FO_GAIN_RATE_3 0x0c
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+
#define QSERDES_V6_20_RX_UCDR_SO_GAIN_RATE_2 0x18
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#define QSERDES_V6_20_RX_UCDR_PI_CONTROLS 0x20
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#define QSERDES_V6_20_RX_UCDR_SO_ACC_DEFAULT_VAL_RATE3 0x34
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#define QSERDES_V6_20_RX_IVCM_CAL_CTRL2 0x9c
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#define QSERDES_V6_20_RX_IVCM_POSTCAL_OFFSET 0xa0
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#define QSERDES_V6_20_RX_DFE_1 0xac
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#define QSERDES_V6_20_RX_DFE_2 0xb0
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#define QSERDES_V6_20_RX_DFE_3 0xb4
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#define QSERDES_V6_20_RX_VGA_CAL_MAN_VAL 0xe8
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#define QSERDES_V6_20_RX_GM_CAL 0x10c
···
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#define QSERDES_V6_20_RX_MODE_RATE3_B4 0x220
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#define QSERDES_V6_20_RX_MODE_RATE3_B5 0x224
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#define QSERDES_V6_20_RX_MODE_RATE3_B6 0x228
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+
#define QSERDES_V6_20_RX_BKUP_CTRL1 0x22c
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#endif