···3434353536363737-/* The following table is used to map the USBx port number to 3737+/* The following table is used to map the USBx port number to3838 * the device serial number (or physical USB path), */3939#define MAX_EDGEPORTS 6440404141struct comMapper {4242 char SerialNumber[MAX_SERIALNUMBER_LEN+1]; /* Serial number/usb path */4343- int numPorts; /* Number of ports */4444- int Original[MAX_RS232_PORTS]; /* Port numbers set by IOCTL */4545- int Port[MAX_RS232_PORTS]; /* Actual used port numbers */4343+ int numPorts; /* Number of ports */4444+ int Original[MAX_RS232_PORTS]; /* Port numbers set by IOCTL */4545+ int Port[MAX_RS232_PORTS]; /* Actual used port numbers */4646};47474848···5151/* /proc/edgeport Interface5252 * This interface uses read/write/lseek interface to talk to the edgeport driver5353 * the following read functions are supported: */5454-#define PROC_GET_MAPPING_TO_PATH 15454+#define PROC_GET_MAPPING_TO_PATH 15555#define PROC_GET_COM_ENTRY 25656#define PROC_GET_EDGE_MANUF_DESCRIPTOR 35757#define PROC_GET_BOOT_DESCRIPTOR 4···646465656666/* the following write functions are supported: */6767-#define PROC_SET_COM_MAPPING 16767+#define PROC_SET_COM_MAPPING 16868#define PROC_SET_COM_ENTRY 269697070···9797 __u8 BoardRev; /* PCB revision level (chg only if s/w visible) */98989999 __u8 BootMajorVersion; /* Boot Firmware version: xx. */100100- __u8 BootMinorVersion; /* yy. */101101- __le16 BootBuildNumber; /* zzzz (LE format) */100100+ __u8 BootMinorVersion; /* yy. */101101+ __le16 BootBuildNumber; /* zzzz (LE format) */102102103103 __u8 FirmwareMajorVersion; /* Operational Firmware version:xx. */104104 __u8 FirmwareMinorVersion; /* yy. */
+48-47
drivers/usb/serial/io_ionsp.h
···8989//90909191struct int_status_pkt {9292- __u16 RxBytesAvail; // Additional bytes available to9393- // be read from Bulk IN pipe9494- __u16 TxCredits[ MAX_RS232_PORTS ]; // Additional space available in9595- // given port's TxBuffer9292+ __u16 RxBytesAvail; // Additional bytes available to9393+ // be read from Bulk IN pipe9494+ __u16 TxCredits[MAX_RS232_PORTS]; // Additional space available in9595+ // given port's TxBuffer9696};97979898···115115#define IOSP_CMD_STAT_BIT 0x80 // If set, this is command/status header116116117117#define IS_CMD_STAT_HDR(Byte1) ((Byte1) & IOSP_CMD_STAT_BIT)118118-#define IS_DATA_HDR(Byte1) (! IS_CMD_STAT_HDR(Byte1))118118+#define IS_DATA_HDR(Byte1) (!IS_CMD_STAT_HDR(Byte1))119119120120#define IOSP_GET_HDR_PORT(Byte1) ((__u8) ((Byte1) & IOSP_PORT_MASK))121121-#define IOSP_GET_HDR_DATA_LEN(Byte1, Byte2) ((__u16) ( ((__u16)((Byte1) & 0x78)) << 5) | (Byte2))121121+#define IOSP_GET_HDR_DATA_LEN(Byte1, Byte2) ((__u16) (((__u16)((Byte1) & 0x78)) << 5) | (Byte2))122122#define IOSP_GET_STATUS_CODE(Byte1) ((__u8) (((Byte1) & 0x78) >> 3))123123124124125125//126126// These macros build the 1st and 2nd bytes for a data header127127//128128-#define IOSP_BUILD_DATA_HDR1(Port, Len) ((__u8) (((Port) | ((__u8) (((__u16) (Len)) >> 5) & 0x78 ))))128128+#define IOSP_BUILD_DATA_HDR1(Port, Len) ((__u8) (((Port) | ((__u8) (((__u16) (Len)) >> 5) & 0x78))))129129#define IOSP_BUILD_DATA_HDR2(Port, Len) ((__u8) (Len))130130131131132132//133133// These macros build the 1st and 2nd bytes for a command header134134//135135-#define IOSP_BUILD_CMD_HDR1(Port, Cmd) ((__u8) ( IOSP_CMD_STAT_BIT | (Port) | ((__u8) ((Cmd) << 3)) ))135135+#define IOSP_BUILD_CMD_HDR1(Port, Cmd) ((__u8) (IOSP_CMD_STAT_BIT | (Port) | ((__u8) ((Cmd) << 3))))136136137137138138//--------------------------------------------------------------···194194// Define macros to simplify building of IOSP cmds195195//196196197197-#define MAKE_CMD_WRITE_REG(ppBuf, pLen, Port, Reg, Val) \198198- do { \199199- (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1( (Port), IOSP_WRITE_UART_REG(Reg) ); \200200- (*(ppBuf))[1] = (Val); \201201- \202202- *ppBuf += 2; \203203- *pLen += 2; \204204- } while (0)197197+#define MAKE_CMD_WRITE_REG(ppBuf, pLen, Port, Reg, Val) \198198+do { \199199+ (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1((Port), \200200+ IOSP_WRITE_UART_REG(Reg)); \201201+ (*(ppBuf))[1] = (Val); \202202+ \203203+ *ppBuf += 2; \204204+ *pLen += 2; \205205+} while (0)205206206206-#define MAKE_CMD_EXT_CMD(ppBuf, pLen, Port, ExtCmd, Param) \207207- do { \208208- (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1( (Port), IOSP_EXT_CMD ); \209209- (*(ppBuf))[1] = (ExtCmd); \210210- (*(ppBuf))[2] = (Param); \211211- \212212- *ppBuf += 3; \213213- *pLen += 3; \214214- } while (0)207207+#define MAKE_CMD_EXT_CMD(ppBuf, pLen, Port, ExtCmd, Param) \208208+do { \209209+ (*(ppBuf))[0] = IOSP_BUILD_CMD_HDR1((Port), IOSP_EXT_CMD); \210210+ (*(ppBuf))[1] = (ExtCmd); \211211+ (*(ppBuf))[2] = (Param); \212212+ \213213+ *ppBuf += 3; \214214+ *pLen += 3; \215215+} while (0)215216216217217218···311310//312311// IOSP_CMD_RX_CHECK_REQ313312//314314-// This command is used to assist in the implementation of the 315315-// IOCTL_SERIAL_PURGE Windows IOCTL. 316316-// This IOSP command tries to place a marker at the end of the RX 317317-// queue in the Edgeport. If the Edgeport RX queue is full then 318318-// the Check will be discarded. 319319-// It is up to the device driver to timeout waiting for the 320320-// RX_CHECK_RSP. If a RX_CHECK_RSP is received, the driver is 321321-// sure that all data has been received from the edgeport and 313313+// This command is used to assist in the implementation of the314314+// IOCTL_SERIAL_PURGE Windows IOCTL.315315+// This IOSP command tries to place a marker at the end of the RX316316+// queue in the Edgeport. If the Edgeport RX queue is full then317317+// the Check will be discarded.318318+// It is up to the device driver to timeout waiting for the319319+// RX_CHECK_RSP. If a RX_CHECK_RSP is received, the driver is320320+// sure that all data has been received from the edgeport and322321// may now purge any internal RX buffers.323323-// Note tat the sequence numbers may be used to detect lost 322322+// Note tat the sequence numbers may be used to detect lost324323// CHECK_REQs.325324326325// Example for Port 0···342341//343342// 1ssssPPP P1P1P1P1 [ P2P2P2P2P2 ]...344343//345345-// ssss: 00-07 2-byte status. ssss identifies which UART register344344+// ssss: 00-07 2-byte status. ssss identifies which UART register346345// has changed value, and the new value is in P1.347346// Note that the ssss values do not correspond to the348347// 16554 register numbers given in 16554.H. Instead,···384383// returns this in order to report385384// changes in modem status lines386385// (CTS, DSR, RI, CD)387387-// 386386+//388387389388// 0x02 // Available for future expansion390390-// 0x03 // 391391-// 0x04 // 392392-// 0x05 // 393393-// 0x06 // 394394-// 0x07 // 389389+// 0x03 //390390+// 0x04 //391391+// 0x05 //392392+// 0x06 //393393+// 0x07 //395394396395397396/****************************************************···401400#define IOSP_STATUS_LSR_DATA 0x08 // P1 is new value of LSR register (same as STATUS_LSR)402401403402// P2 is errored character read from404404-// RxFIFO after LSR reported an error. 403403+// RxFIFO after LSR reported an error.405404406405#define IOSP_EXT_STATUS 0x09 // P1 is status/response code, param in P2.407406···409408// Response Codes (P1 values) for 3-byte status messages410409411410#define IOSP_EXT_STATUS_CHASE_RSP 0 // Reply to CHASE_PORT cmd. P2 is outcome:412412-#define IOSP_EXT_STATUS_CHASE_PASS 0 // P2 = 0: All Tx data drained successfully411411+#define IOSP_EXT_STATUS_CHASE_PASS 0 // P2 = 0: All Tx data drained successfully413412#define IOSP_EXT_STATUS_CHASE_FAIL 1 // P2 = 1: Timed out (stuck due to flow414413415414// control from remote device).···447446// Macros to parse status messages448447//449448450450-#define IOSP_GET_STATUS_LEN(code) ( (code) < 8 ? 2 : ((code) < 0x0A ? 3 : 4) )449449+#define IOSP_GET_STATUS_LEN(code) ((code) < 8 ? 2 : ((code) < 0x0A ? 3 : 4))451450452452-#define IOSP_STATUS_IS_2BYTE(code) ( (code) < 0x08 )453453-#define IOSP_STATUS_IS_3BYTE(code) ( ((code) >= 0x08) && ((code) <= 0x0B) )454454-#define IOSP_STATUS_IS_4BYTE(code) ( ((code) >= 0x0C) && ((code) <= 0x0D) )451451+#define IOSP_STATUS_IS_2BYTE(code) ((code) < 0x08)452452+#define IOSP_STATUS_IS_3BYTE(code) (((code) >= 0x08) && ((code) <= 0x0B))453453+#define IOSP_STATUS_IS_4BYTE(code) (((code) >= 0x0C) && ((code) <= 0x0D))455454
+47-41
drivers/usb/serial/io_ti.h
···11-/***************************************************************************** 11+/*****************************************************************************22 *33 * Copyright (C) 1997-2002 Inside Out Networks, Inc.44 *···2222#define DTK_ADDR_SPACE_I2C_TYPE_II 0x82 /* Addr is placed in I2C area */2323#define DTK_ADDR_SPACE_I2C_TYPE_III 0x83 /* Addr is placed in I2C area */24242525-// UART Defines2626-#define UMPMEM_BASE_UART1 0xFFA0 /* UMP UART1 base address */2727-#define UMPMEM_BASE_UART2 0xFFB0 /* UMP UART2 base address */2828-#define UMPMEM_OFFS_UART_LSR 0x05 /* UMP UART LSR register offset */2525+/* UART Defines */2626+#define UMPMEM_BASE_UART1 0xFFA0 /* UMP UART1 base address */2727+#define UMPMEM_BASE_UART2 0xFFB0 /* UMP UART2 base address */2828+#define UMPMEM_OFFS_UART_LSR 0x05 /* UMP UART LSR register offset */29293030/* Bits per character */3131#define UMP_UART_CHAR5BITS 0x00···5454#define UMP_UART_LSR_RX_MASK 0x105555#define UMP_UART_LSR_TX_MASK 0x2056565757-#define UMP_UART_LSR_DATA_MASK ( LSR_PAR_ERR | LSR_FRM_ERR | LSR_BREAK )5757+#define UMP_UART_LSR_DATA_MASK (LSR_PAR_ERR | LSR_FRM_ERR | LSR_BREAK)58585959/* Port Settings Constants) */6060#define UMP_MASK_UART_FLAGS_RTS_FLOW 0x0001···7979#define UMP_PORT_DIR_OUT 0x018080#define UMP_PORT_DIR_IN 0x0281818282-// Address of Port 08383-#define UMPM_UART1_PORT 0x038282+/* Address of Port 0 */8383+#define UMPM_UART1_PORT 0x0384848585-// Commands8686-#define UMPC_SET_CONFIG 0x058787-#define UMPC_OPEN_PORT 0x068888-#define UMPC_CLOSE_PORT 0x078989-#define UMPC_START_PORT 0x089090-#define UMPC_STOP_PORT 0x099191-#define UMPC_TEST_PORT 0x0A9292-#define UMPC_PURGE_PORT 0x0B8585+/* Commands */8686+#define UMPC_SET_CONFIG 0x058787+#define UMPC_OPEN_PORT 0x068888+#define UMPC_CLOSE_PORT 0x078989+#define UMPC_START_PORT 0x089090+#define UMPC_STOP_PORT 0x099191+#define UMPC_TEST_PORT 0x0A9292+#define UMPC_PURGE_PORT 0x0B93939494-#define UMPC_COMPLETE_READ 0x80 // Force the Firmware to complete the current Read9595-#define UMPC_HARDWARE_RESET 0x81 // Force UMP back into BOOT Mode9696-#define UMPC_COPY_DNLD_TO_I2C 0x82 // Copy current download image to type 0xf2 record in 16k I2C9797- // firmware will change 0xff record to type 2 record when complete9494+/* Force the Firmware to complete the current Read */9595+#define UMPC_COMPLETE_READ 0x809696+/* Force UMP back into BOOT Mode */9797+#define UMPC_HARDWARE_RESET 0x819898+/*9999+ * Copy current download image to type 0xf2 record in 16k I2C100100+ * firmware will change 0xff record to type 2 record when complete101101+ */102102+#define UMPC_COPY_DNLD_TO_I2C 0x82981039999- // Special function register commands100100- // wIndex is register address101101- // wValue is MSB/LSB mask/data102102-#define UMPC_WRITE_SFR 0x83 // Write SFR Register104104+/*105105+ * Special function register commands106106+ * wIndex is register address107107+ * wValue is MSB/LSB mask/data108108+ */109109+#define UMPC_WRITE_SFR 0x83 /* Write SFR Register */103110104104- // wIndex is register address105105-#define UMPC_READ_SFR 0x84 // Read SRF Register111111+/* wIndex is register address */112112+#define UMPC_READ_SFR 0x84 /* Read SRF Register */106113107107- // Set or Clear DTR (wValue bit 0 Set/Clear) wIndex ModuleID (port)114114+/* Set or Clear DTR (wValue bit 0 Set/Clear) wIndex ModuleID (port) */108115#define UMPC_SET_CLR_DTR 0x85109116110110- // Set or Clear RTS (wValue bit 0 Set/Clear) wIndex ModuleID (port)117117+/* Set or Clear RTS (wValue bit 0 Set/Clear) wIndex ModuleID (port) */111118#define UMPC_SET_CLR_RTS 0x86112119113113- // Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port)120120+/* Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */114121#define UMPC_SET_CLR_LOOPBACK 0x87115122116116- // Set or Clear BREAK (wValue bit 0 Set/Clear) wIndex ModuleID (port)123123+/* Set or Clear BREAK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */117124#define UMPC_SET_CLR_BREAK 0x88118125119119- // Read MSR wIndex ModuleID (port)126126+/* Read MSR wIndex ModuleID (port) */120127#define UMPC_READ_MSR 0x89121128122122- /* Toolkit commands */123123- /* Read-write group */124124-#define UMPC_MEMORY_READ 0x92125125-#define UMPC_MEMORY_WRITE 0x93129129+/* Toolkit commands */130130+/* Read-write group */131131+#define UMPC_MEMORY_READ 0x92132132+#define UMPC_MEMORY_WRITE 0x93126133127134/*128135 * UMP DMA Definitions···137130#define UMPD_OEDB1_ADDRESS 0xFF08138131#define UMPD_OEDB2_ADDRESS 0xFF10139132140140-struct out_endpoint_desc_block141141-{133133+struct out_endpoint_desc_block {142134 __u8 Configuration;143135 __u8 XBufAddr;144136 __u8 XByteCount;···153147 * TYPE DEFINITIONS154148 * Structures for Firmware commands155149 */156156-struct ump_uart_config /* UART settings */157157-{150150+/* UART settings */151151+struct ump_uart_config {158152 __u16 wBaudRate; /* Baud rate */159153 __u16 wFlags; /* Bitmap mask of flags */160154 __u8 bDataBits; /* 5..8 - data bits per character */···171165 * TYPE DEFINITIONS172166 * Structures for USB interrupts173167 */174174-struct ump_interrupt /* Interrupt packet structure */175175-{168168+/* Interrupt packet structure */169169+struct ump_interrupt {176170 __u8 bICode; /* Interrupt code (interrupt num) */177171 __u8 bIInfo; /* Interrupt information */178172} __attribute__((packed));
+38-49
drivers/usb/serial/io_usbvend.h
···26262727//2828// Definitions of USB product IDs2929-// 2929+//30303131#define USB_VENDOR_ID_ION 0x1608 // Our VID3232#define USB_VENDOR_ID_TI 0x0451 // TI VID···5454// Product IDs - assigned to match middle digit of serial number (No longer true)55555656#define ION_DEVICE_ID_80251_NETCHIP 0x020 // This bit is set in the PID if this edgeport hardware$5757- // is based on the 80251+Netchip. 5757+ // is based on the 80251+Netchip.58585959#define ION_DEVICE_ID_GENERATION_1 0x00 // Value for 930 based edgeports6060#define ION_DEVICE_ID_GENERATION_2 0x01 // Value for 80251+Netchip.···134134#define ION_DEVICE_ID_TI_EDGEPORT_416 0x0212 // Edgeport/416135135#define ION_DEVICE_ID_TI_EDGEPORT_1 0x0215 // Edgeport/1 RS232136136#define ION_DEVICE_ID_TI_EDGEPORT_42 0x0217 // Edgeport/42 4 hub 2 RS232137137-#define ION_DEVICE_ID_TI_EDGEPORT_22I 0x021A // Edgeport/22I is an Edgeport/4 with ports 1&2 RS422 and ports 3&4 RS232137137+#define ION_DEVICE_ID_TI_EDGEPORT_22I 0x021A // Edgeport/22I is an Edgeport/4 with ports 1&2 RS422 and ports 3&4 RS232138138#define ION_DEVICE_ID_TI_EDGEPORT_2C 0x021B // Edgeport/2c RS232139139#define ION_DEVICE_ID_TI_EDGEPORT_221C 0x021C // Edgeport/221c is a TI based Edgeport/2 with lucent chip and140140 // 2 external hub ports - Large I2C···142142 // 2 external hub ports - Large I2C143143#define ION_DEVICE_ID_TI_EDGEPORT_21C 0x021E // Edgeport/21c is a TI based Edgeport/2 with lucent chip144144145145-// Generation 3 devices -- 3410 based edgport/1 (256 byte I2C) 145145+// Generation 3 devices -- 3410 based edgport/1 (256 byte I2C)146146#define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1 0x0240 // Edgeport/1 RS232147147#define ION_DEVICE_ID_TI_TI3410_EDGEPORT_1I 0x0241 // Edgeport/1i- RS422 model148148···176176 // Default to /P function177177178178#define ION_DEVICE_ID_PLUS_PWR_HP4CD 0x30C // 5052 Plus Power HubPort/4CD+ (for Dell)179179-#define ION_DEVICE_ID_PLUS_PWR_HP4C 0x30D // 5052 Plus Power HubPort/4C+ 179179+#define ION_DEVICE_ID_PLUS_PWR_HP4C 0x30D // 5052 Plus Power HubPort/4C+180180#define ION_DEVICE_ID_PLUS_PWR_PCI 0x30E // 3410 Plus Power PCI Host Controller 4 port181181182182···217217#define ION_DEVICE_ID_MT4X56USB 0x1403 // OEM device218218219219220220-#define GENERATION_ID_FROM_USB_PRODUCT_ID( ProductId ) \221221- ( (__u16) ((ProductId >> 8) & (ION_GENERATION_MASK)) )220220+#define GENERATION_ID_FROM_USB_PRODUCT_ID(ProductId) \221221+ ((__u16) ((ProductId >> 8) & (ION_GENERATION_MASK)))222222223223-#define MAKE_USB_PRODUCT_ID( OemId, DeviceId ) \224224- ( (__u16) (((OemId) << 10) || (DeviceId)) )223223+#define MAKE_USB_PRODUCT_ID(OemId, DeviceId) \224224+ ((__u16) (((OemId) << 10) || (DeviceId)))225225226226-#define DEVICE_ID_FROM_USB_PRODUCT_ID( ProductId ) \227227- ( (__u16) ((ProductId) & (EDGEPORT_DEVICE_ID_MASK)) )226226+#define DEVICE_ID_FROM_USB_PRODUCT_ID(ProductId) \227227+ ((__u16) ((ProductId) & (EDGEPORT_DEVICE_ID_MASK)))228228229229-#define OEM_ID_FROM_USB_PRODUCT_ID( ProductId ) \230230- ( (__u16) (((ProductId) >> 10) & 0x3F) )229229+#define OEM_ID_FROM_USB_PRODUCT_ID(ProductId) \230230+ ((__u16) (((ProductId) >> 10) & 0x3F))231231232232//233233// Definitions of parameters for download code. Note that these are···237237238238// TxCredits value below which driver won't bother sending (to prevent too many small writes).239239// Send only if above 25%240240-#define EDGE_FW_GET_TX_CREDITS_SEND_THRESHOLD(InitialCredit, MaxPacketSize) (max( ((InitialCredit) / 4), (MaxPacketSize) ))240240+#define EDGE_FW_GET_TX_CREDITS_SEND_THRESHOLD(InitialCredit, MaxPacketSize) (max(((InitialCredit) / 4), (MaxPacketSize)))241241242242#define EDGE_FW_BULK_MAX_PACKET_SIZE 64 // Max Packet Size for Bulk In Endpoint (EP1)243243#define EDGE_FW_BULK_READ_BUFFER_SIZE 1024 // Size to use for Bulk reads···263263// wValue = 16-bit address264264// wIndex = unused (though we could put segment 00: or FF: here)265265// wLength = # bytes to read/write (max 64)266266-// 266266+//267267268268#define USB_REQUEST_ION_RESET_DEVICE 0 // Warm reboot Edgeport, retaining USB address269269#define USB_REQUEST_ION_GET_EPIC_DESC 1 // Get Edgeport Compatibility Descriptor···278278#define USB_REQUEST_ION_ENABLE_SUSPEND 9 // Enable/Disable suspend feature279279 // (wValue != 0: Enable; wValue = 0: Disable)280280281281-#define USB_REQUEST_ION_SEND_IOSP 10 // Send an IOSP command to the edgeport over the control pipe 281281+#define USB_REQUEST_ION_SEND_IOSP 10 // Send an IOSP command to the edgeport over the control pipe282282#define USB_REQUEST_ION_RECV_IOSP 11 // Receive an IOSP command from the edgeport over the control pipe283283284284···301301// this is a "real" Edgeport.302302//303303304304-struct edge_compatibility_bits305305-{304304+struct edge_compatibility_bits {306305 // This __u32 defines which Vendor-specific commands/functionality307306 // the device supports on the default EP0 pipe.308307···333334 __u32 TrueEdgeport : 1; // 0001 Set if device is a 'real' Edgeport334335 // (Used only by driver, NEVER set by an EPiC device)335336 __u32 GenUnused : 31; // Available for future expansion, must be 0336336-337337};338338339339#define EDGE_COMPATIBILITY_MASK0 0x0001340340#define EDGE_COMPATIBILITY_MASK1 0x3FFF341341#define EDGE_COMPATIBILITY_MASK2 0x0001342342343343-struct edge_compatibility_descriptor344344-{343343+struct edge_compatibility_descriptor {345344 __u8 Length; // Descriptor Length (per USB spec)346345 __u8 DescType; // Descriptor Type (per USB spec, =DEVICE type)347346 __u8 EpicVer; // Version of EPiC spec supported348348- // (Currently must be 1)347347+ // (Currently must be 1)349348 __u8 NumPorts; // Number of serial ports supported350349 __u8 iDownloadFile; // Index of string containing download code filename351351- // 0=no download, FF=download compiled into driver.352352- __u8 Unused[ 3 ]; // Available for future expansion, must be 0353353- // (Currently must be 0).350350+ // 0=no download, FF=download compiled into driver.351351+ __u8 Unused[3]; // Available for future expansion, must be 0352352+ // (Currently must be 0).354353 __u8 MajorVersion; // Firmware version: xx.355354 __u8 MinorVersion; // yy.356355 __le16 BuildNumber; // zzzz (LE format)···356359 // The following structure contains __u32s, with each bit357360 // specifying whether the EPiC device supports the given358361 // command or functionality.359359-360362 struct edge_compatibility_bits Supports;361361-362363};363364364365// Values for iDownloadFile···386391387392// Define the max block size that may be read or written388393// in a read/write RAM/ROM command.389389-#define MAX_SIZE_REQ_ION_READ_MEM ( (__u16) 64 )390390-#define MAX_SIZE_REQ_ION_WRITE_MEM ( (__u16) 64 )394394+#define MAX_SIZE_REQ_ION_READ_MEM ((__u16)64)395395+#define MAX_SIZE_REQ_ION_WRITE_MEM ((__u16)64)391396392397393398//···540545 __u8 MajorVersion; // C6 Firmware version: xx.541546 __u8 MinorVersion; // C7 yy.542547 __le16 BuildNumber; // C8 zzzz (LE format)543543-548548+544549 __u16 EnumRootDescTable; // CA Root of ROM-based descriptor table545550 __u8 NumDescTypes; // CC Number of supported descriptor types546551···592597#define I2C_DESC_TYPE_ION 0 // Not defined by TI593598594599595595-struct ti_i2c_desc596596-{600600+struct ti_i2c_desc {597601 __u8 Type; // Type of descriptor598602 __u16 Size; // Size of data only not including header599603 __u8 CheckSum; // Checksum (8 bit sum of data only)600604 __u8 Data[0]; // Data starts here601601-}__attribute__((packed));605605+} __attribute__((packed));602606603607// for 5152 devices only (type 2 record)604608// for 3410 the version is stored in the WATCHPORT_FIRMWARE_VERSION descriptor605605-struct ti_i2c_firmware_rec606606-{609609+struct ti_i2c_firmware_rec {607610 __u8 Ver_Major; // Firmware Major version number608611 __u8 Ver_Minor; // Firmware Minor version number609612 __u8 Data[0]; // Download starts here610610-}__attribute__((packed));613613+} __attribute__((packed));611614612615613613-struct watchport_firmware_version614614-{616616+struct watchport_firmware_version {615617// Added 2 bytes for version number616618 __u8 Version_Major; // Download Version (for Watchport)617619 __u8 Version_Minor;618618-}__attribute__((packed));620620+} __attribute__((packed));619621620622621623// Structure of header of download image in fw_down.h622622-struct ti_i2c_image_header623623-{624624+struct ti_i2c_image_header {624625 __le16 Length;625626 __u8 CheckSum;626626-}__attribute__((packed));627627+} __attribute__((packed));627628628628-struct ti_basic_descriptor629629-{629629+struct ti_basic_descriptor {630630 __u8 Power; // Self powered631631 // bit 7: 1 - power switching supported632632 // 0 - power switching not supported···653663#define TI_I2C_SIZE_MASK 0x1f // 5 bits654664#define TI_GET_I2C_SIZE(x) ((((x) & TI_I2C_SIZE_MASK)+1)*256)655665656656-#define TI_MAX_I2C_SIZE ( 16 * 1024 )666666+#define TI_MAX_I2C_SIZE (16 * 1024)657667658658-#define TI_MANUF_VERSION_0 0 668668+#define TI_MANUF_VERSION_0 0659669660670// IonConig2 flags661671#define TI_CONFIG2_RS232 0x01···666676#define TI_CONFIG2_WATCHPORT 0x10667677668678669669-struct edge_ti_manuf_descriptor670670-{679679+struct edge_ti_manuf_descriptor {671680 __u8 IonConfig; // Config byte for ION manufacturing use672681 __u8 IonConfig2; // Expansion673682 __u8 Version; // Version···677688 __u8 HubConfig2; // Used to configure the Hub678689 __u8 TotalPorts; // Total Number of Com Ports for the entire device (All UMPs)679690 __u8 Reserved; // Reserved680680-}__attribute__((packed));691691+} __attribute__((packed));681692682693683694#endif // if !defined(_USBVEND_H)