tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
powerpc/85xx: mpc8548cds - add 36-bit dts
Create mpc8548cds_36b.dts. Support 36-bit mode.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
authored by
Zhao Chenhui
and committed by
Kumar Gala
a2279e3f
0d4fdd32
+86
+86
arch/powerpc/boot/dts/mpc8548cds_36b.dts
+86
arch/powerpc/boot/dts/mpc8548cds_36b.dts
···
1
+
/*
2
+
* MPC8548 CDS Device Tree Source (36-bit address map)
3
+
*
4
+
* Copyright 2012 Freescale Semiconductor Inc.
5
+
*
6
+
* This program is free software; you can redistribute it and/or modify it
7
+
* under the terms of the GNU General Public License as published by the
8
+
* Free Software Foundation; either version 2 of the License, or (at your
9
+
* option) any later version.
10
+
*/
11
+
12
+
/include/ "fsl/mpc8548si-pre.dtsi"
13
+
14
+
/ {
15
+
model = "MPC8548CDS";
16
+
compatible = "MPC8548CDS", "MPC85xxCDS";
17
+
18
+
memory {
19
+
device_type = "memory";
20
+
reg = <0 0 0x0 0x8000000>; // 128M at 0x0
21
+
};
22
+
23
+
board_lbc: lbc: localbus@fe0005000 {
24
+
reg = <0xf 0xe0005000 0 0x1000>;
25
+
26
+
ranges = <0x0 0x0 0xf 0xff000000 0x01000000
27
+
0x1 0x0 0xf 0xf8004000 0x00001000>;
28
+
29
+
};
30
+
31
+
board_soc: soc: soc8548@fe0000000 {
32
+
ranges = <0 0xf 0xe0000000 0x100000>;
33
+
};
34
+
35
+
board_pci0: pci0: pci@fe0008000 {
36
+
reg = <0xf 0xe0008000 0 0x1000>;
37
+
ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000
38
+
0x1000000 0x0 0x00000000 0xf 0xe2000000 0x0 0x800000>;
39
+
clock-frequency = <66666666>;
40
+
};
41
+
42
+
pci1: pci@fe0009000 {
43
+
reg = <0xf 0xe0009000 0 0x1000>;
44
+
ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
45
+
0x1000000 0x0 0x00000000 0xf 0xe2800000 0x0 0x800000>;
46
+
clock-frequency = <66666666>;
47
+
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
48
+
interrupt-map = <
49
+
50
+
/* IDSEL 0x15 */
51
+
0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
52
+
0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
53
+
0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
54
+
0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
55
+
};
56
+
57
+
pci2: pcie@fe000a000 {
58
+
reg = <0xf 0xe000a000 0 0x1000>;
59
+
ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
60
+
0x1000000 0x0 0x00000000 0xf 0xe3000000 0x0 0x100000>;
61
+
pcie@0 {
62
+
ranges = <0x2000000 0x0 0xa0000000
63
+
0x2000000 0x0 0xa0000000
64
+
0x0 0x20000000
65
+
66
+
0x1000000 0x0 0x0
67
+
0x1000000 0x0 0x0
68
+
0x0 0x100000>;
69
+
};
70
+
};
71
+
72
+
rio: rapidio@fe00c0000 {
73
+
reg = <0xf 0xe00c0000 0x0 0x20000>;
74
+
port1 {
75
+
ranges = <0x0 0x0 0xc 0x40000000 0x0 0x20000000>;
76
+
};
77
+
};
78
+
};
79
+
80
+
/*
81
+
* mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
82
+
* for interrupt-map & interrupt-map-mask.
83
+
*/
84
+
85
+
/include/ "fsl/mpc8548si-post.dtsi"
86
+
/include/ "mpc8548cds.dtsi"