Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6

+955 -443
+15 -6
Documentation/filesystems/sysfs-pci.txt
··· 1 Accessing PCI device resources through sysfs 2 3 sysfs, usually mounted at /sys, provides access to PCI resources on platforms 4 that support it. For example, a given bus might look like this: ··· 48 binary - file contains binary data 49 cpumask - file contains a cpumask type 50 51 - The read only files are informational, writes to them will be ignored. 52 - Writable files can be used to perform actions on the device (e.g. changing 53 - config space, detaching a device). mmapable files are available via an 54 - mmap of the file at offset 0 and can be used to do actual device programming 55 - from userspace. Note that some platforms don't support mmapping of certain 56 - resources, so be sure to check the return value from any attempted mmap. 57 58 Accessing legacy resources through sysfs 59 60 Legacy I/O port and ISA memory resources are also provided in sysfs if the 61 underlying platform supports them. They're located in the PCI class heirarchy, ··· 83 to access legacy memory space. 84 85 Supporting PCI access on new platforms 86 87 In order to support PCI resource mapping as described above, Linux platform 88 code must define HAVE_PCI_MMAP and provide a pci_mmap_page_range function.
··· 1 Accessing PCI device resources through sysfs 2 + -------------------------------------------- 3 4 sysfs, usually mounted at /sys, provides access to PCI resources on platforms 5 that support it. For example, a given bus might look like this: ··· 47 binary - file contains binary data 48 cpumask - file contains a cpumask type 49 50 + The read only files are informational, writes to them will be ignored, with 51 + the exception of the 'rom' file. Writable files can be used to perform 52 + actions on the device (e.g. changing config space, detaching a device). 53 + mmapable files are available via an mmap of the file at offset 0 and can be 54 + used to do actual device programming from userspace. Note that some platforms 55 + don't support mmapping of certain resources, so be sure to check the return 56 + value from any attempted mmap. 57 + 58 + The 'rom' file is special in that it provides read-only access to the device's 59 + ROM file, if available. It's disabled by default, however, so applications 60 + should write the string "1" to the file to enable it before attempting a read 61 + call, and disable it following the access by writing "0" to the file. 62 63 Accessing legacy resources through sysfs 64 + ---------------------------------------- 65 66 Legacy I/O port and ISA memory resources are also provided in sysfs if the 67 underlying platform supports them. They're located in the PCI class heirarchy, ··· 75 to access legacy memory space. 76 77 Supporting PCI access on new platforms 78 + -------------------------------------- 79 80 In order to support PCI resource mapping as described above, Linux platform 81 code must define HAVE_PCI_MMAP and provide a pci_mmap_page_range function.
+246
Documentation/pci-error-recovery.txt
···
··· 1 + 2 + PCI Error Recovery 3 + ------------------ 4 + May 31, 2005 5 + 6 + Current document maintainer: 7 + Linas Vepstas <linas@austin.ibm.com> 8 + 9 + 10 + Some PCI bus controllers are able to detect certain "hard" PCI errors 11 + on the bus, such as parity errors on the data and address busses, as 12 + well as SERR and PERR errors. These chipsets are then able to disable 13 + I/O to/from the affected device, so that, for example, a bad DMA 14 + address doesn't end up corrupting system memory. These same chipsets 15 + are also able to reset the affected PCI device, and return it to 16 + working condition. This document describes a generic API form 17 + performing error recovery. 18 + 19 + The core idea is that after a PCI error has been detected, there must 20 + be a way for the kernel to coordinate with all affected device drivers 21 + so that the pci card can be made operational again, possibly after 22 + performing a full electrical #RST of the PCI card. The API below 23 + provides a generic API for device drivers to be notified of PCI 24 + errors, and to be notified of, and respond to, a reset sequence. 25 + 26 + Preliminary sketch of API, cut-n-pasted-n-modified email from 27 + Ben Herrenschmidt, circa 5 april 2005 28 + 29 + The error recovery API support is exposed to the driver in the form of 30 + a structure of function pointers pointed to by a new field in struct 31 + pci_driver. The absence of this pointer in pci_driver denotes an 32 + "non-aware" driver, behaviour on these is platform dependant. 33 + Platforms like ppc64 can try to simulate pci hotplug remove/add. 34 + 35 + The definition of "pci_error_token" is not covered here. It is based on 36 + Seto's work on the synchronous error detection. We still need to define 37 + functions for extracting infos out of an opaque error token. This is 38 + separate from this API. 39 + 40 + This structure has the form: 41 + 42 + struct pci_error_handlers 43 + { 44 + int (*error_detected)(struct pci_dev *dev, pci_error_token error); 45 + int (*mmio_enabled)(struct pci_dev *dev); 46 + int (*resume)(struct pci_dev *dev); 47 + int (*link_reset)(struct pci_dev *dev); 48 + int (*slot_reset)(struct pci_dev *dev); 49 + }; 50 + 51 + A driver doesn't have to implement all of these callbacks. The 52 + only mandatory one is error_detected(). If a callback is not 53 + implemented, the corresponding feature is considered unsupported. 54 + For example, if mmio_enabled() and resume() aren't there, then the 55 + driver is assumed as not doing any direct recovery and requires 56 + a reset. If link_reset() is not implemented, the card is assumed as 57 + not caring about link resets, in which case, if recover is supported, 58 + the core can try recover (but not slot_reset() unless it really did 59 + reset the slot). If slot_reset() is not supported, link_reset() can 60 + be called instead on a slot reset. 61 + 62 + At first, the call will always be : 63 + 64 + 1) error_detected() 65 + 66 + Error detected. This is sent once after an error has been detected. At 67 + this point, the device might not be accessible anymore depending on the 68 + platform (the slot will be isolated on ppc64). The driver may already 69 + have "noticed" the error because of a failing IO, but this is the proper 70 + "synchronisation point", that is, it gives a chance to the driver to 71 + cleanup, waiting for pending stuff (timers, whatever, etc...) to 72 + complete; it can take semaphores, schedule, etc... everything but touch 73 + the device. Within this function and after it returns, the driver 74 + shouldn't do any new IOs. Called in task context. This is sort of a 75 + "quiesce" point. See note about interrupts at the end of this doc. 76 + 77 + Result codes: 78 + - PCIERR_RESULT_CAN_RECOVER: 79 + Driever returns this if it thinks it might be able to recover 80 + the HW by just banging IOs or if it wants to be given 81 + a chance to extract some diagnostic informations (see 82 + below). 83 + - PCIERR_RESULT_NEED_RESET: 84 + Driver returns this if it thinks it can't recover unless the 85 + slot is reset. 86 + - PCIERR_RESULT_DISCONNECT: 87 + Return this if driver thinks it won't recover at all, 88 + (this will detach the driver ? or just leave it 89 + dangling ? to be decided) 90 + 91 + So at this point, we have called error_detected() for all drivers 92 + on the segment that had the error. On ppc64, the slot is isolated. What 93 + happens now typically depends on the result from the drivers. If all 94 + drivers on the segment/slot return PCIERR_RESULT_CAN_RECOVER, we would 95 + re-enable IOs on the slot (or do nothing special if the platform doesn't 96 + isolate slots) and call 2). If not and we can reset slots, we go to 4), 97 + if neither, we have a dead slot. If it's an hotplug slot, we might 98 + "simulate" reset by triggering HW unplug/replug though. 99 + 100 + >>> Current ppc64 implementation assumes that a device driver will 101 + >>> *not* schedule or semaphore in this routine; the current ppc64 102 + >>> implementation uses one kernel thread to notify all devices; 103 + >>> thus, of one device sleeps/schedules, all devices are affected. 104 + >>> Doing better requires complex multi-threaded logic in the error 105 + >>> recovery implementation (e.g. waiting for all notification threads 106 + >>> to "join" before proceeding with recovery.) This seems excessively 107 + >>> complex and not worth implementing. 108 + 109 + >>> The current ppc64 implementation doesn't much care if the device 110 + >>> attempts i/o at this point, or not. I/O's will fail, returning 111 + >>> a value of 0xff on read, and writes will be dropped. If the device 112 + >>> driver attempts more than 10K I/O's to a frozen adapter, it will 113 + >>> assume that the device driver has gone into an infinite loop, and 114 + >>> it will panic the the kernel. 115 + 116 + 2) mmio_enabled() 117 + 118 + This is the "early recovery" call. IOs are allowed again, but DMA is 119 + not (hrm... to be discussed, I prefer not), with some restrictions. This 120 + is NOT a callback for the driver to start operations again, only to 121 + peek/poke at the device, extract diagnostic information, if any, and 122 + eventually do things like trigger a device local reset or some such, 123 + but not restart operations. This is sent if all drivers on a segment 124 + agree that they can try to recover and no automatic link reset was 125 + performed by the HW. If the platform can't just re-enable IOs without 126 + a slot reset or a link reset, it doesn't call this callback and goes 127 + directly to 3) or 4). All IOs should be done _synchronously_ from 128 + within this callback, errors triggered by them will be returned via 129 + the normal pci_check_whatever() api, no new error_detected() callback 130 + will be issued due to an error happening here. However, such an error 131 + might cause IOs to be re-blocked for the whole segment, and thus 132 + invalidate the recovery that other devices on the same segment might 133 + have done, forcing the whole segment into one of the next states, 134 + that is link reset or slot reset. 135 + 136 + Result codes: 137 + - PCIERR_RESULT_RECOVERED 138 + Driver returns this if it thinks the device is fully 139 + functionnal and thinks it is ready to start 140 + normal driver operations again. There is no 141 + guarantee that the driver will actually be 142 + allowed to proceed, as another driver on the 143 + same segment might have failed and thus triggered a 144 + slot reset on platforms that support it. 145 + 146 + - PCIERR_RESULT_NEED_RESET 147 + Driver returns this if it thinks the device is not 148 + recoverable in it's current state and it needs a slot 149 + reset to proceed. 150 + 151 + - PCIERR_RESULT_DISCONNECT 152 + Same as above. Total failure, no recovery even after 153 + reset driver dead. (To be defined more precisely) 154 + 155 + >>> The current ppc64 implementation does not implement this callback. 156 + 157 + 3) link_reset() 158 + 159 + This is called after the link has been reset. This is typically 160 + a PCI Express specific state at this point and is done whenever a 161 + non-fatal error has been detected that can be "solved" by resetting 162 + the link. This call informs the driver of the reset and the driver 163 + should check if the device appears to be in working condition. 164 + This function acts a bit like 2) mmio_enabled(), in that the driver 165 + is not supposed to restart normal driver I/O operations right away. 166 + Instead, it should just "probe" the device to check it's recoverability 167 + status. If all is right, then the core will call resume() once all 168 + drivers have ack'd link_reset(). 169 + 170 + Result codes: 171 + (identical to mmio_enabled) 172 + 173 + >>> The current ppc64 implementation does not implement this callback. 174 + 175 + 4) slot_reset() 176 + 177 + This is called after the slot has been soft or hard reset by the 178 + platform. A soft reset consists of asserting the adapter #RST line 179 + and then restoring the PCI BARs and PCI configuration header. If the 180 + platform supports PCI hotplug, then it might instead perform a hard 181 + reset by toggling power on the slot off/on. This call gives drivers 182 + the chance to re-initialize the hardware (re-download firmware, etc.), 183 + but drivers shouldn't restart normal I/O processing operations at 184 + this point. (See note about interrupts; interrupts aren't guaranteed 185 + to be delivered until the resume() callback has been called). If all 186 + device drivers report success on this callback, the patform will call 187 + resume() to complete the error handling and let the driver restart 188 + normal I/O processing. 189 + 190 + A driver can still return a critical failure for this function if 191 + it can't get the device operational after reset. If the platform 192 + previously tried a soft reset, it migh now try a hard reset (power 193 + cycle) and then call slot_reset() again. It the device still can't 194 + be recovered, there is nothing more that can be done; the platform 195 + will typically report a "permanent failure" in such a case. The 196 + device will be considered "dead" in this case. 197 + 198 + Result codes: 199 + - PCIERR_RESULT_DISCONNECT 200 + Same as above. 201 + 202 + >>> The current ppc64 implementation does not try a power-cycle reset 203 + >>> if the driver returned PCIERR_RESULT_DISCONNECT. However, it should. 204 + 205 + 5) resume() 206 + 207 + This is called if all drivers on the segment have returned 208 + PCIERR_RESULT_RECOVERED from one of the 3 prevous callbacks. 209 + That basically tells the driver to restart activity, tht everything 210 + is back and running. No result code is taken into account here. If 211 + a new error happens, it will restart a new error handling process. 212 + 213 + That's it. I think this covers all the possibilities. The way those 214 + callbacks are called is platform policy. A platform with no slot reset 215 + capability for example may want to just "ignore" drivers that can't 216 + recover (disconnect them) and try to let other cards on the same segment 217 + recover. Keep in mind that in most real life cases, though, there will 218 + be only one driver per segment. 219 + 220 + Now, there is a note about interrupts. If you get an interrupt and your 221 + device is dead or has been isolated, there is a problem :) 222 + 223 + After much thinking, I decided to leave that to the platform. That is, 224 + the recovery API only precies that: 225 + 226 + - There is no guarantee that interrupt delivery can proceed from any 227 + device on the segment starting from the error detection and until the 228 + restart callback is sent, at which point interrupts are expected to be 229 + fully operational. 230 + 231 + - There is no guarantee that interrupt delivery is stopped, that is, ad 232 + river that gets an interrupts after detecting an error, or that detects 233 + and error within the interrupt handler such that it prevents proper 234 + ack'ing of the interrupt (and thus removal of the source) should just 235 + return IRQ_NOTHANDLED. It's up to the platform to deal with taht 236 + condition, typically by masking the irq source during the duration of 237 + the error handling. It is expected that the platform "knows" which 238 + interrupts are routed to error-management capable slots and can deal 239 + with temporarily disabling that irq number during error processing (this 240 + isn't terribly complex). That means some IRQ latency for other devices 241 + sharing the interrupt, but there is simply no other way. High end 242 + platforms aren't supposed to share interrupts between many devices 243 + anyway :) 244 + 245 + 246 + Revised: 31 May 2005 Linas Vepstas <linas@austin.ibm.com>
+7
MAINTAINERS
··· 1987 L: linux-abi-devel@lists.sourceforge.net 1988 S: Maintained 1989 1990 PCI SOUND DRIVERS (ES1370, ES1371 and SONICVIBES) 1991 P: Thomas Sailer 1992 M: sailer@ife.ee.ethz.ch
··· 1987 L: linux-abi-devel@lists.sourceforge.net 1988 S: Maintained 1989 1990 + PCI ERROR RECOVERY 1991 + P: Linas Vepstas 1992 + M: linas@austin.ibm.com 1993 + L: linux-kernel@vger.kernel.org 1994 + L: linux-pci@atrey.karlin.mff.cuni.cz 1995 + S: Supported 1996 + 1997 PCI SOUND DRIVERS (ES1370, ES1371 and SONICVIBES) 1998 P: Thomas Sailer 1999 M: sailer@ife.ee.ethz.ch
+2 -1
arch/alpha/kernel/sys_alcor.c
··· 254 * motherboard, by looking for a 21040 TULIP in slot 6, which is 255 * built into XLT and BRET/MAVERICK, but not available on ALCOR. 256 */ 257 - dev = pci_find_device(PCI_VENDOR_ID_DEC, 258 PCI_DEVICE_ID_DEC_TULIP, 259 NULL); 260 if (dev && dev->devfn == PCI_DEVFN(6,0)) { ··· 262 printk(KERN_INFO "%s: Detected AS500 or XLT motherboard.\n", 263 __FUNCTION__); 264 } 265 } 266 267
··· 254 * motherboard, by looking for a 21040 TULIP in slot 6, which is 255 * built into XLT and BRET/MAVERICK, but not available on ALCOR. 256 */ 257 + dev = pci_get_device(PCI_VENDOR_ID_DEC, 258 PCI_DEVICE_ID_DEC_TULIP, 259 NULL); 260 if (dev && dev->devfn == PCI_DEVFN(6,0)) { ··· 262 printk(KERN_INFO "%s: Detected AS500 or XLT motherboard.\n", 263 __FUNCTION__); 264 } 265 + pci_dev_put(dev); 266 } 267 268
+3 -3
arch/alpha/kernel/sys_sio.c
··· 105 struct pci_dev *dev = NULL; 106 107 /* Iterate through the devices, collecting IRQ levels. */ 108 - while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { 109 if ((dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) && 110 (dev->class >> 8 != PCI_CLASS_BRIDGE_PCMCIA)) 111 continue; ··· 229 */ 230 231 dev = NULL; 232 - while ((dev = pci_find_device(PCI_VENDOR_ID_NCR, PCI_ANY_ID, dev))) { 233 - if (dev->device == PCI_DEVICE_ID_NCR_53C810 234 || dev->device == PCI_DEVICE_ID_NCR_53C815 235 || dev->device == PCI_DEVICE_ID_NCR_53C820 236 || dev->device == PCI_DEVICE_ID_NCR_53C825) {
··· 105 struct pci_dev *dev = NULL; 106 107 /* Iterate through the devices, collecting IRQ levels. */ 108 + for_each_pci_dev(dev) { 109 if ((dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) && 110 (dev->class >> 8 != PCI_CLASS_BRIDGE_PCMCIA)) 111 continue; ··· 229 */ 230 231 dev = NULL; 232 + while ((dev = pci_get_device(PCI_VENDOR_ID_NCR, PCI_ANY_ID, dev))) { 233 + if (dev->device == PCI_DEVICE_ID_NCR_53C810 234 || dev->device == PCI_DEVICE_ID_NCR_53C815 235 || dev->device == PCI_DEVICE_ID_NCR_53C820 236 || dev->device == PCI_DEVICE_ID_NCR_53C825) {
+2 -6
arch/frv/mb93090-mb00/pci-frv.c
··· 142 u16 command; 143 struct resource *r, *pr; 144 145 - while (dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev), 146 - dev != NULL 147 - ) { 148 pci_read_config_word(dev, PCI_COMMAND, &command); 149 for(idx = 0; idx < 6; idx++) { 150 r = &dev->resource[idx]; ··· 186 int idx; 187 struct resource *r; 188 189 - while (dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev), 190 - dev != NULL 191 - ) { 192 int class = dev->class >> 8; 193 194 /* Don't touch classless devices and host bridges */
··· 142 u16 command; 143 struct resource *r, *pr; 144 145 + for_each_pci_dev(dev) { 146 pci_read_config_word(dev, PCI_COMMAND, &command); 147 for(idx = 0; idx < 6; idx++) { 148 r = &dev->resource[idx]; ··· 188 int idx; 189 struct resource *r; 190 191 + for_each_pci_dev(dev) { 192 int class = dev->class >> 8; 193 194 /* Don't touch classless devices and host bridges */
+1 -3
arch/frv/mb93090-mb00/pci-irq.c
··· 48 struct pci_dev *dev = NULL; 49 uint8_t line, pin; 50 51 - while (dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev), 52 - dev != NULL 53 - ) { 54 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 55 if (pin) { 56 dev->irq = pci_bus0_irq_routing[PCI_SLOT(dev->devfn)][pin - 1];
··· 48 struct pci_dev *dev = NULL; 49 uint8_t line, pin; 50 51 + for_each_pci_dev(dev) { 52 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 53 if (pin) { 54 dev->irq = pci_bus0_irq_routing[PCI_SLOT(dev->devfn)][pin - 1];
+1 -1
arch/i386/kernel/scx200.c
··· 143 { 144 printk(KERN_INFO NAME ": NatSemi SCx200 Driver\n"); 145 146 - return pci_module_init(&scx200_pci_driver); 147 } 148 149 static void __exit scx200_cleanup(void)
··· 143 { 144 printk(KERN_INFO NAME ": NatSemi SCx200 Driver\n"); 145 146 + return pci_register_driver(&scx200_pci_driver); 147 } 148 149 static void __exit scx200_cleanup(void)
+1 -1
arch/i386/pci/acpi.c
··· 53 * don't use pci_enable_device(). 54 */ 55 printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n"); 56 - while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) 57 acpi_pci_irq_enable(dev); 58 } else 59 printk(KERN_INFO "PCI: If a device doesn't work, try \"pci=routeirq\". If it helps, post a report\n");
··· 53 * don't use pci_enable_device(). 54 */ 55 printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n"); 56 + for_each_pci_dev(dev) 57 acpi_pci_irq_enable(dev); 58 } else 59 printk(KERN_INFO "PCI: If a device doesn't work, try \"pci=routeirq\". If it helps, post a report\n");
+7
arch/i386/pci/fixup.c
··· 413 DMI_MATCH(DMI_PRODUCT_VERSION, "PSM4"), 414 }, 415 }, 416 { } 417 }; 418
··· 413 DMI_MATCH(DMI_PRODUCT_VERSION, "PSM4"), 414 }, 415 }, 416 + { 417 + .ident = "Toshiba A40 based laptop", 418 + .matches = { 419 + DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 420 + DMI_MATCH(DMI_PRODUCT_VERSION, "PSA40U"), 421 + }, 422 + }, 423 { } 424 }; 425
+23 -19
arch/i386/pci/irq.c
··· 78 for (i=0; i < rt->size; i++) 79 sum += addr[i]; 80 if (!sum) { 81 - DBG("PCI: Interrupt Routing Table found at 0x%p\n", rt); 82 return rt; 83 } 84 return NULL; ··· 128 #ifdef DEBUG 129 { 130 int j; 131 - DBG("%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot); 132 for(j=0; j<4; j++) 133 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap); 134 DBG("\n"); ··· 160 return; 161 162 eisa_irq_mask |= (1 << irq); 163 - printk("PCI: setting IRQ %u as level-triggered\n", irq); 164 val = inb(port); 165 if (!(val & mask)) { 166 - DBG(" -> edge"); 167 outb(val | mask, port); 168 } 169 } ··· 677 { 678 case PCI_DEVICE_ID_AL_M1533: 679 case PCI_DEVICE_ID_AL_M1563: 680 - printk("PCI: Using ALI IRQ Router\n"); 681 - r->name = "ALI"; 682 - r->get = pirq_ali_get; 683 - r->set = pirq_ali_set; 684 - return 1; 685 } 686 return 0; 687 } ··· 749 r->get = NULL; 750 r->set = NULL; 751 752 - DBG("PCI: Attempting to find IRQ router for %04x:%04x\n", 753 rt->rtr_vendor, rt->rtr_device); 754 755 pirq_router_dev = pci_find_slot(rt->rtr_bus, rt->rtr_devfn); 756 if (!pirq_router_dev) { 757 - DBG("PCI: Interrupt router not found at %02x:%02x\n", rt->rtr_bus, rt->rtr_devfn); 758 return; 759 } 760 ··· 800 /* Find IRQ pin */ 801 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 802 if (!pin) { 803 - DBG(" -> no interrupt pin\n"); 804 return 0; 805 } 806 pin = pin - 1; ··· 810 if (!pirq_table) 811 return 0; 812 813 - DBG("IRQ for %s[%c]", pci_name(dev), 'A' + pin); 814 info = pirq_get_info(dev); 815 if (!info) { 816 - DBG(" -> not found in routing table\n"); 817 return 0; 818 } 819 pirq = info->irq[pin].link; 820 mask = info->irq[pin].bitmap; 821 if (!pirq) { 822 - DBG(" -> not routed\n"); 823 return 0; 824 } 825 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs); ··· 849 newirq = dev->irq; 850 if (newirq && !((1 << newirq) & mask)) { 851 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0; 852 - else printk(KERN_WARNING "PCI: IRQ %i for device %s doesn't match PIRQ mask - try pci=usepirqmask\n", newirq, pci_name(dev)); 853 } 854 if (!newirq && assign) { 855 for (i = 0; i < 16; i++) { ··· 927 struct pci_dev *dev = NULL; 928 u8 pin; 929 930 - DBG("PCI: IRQ fixup\n"); 931 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { 932 /* 933 * If the BIOS has set an out of range IRQ number, just ignore it. 934 * Also keep track of which IRQ's are already in use. 935 */ 936 if (dev->irq >= 16) { 937 - DBG("%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq); 938 dev->irq = 0; 939 } 940 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */ ··· 1043 1044 static int __init pcibios_irq_init(void) 1045 { 1046 - DBG("PCI: IRQ init\n"); 1047 1048 if (pcibios_enable_irq || raw_pci_ops == NULL) 1049 return 0;
··· 78 for (i=0; i < rt->size; i++) 79 sum += addr[i]; 80 if (!sum) { 81 + DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n", rt); 82 return rt; 83 } 84 return NULL; ··· 128 #ifdef DEBUG 129 { 130 int j; 131 + DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot); 132 for(j=0; j<4; j++) 133 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap); 134 DBG("\n"); ··· 160 return; 161 162 eisa_irq_mask |= (1 << irq); 163 + printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq); 164 val = inb(port); 165 if (!(val & mask)) { 166 + DBG(KERN_DEBUG " -> edge"); 167 outb(val | mask, port); 168 } 169 } ··· 677 { 678 case PCI_DEVICE_ID_AL_M1533: 679 case PCI_DEVICE_ID_AL_M1563: 680 + printk(KERN_DEBUG "PCI: Using ALI IRQ Router\n"); 681 + r->name = "ALI"; 682 + r->get = pirq_ali_get; 683 + r->set = pirq_ali_set; 684 + return 1; 685 } 686 return 0; 687 } ··· 749 r->get = NULL; 750 r->set = NULL; 751 752 + DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for %04x:%04x\n", 753 rt->rtr_vendor, rt->rtr_device); 754 755 pirq_router_dev = pci_find_slot(rt->rtr_bus, rt->rtr_devfn); 756 if (!pirq_router_dev) { 757 + DBG(KERN_DEBUG "PCI: Interrupt router not found at " 758 + "%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn); 759 return; 760 } 761 ··· 799 /* Find IRQ pin */ 800 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 801 if (!pin) { 802 + DBG(KERN_DEBUG " -> no interrupt pin\n"); 803 return 0; 804 } 805 pin = pin - 1; ··· 809 if (!pirq_table) 810 return 0; 811 812 + DBG(KERN_DEBUG "IRQ for %s[%c]", pci_name(dev), 'A' + pin); 813 info = pirq_get_info(dev); 814 if (!info) { 815 + DBG(" -> not found in routing table\n" KERN_DEBUG); 816 return 0; 817 } 818 pirq = info->irq[pin].link; 819 mask = info->irq[pin].bitmap; 820 if (!pirq) { 821 + DBG(" -> not routed\n" KERN_DEBUG); 822 return 0; 823 } 824 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs); ··· 848 newirq = dev->irq; 849 if (newirq && !((1 << newirq) & mask)) { 850 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0; 851 + else printk("\n" KERN_WARNING 852 + "PCI: IRQ %i for device %s doesn't match PIRQ mask " 853 + "- try pci=usepirqmask\n" KERN_DEBUG, newirq, 854 + pci_name(dev)); 855 } 856 if (!newirq && assign) { 857 for (i = 0; i < 16; i++) { ··· 923 struct pci_dev *dev = NULL; 924 u8 pin; 925 926 + DBG(KERN_DEBUG "PCI: IRQ fixup\n"); 927 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { 928 /* 929 * If the BIOS has set an out of range IRQ number, just ignore it. 930 * Also keep track of which IRQ's are already in use. 931 */ 932 if (dev->irq >= 16) { 933 + DBG(KERN_DEBUG "%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq); 934 dev->irq = 0; 935 } 936 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */ ··· 1039 1040 static int __init pcibios_irq_init(void) 1041 { 1042 + DBG(KERN_DEBUG "PCI: IRQ init\n"); 1043 1044 if (pcibios_enable_irq || raw_pci_ops == NULL) 1045 return 0;
+1 -1
arch/mips/vr41xx/common/vrc4173.c
··· 561 { 562 int err; 563 564 - err = pci_module_init(&vrc4173_driver); 565 if (err < 0) 566 return err; 567
··· 561 { 562 int err; 563 564 + err = pci_register_driver(&vrc4173_driver); 565 if (err < 0) 566 return err; 567
+11 -10
arch/ppc/kernel/pci.c
··· 503 u16 command; 504 struct resource *r; 505 506 - while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { 507 pci_read_config_word(dev, PCI_COMMAND, &command); 508 for (idx = 0; idx < 6; idx++) { 509 r = &dev->resource[idx]; ··· 540 int idx; 541 struct resource *r; 542 543 - while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { 544 int class = dev->class >> 8; 545 546 /* Don't touch classless devices and host bridges */ ··· 867 */ 868 if (!pci_to_OF_bus_map) 869 return 0; 870 - while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { 871 - if (pci_to_OF_bus_map[dev->bus->number] != *bus) 872 - continue; 873 - if (dev->devfn != *devfn) 874 - continue; 875 - *bus = dev->bus->number; 876 - return 0; 877 - } 878 return -ENODEV; 879 } 880 EXPORT_SYMBOL(pci_device_from_OF_node);
··· 503 u16 command; 504 struct resource *r; 505 506 + for_each_pci_dev(dev) { 507 pci_read_config_word(dev, PCI_COMMAND, &command); 508 for (idx = 0; idx < 6; idx++) { 509 r = &dev->resource[idx]; ··· 540 int idx; 541 struct resource *r; 542 543 + for_each_pci_dev(dev) { 544 int class = dev->class >> 8; 545 546 /* Don't touch classless devices and host bridges */ ··· 867 */ 868 if (!pci_to_OF_bus_map) 869 return 0; 870 + 871 + for_each_pci_dev(dev) 872 + if (pci_to_OF_bus_map[dev->bus->number] == *bus && 873 + dev->devfn == *devfn) { 874 + *bus = dev->bus->number; 875 + pci_dev_put(dev); 876 + return 0; 877 + } 878 + 879 return -ENODEV; 880 } 881 EXPORT_SYMBOL(pci_device_from_OF_node);
+7 -4
arch/ppc/platforms/85xx/mpc85xx_cds_common.c
··· 351 void __init 352 mpc85xx_cds_pcibios_fixup(void) 353 { 354 - struct pci_dev *dev = NULL; 355 u_char c; 356 357 - if ((dev = pci_find_device(PCI_VENDOR_ID_VIA, 358 PCI_DEVICE_ID_VIA_82C586_1, NULL))) { 359 /* 360 * U-Boot does not set the enable bits ··· 371 */ 372 dev->irq = 14; 373 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); 374 } 375 376 /* 377 * Force legacy USB interrupt routing 378 */ 379 - if ((dev = pci_find_device(PCI_VENDOR_ID_VIA, 380 PCI_DEVICE_ID_VIA_82C586_2, NULL))) { 381 dev->irq = 10; 382 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 10); 383 } 384 385 - if ((dev = pci_find_device(PCI_VENDOR_ID_VIA, 386 PCI_DEVICE_ID_VIA_82C586_2, dev))) { 387 dev->irq = 11; 388 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11); 389 } 390 } 391 #endif /* CONFIG_PCI */
··· 351 void __init 352 mpc85xx_cds_pcibios_fixup(void) 353 { 354 + struct pci_dev *dev; 355 u_char c; 356 357 + if ((dev = pci_get_device(PCI_VENDOR_ID_VIA, 358 PCI_DEVICE_ID_VIA_82C586_1, NULL))) { 359 /* 360 * U-Boot does not set the enable bits ··· 371 */ 372 dev->irq = 14; 373 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); 374 + pci_dev_put(dev); 375 } 376 377 /* 378 * Force legacy USB interrupt routing 379 */ 380 + if ((dev = pci_get_device(PCI_VENDOR_ID_VIA, 381 PCI_DEVICE_ID_VIA_82C586_2, NULL))) { 382 dev->irq = 10; 383 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 10); 384 + pci_dev_put(dev); 385 } 386 387 + if ((dev = pci_get_device(PCI_VENDOR_ID_VIA, 388 PCI_DEVICE_ID_VIA_82C586_2, dev))) { 389 dev->irq = 11; 390 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11); 391 + pci_dev_put(dev); 392 } 393 } 394 #endif /* CONFIG_PCI */
+5 -10
arch/sparc64/kernel/ebus.c
··· 527 { 528 struct pci_dev *pdev = start; 529 530 - do { 531 - pdev = pci_find_device(PCI_VENDOR_ID_SUN, PCI_ANY_ID, pdev); 532 - if (pdev && 533 - (pdev->device == PCI_DEVICE_ID_SUN_EBUS || 534 - pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS)) 535 break; 536 - } while (pdev != NULL); 537 538 - if (pdev && (pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS)) 539 - *is_rio_p = 1; 540 - else 541 - *is_rio_p = 0; 542 543 return pdev; 544 } ··· 631 ebus->is_rio = is_rio; 632 ++num_ebus; 633 } 634 635 #ifdef CONFIG_SUN_AUXIO 636 auxio_probe();
··· 527 { 528 struct pci_dev *pdev = start; 529 530 + while ((pdev = pci_get_device(PCI_VENDOR_ID_SUN, PCI_ANY_ID, pdev))) 531 + if (pdev->device == PCI_DEVICE_ID_SUN_EBUS || 532 + pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS) 533 break; 534 535 + *is_rio_p = !!(pdev && (pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS)); 536 537 return pdev; 538 } ··· 637 ebus->is_rio = is_rio; 638 ++num_ebus; 639 } 640 + pci_dev_put(pdev); /* XXX for the case, when ebusnd is 0, is it OK? */ 641 642 #ifdef CONFIG_SUN_AUXIO 643 auxio_probe();
+3 -4
drivers/acpi/pci_irq.c
··· 361 362 if ((bridge->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS) { 363 /* PC card has the same IRQ as its cardbridge */ 364 - pci_read_config_byte(bridge, PCI_INTERRUPT_PIN, 365 - &bridge_pin); 366 if (!bridge_pin) { 367 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 368 "No interrupt pin configured for device %s\n", ··· 411 if (!dev) 412 return_VALUE(-EINVAL); 413 414 - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 415 if (!pin) { 416 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 417 "No interrupt pin configured for device %s\n", ··· 502 if (!dev || !dev->bus) 503 return_VOID; 504 505 - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 506 if (!pin) 507 return_VOID; 508 pin--;
··· 361 362 if ((bridge->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS) { 363 /* PC card has the same IRQ as its cardbridge */ 364 + bridge_pin = bridge->pin; 365 if (!bridge_pin) { 366 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 367 "No interrupt pin configured for device %s\n", ··· 412 if (!dev) 413 return_VALUE(-EINVAL); 414 415 + pin = dev->pin; 416 if (!pin) { 417 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 418 "No interrupt pin configured for device %s\n", ··· 503 if (!dev || !dev->bus) 504 return_VOID; 505 506 + pin = dev->pin; 507 if (!pin) 508 return_VOID; 509 pin--;
+1 -1
drivers/block/DAC960.c
··· 7179 { 7180 int ret; 7181 7182 - ret = pci_module_init(&DAC960_pci_driver); 7183 #ifdef DAC960_GAM_MINOR 7184 if (!ret) 7185 DAC960_gam_init();
··· 7179 { 7180 int ret; 7181 7182 + ret = pci_register_driver(&DAC960_pci_driver); 7183 #ifdef DAC960_GAM_MINOR 7184 if (!ret) 7185 DAC960_gam_init();
+1 -1
drivers/block/cciss.c
··· 3360 printk(KERN_INFO DRIVER_NAME "\n"); 3361 3362 /* Register for our PCI devices */ 3363 - return pci_module_init(&cciss_pci_driver); 3364 } 3365 3366 static void __exit cciss_cleanup(void)
··· 3360 printk(KERN_INFO DRIVER_NAME "\n"); 3361 3362 /* Register for our PCI devices */ 3363 + return pci_register_driver(&cciss_pci_driver); 3364 } 3365 3366 static void __exit cciss_cleanup(void)
+1 -1
drivers/block/sx8.c
··· 1755 1756 static int __init carm_init(void) 1757 { 1758 - return pci_module_init(&carm_driver); 1759 } 1760 1761 static void __exit carm_exit(void)
··· 1755 1756 static int __init carm_init(void) 1757 { 1758 + return pci_register_driver(&carm_driver); 1759 } 1760 1761 static void __exit carm_exit(void)
+1 -1
drivers/block/umem.c
··· 1174 1175 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n"); 1176 1177 - retval = pci_module_init(&mm_pci_driver); 1178 if (retval) 1179 return -ENOMEM; 1180
··· 1174 1175 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n"); 1176 1177 + retval = pci_register_driver(&mm_pci_driver); 1178 if (retval) 1179 return -ENOMEM; 1180
+1 -1
drivers/hwmon/vt8231.c
··· 841 842 static int __init sm_vt8231_init(void) 843 { 844 - return pci_module_init(&vt8231_pci_driver); 845 } 846 847 static void __exit sm_vt8231_exit(void)
··· 841 842 static int __init sm_vt8231_init(void) 843 { 844 + return pci_register_driver(&vt8231_pci_driver); 845 } 846 847 static void __exit sm_vt8231_exit(void)
+1 -1
drivers/media/radio/radio-gemtek-pci.c
··· 395 396 static int __init gemtek_pci_init_module( void ) 397 { 398 - return pci_module_init( &gemtek_pci_driver ); 399 } 400 401 static void __exit gemtek_pci_cleanup_module( void )
··· 395 396 static int __init gemtek_pci_init_module( void ) 397 { 398 + return pci_register_driver( &gemtek_pci_driver ); 399 } 400 401 static void __exit gemtek_pci_cleanup_module( void )
+1 -1
drivers/media/radio/radio-maxiradio.c
··· 338 339 static int __init maxiradio_radio_init(void) 340 { 341 - return pci_module_init(&maxiradio_driver); 342 } 343 344 static void __exit maxiradio_radio_exit(void)
··· 338 339 static int __init maxiradio_radio_init(void) 340 { 341 + return pci_register_driver(&maxiradio_driver); 342 } 343 344 static void __exit maxiradio_radio_exit(void)
+1 -1
drivers/parport/parport_serial.c
··· 464 465 static int __init parport_serial_init (void) 466 { 467 - return pci_module_init (&parport_serial_pci_driver); 468 } 469 470 static void __exit parport_serial_exit (void)
··· 464 465 static int __init parport_serial_init (void) 466 { 467 + return pci_register_driver (&parport_serial_pci_driver); 468 } 469 470 static void __exit parport_serial_exit (void)
+4 -2
drivers/pci/hotplug/acpiphp_glue.c
··· 794 if (PCI_SLOT(dev->devfn) != slot->device) 795 continue; 796 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || 797 - dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) 798 max = pci_scan_bridge(bus, dev, max, pass); 799 } 800 } 801 802 - pci_bus_size_bridges(bus); 803 pci_bus_assign_resources(bus); 804 acpiphp_sanitize_bus(bus); 805 pci_enable_bridges(bus);
··· 794 if (PCI_SLOT(dev->devfn) != slot->device) 795 continue; 796 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE || 797 + dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { 798 max = pci_scan_bridge(bus, dev, max, pass); 799 + if (pass && dev->subordinate) 800 + pci_bus_size_bridges(dev->subordinate); 801 + } 802 } 803 } 804 805 pci_bus_assign_resources(bus); 806 acpiphp_sanitize_bus(bus); 807 pci_enable_bridges(bus);
+6 -2
drivers/pci/hotplug/cpqphp.h
··· 317 u16 vendor_id; 318 struct work_struct int_task_event; 319 wait_queue_head_t queue; /* sleep & wake process */ 320 }; 321 322 struct irq_mapping { ··· 400 #define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n" 401 402 403 - /* sysfs functions for the hotplug controller info */ 404 - extern void cpqhp_create_ctrl_files (struct controller *ctrl); 405 406 /* controller functions */ 407 extern void cpqhp_pushbutton_thread (unsigned long event_pointer);
··· 317 u16 vendor_id; 318 struct work_struct int_task_event; 319 wait_queue_head_t queue; /* sleep & wake process */ 320 + struct dentry *dentry; /* debugfs dentry */ 321 }; 322 323 struct irq_mapping { ··· 399 #define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n" 400 401 402 + /* debugfs functions for the hotplug controller info */ 403 + extern void cpqhp_initialize_debugfs (void); 404 + extern void cpqhp_shutdown_debugfs (void); 405 + extern void cpqhp_create_debugfs_files (struct controller *ctrl); 406 + extern void cpqhp_remove_debugfs_files (struct controller *ctrl); 407 408 /* controller functions */ 409 extern void cpqhp_pushbutton_thread (unsigned long event_pointer);
+72 -55
drivers/pci/hotplug/cpqphp_core.c
··· 327 void __iomem *smbios_start, 328 void __iomem *smbios_table) 329 { 330 - struct slot *new_slot; 331 u8 number_of_slots; 332 u8 slot_device; 333 u8 slot_number; ··· 347 slot_number = ctrl->first_slot; 348 349 while (number_of_slots) { 350 - new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL); 351 - if (!new_slot) 352 goto error; 353 354 - memset(new_slot, 0, sizeof(struct slot)); 355 - new_slot->hotplug_slot = kmalloc(sizeof(*(new_slot->hotplug_slot)), 356 GFP_KERNEL); 357 - if (!new_slot->hotplug_slot) 358 goto error_slot; 359 - memset(new_slot->hotplug_slot, 0, sizeof(struct hotplug_slot)); 360 361 - new_slot->hotplug_slot->info = 362 - kmalloc(sizeof(*(new_slot->hotplug_slot->info)), 363 GFP_KERNEL); 364 - if (!new_slot->hotplug_slot->info) 365 goto error_hpslot; 366 - memset(new_slot->hotplug_slot->info, 0, 367 sizeof(struct hotplug_slot_info)); 368 - new_slot->hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL); 369 - if (!new_slot->hotplug_slot->name) 370 goto error_info; 371 372 - new_slot->ctrl = ctrl; 373 - new_slot->bus = ctrl->bus; 374 - new_slot->device = slot_device; 375 - new_slot->number = slot_number; 376 - dbg("slot->number = %d\n",new_slot->number); 377 378 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9, 379 slot_entry); 380 381 - while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != new_slot->number)) { 382 slot_entry = get_SMBIOS_entry(smbios_start, 383 smbios_table, 9, slot_entry); 384 } 385 386 - new_slot->p_sm_slot = slot_entry; 387 388 - init_timer(&new_slot->task_event); 389 - new_slot->task_event.expires = jiffies + 5 * HZ; 390 - new_slot->task_event.function = cpqhp_pushbutton_thread; 391 392 //FIXME: these capabilities aren't used but if they are 393 // they need to be correctly implemented 394 - new_slot->capabilities |= PCISLOT_REPLACE_SUPPORTED; 395 - new_slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED; 396 397 - if (is_slot64bit(new_slot)) 398 - new_slot->capabilities |= PCISLOT_64_BIT_SUPPORTED; 399 - if (is_slot66mhz(new_slot)) 400 - new_slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED; 401 if (ctrl->speed == PCI_SPEED_66MHz) 402 - new_slot->capabilities |= PCISLOT_66_MHZ_OPERATION; 403 404 - ctrl_slot = slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4); 405 406 // Check presence 407 - new_slot->capabilities |= ((((~tempdword) >> 23) | ((~tempdword) >> 15)) >> ctrl_slot) & 0x02; 408 // Check the switch state 409 - new_slot->capabilities |= ((~tempdword & 0xFF) >> ctrl_slot) & 0x01; 410 // Check the slot enable 411 - new_slot->capabilities |= ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04; 412 413 /* register this slot with the hotplug pci core */ 414 - new_slot->hotplug_slot->release = &release_slot; 415 - new_slot->hotplug_slot->private = new_slot; 416 - make_slot_name(new_slot->hotplug_slot->name, SLOT_NAME_SIZE, new_slot); 417 - new_slot->hotplug_slot->ops = &cpqphp_hotplug_slot_ops; 418 419 - new_slot->hotplug_slot->info->power_status = get_slot_enabled(ctrl, new_slot); 420 - new_slot->hotplug_slot->info->attention_status = cpq_get_attention_status(ctrl, new_slot); 421 - new_slot->hotplug_slot->info->latch_status = cpq_get_latch_status(ctrl, new_slot); 422 - new_slot->hotplug_slot->info->adapter_status = get_presence_status(ctrl, new_slot); 423 424 - dbg ("registering bus %d, dev %d, number %d, " 425 "ctrl->slot_device_offset %d, slot %d\n", 426 - new_slot->bus, new_slot->device, 427 - new_slot->number, ctrl->slot_device_offset, 428 slot_number); 429 - result = pci_hp_register (new_slot->hotplug_slot); 430 if (result) { 431 - err ("pci_hp_register failed with error %d\n", result); 432 goto error_name; 433 } 434 435 - new_slot->next = ctrl->slot; 436 - ctrl->slot = new_slot; 437 438 number_of_slots--; 439 slot_device++; ··· 453 } 454 455 return 0; 456 - 457 error_name: 458 - kfree(new_slot->hotplug_slot->name); 459 error_info: 460 - kfree(new_slot->hotplug_slot->info); 461 error_hpslot: 462 - kfree(new_slot->hotplug_slot); 463 error_slot: 464 - kfree(new_slot); 465 error: 466 return result; 467 } ··· 478 pci_hp_deregister (old_slot->hotplug_slot); 479 old_slot = next_slot; 480 } 481 482 //Free IRQ associated with hot plug device 483 free_irq(ctrl->interrupt, ctrl); ··· 1277 // Done with exclusive hardware access 1278 up(&ctrl->crit_sect); 1279 1280 - cpqhp_create_ctrl_files(ctrl); 1281 1282 return 0; 1283 ··· 1517 cpqhp_debug = debug; 1518 1519 info (DRIVER_DESC " version: " DRIVER_VERSION "\n"); 1520 result = pci_register_driver(&cpqhpc_driver); 1521 dbg("pci_register_driver = %d\n", result); 1522 return result; ··· 1531 1532 dbg("pci_unregister_driver\n"); 1533 pci_unregister_driver(&cpqhpc_driver); 1534 } 1535 1536
··· 327 void __iomem *smbios_start, 328 void __iomem *smbios_table) 329 { 330 + struct slot *slot; 331 + struct hotplug_slot *hotplug_slot; 332 + struct hotplug_slot_info *hotplug_slot_info; 333 u8 number_of_slots; 334 u8 slot_device; 335 u8 slot_number; ··· 345 slot_number = ctrl->first_slot; 346 347 while (number_of_slots) { 348 + slot = kmalloc(sizeof(*slot), GFP_KERNEL); 349 + if (!slot) 350 goto error; 351 352 + memset(slot, 0, sizeof(struct slot)); 353 + slot->hotplug_slot = kmalloc(sizeof(*(slot->hotplug_slot)), 354 GFP_KERNEL); 355 + if (!slot->hotplug_slot) 356 goto error_slot; 357 + hotplug_slot = slot->hotplug_slot; 358 + memset(hotplug_slot, 0, sizeof(struct hotplug_slot)); 359 360 + hotplug_slot->info = 361 + kmalloc(sizeof(*(hotplug_slot->info)), 362 GFP_KERNEL); 363 + if (!hotplug_slot->info) 364 goto error_hpslot; 365 + hotplug_slot_info = hotplug_slot->info; 366 + memset(hotplug_slot_info, 0, 367 sizeof(struct hotplug_slot_info)); 368 + hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL); 369 + 370 + if (!hotplug_slot->name) 371 goto error_info; 372 373 + slot->ctrl = ctrl; 374 + slot->bus = ctrl->bus; 375 + slot->device = slot_device; 376 + slot->number = slot_number; 377 + dbg("slot->number = %d\n", slot->number); 378 379 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9, 380 slot_entry); 381 382 + while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != 383 + slot->number)) { 384 slot_entry = get_SMBIOS_entry(smbios_start, 385 smbios_table, 9, slot_entry); 386 } 387 388 + slot->p_sm_slot = slot_entry; 389 390 + init_timer(&slot->task_event); 391 + slot->task_event.expires = jiffies + 5 * HZ; 392 + slot->task_event.function = cpqhp_pushbutton_thread; 393 394 //FIXME: these capabilities aren't used but if they are 395 // they need to be correctly implemented 396 + slot->capabilities |= PCISLOT_REPLACE_SUPPORTED; 397 + slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED; 398 399 + if (is_slot64bit(slot)) 400 + slot->capabilities |= PCISLOT_64_BIT_SUPPORTED; 401 + if (is_slot66mhz(slot)) 402 + slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED; 403 if (ctrl->speed == PCI_SPEED_66MHz) 404 + slot->capabilities |= PCISLOT_66_MHZ_OPERATION; 405 406 + ctrl_slot = 407 + slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4); 408 409 // Check presence 410 + slot->capabilities |= 411 + ((((~tempdword) >> 23) | 412 + ((~tempdword) >> 15)) >> ctrl_slot) & 0x02; 413 // Check the switch state 414 + slot->capabilities |= 415 + ((~tempdword & 0xFF) >> ctrl_slot) & 0x01; 416 // Check the slot enable 417 + slot->capabilities |= 418 + ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04; 419 420 /* register this slot with the hotplug pci core */ 421 + hotplug_slot->release = &release_slot; 422 + hotplug_slot->private = slot; 423 + make_slot_name(hotplug_slot->name, SLOT_NAME_SIZE, slot); 424 + hotplug_slot->ops = &cpqphp_hotplug_slot_ops; 425 426 + hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot); 427 + hotplug_slot_info->attention_status = 428 + cpq_get_attention_status(ctrl, slot); 429 + hotplug_slot_info->latch_status = 430 + cpq_get_latch_status(ctrl, slot); 431 + hotplug_slot_info->adapter_status = 432 + get_presence_status(ctrl, slot); 433 434 + dbg("registering bus %d, dev %d, number %d, " 435 "ctrl->slot_device_offset %d, slot %d\n", 436 + slot->bus, slot->device, 437 + slot->number, ctrl->slot_device_offset, 438 slot_number); 439 + result = pci_hp_register(hotplug_slot); 440 if (result) { 441 + err("pci_hp_register failed with error %d\n", result); 442 goto error_name; 443 } 444 445 + slot->next = ctrl->slot; 446 + ctrl->slot = slot; 447 448 number_of_slots--; 449 slot_device++; ··· 439 } 440 441 return 0; 442 error_name: 443 + kfree(hotplug_slot->name); 444 error_info: 445 + kfree(hotplug_slot_info); 446 error_hpslot: 447 + kfree(hotplug_slot); 448 error_slot: 449 + kfree(slot); 450 error: 451 return result; 452 } ··· 465 pci_hp_deregister (old_slot->hotplug_slot); 466 old_slot = next_slot; 467 } 468 + 469 + cpqhp_remove_debugfs_files(ctrl); 470 471 //Free IRQ associated with hot plug device 472 free_irq(ctrl->interrupt, ctrl); ··· 1262 // Done with exclusive hardware access 1263 up(&ctrl->crit_sect); 1264 1265 + cpqhp_create_debugfs_files(ctrl); 1266 1267 return 0; 1268 ··· 1502 cpqhp_debug = debug; 1503 1504 info (DRIVER_DESC " version: " DRIVER_VERSION "\n"); 1505 + cpqhp_initialize_debugfs(); 1506 result = pci_register_driver(&cpqhpc_driver); 1507 dbg("pci_register_driver = %d\n", result); 1508 return result; ··· 1515 1516 dbg("pci_unregister_driver\n"); 1517 pci_unregister_driver(&cpqhpc_driver); 1518 + cpqhp_shutdown_debugfs(); 1519 } 1520 1521
+7 -21
drivers/pci/hotplug/cpqphp_ctrl.c
··· 2630 hold_mem_node = NULL; 2631 } 2632 2633 - /* If we have prefetchable memory resources copy them and 2634 - * fill in the bridge's memory range registers. Otherwise, 2635 - * fill in the range registers with values that disable them. */ 2636 - if (p_mem_node) { 2637 - memcpy(hold_p_mem_node, p_mem_node, sizeof(struct pci_resource)); 2638 - p_mem_node->next = NULL; 2639 2640 - /* set Pre Mem base and Limit registers */ 2641 - temp_word = p_mem_node->base >> 16; 2642 - rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word); 2643 2644 - temp_word = (p_mem_node->base + p_mem_node->length - 1) >> 16; 2645 - rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word); 2646 - } else { 2647 - temp_word = 0xFFFF; 2648 - rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word); 2649 - 2650 - temp_word = 0x0000; 2651 - rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word); 2652 - 2653 - kfree(hold_p_mem_node); 2654 - hold_p_mem_node = NULL; 2655 - } 2656 2657 /* Adjust this to compensate for extra adjustment in first loop */ 2658 irqs.barber_pole--;
··· 2630 hold_mem_node = NULL; 2631 } 2632 2633 + memcpy(hold_p_mem_node, p_mem_node, sizeof(struct pci_resource)); 2634 + p_mem_node->next = NULL; 2635 2636 + /* set Pre Mem base and Limit registers */ 2637 + temp_word = p_mem_node->base >> 16; 2638 + rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word); 2639 2640 + temp_word = (p_mem_node->base + p_mem_node->length - 1) >> 16; 2641 + rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word); 2642 2643 /* Adjust this to compensate for extra adjustment in first loop */ 2644 irqs.barber_pole--;
+116 -22
drivers/pci/hotplug/cpqphp_sysfs.c
··· 33 #include <linux/proc_fs.h> 34 #include <linux/workqueue.h> 35 #include <linux/pci.h> 36 #include "cpqphp.h" 37 38 - 39 - /* A few routines that create sysfs entries for the hot plug controller */ 40 - 41 - static ssize_t show_ctrl (struct device *dev, struct device_attribute *attr, char *buf) 42 { 43 - struct pci_dev *pci_dev; 44 - struct controller *ctrl; 45 - char * out = buf; 46 int index; 47 struct pci_resource *res; 48 - 49 - pci_dev = container_of (dev, struct pci_dev, dev); 50 - ctrl = pci_get_drvdata(pci_dev); 51 52 out += sprintf(buf, "Free resources: memory\n"); 53 index = 11; ··· 73 74 return out - buf; 75 } 76 - static DEVICE_ATTR (ctrl, S_IRUGO, show_ctrl, NULL); 77 78 - static ssize_t show_dev (struct device *dev, struct device_attribute *attr, char *buf) 79 { 80 - struct pci_dev *pci_dev; 81 - struct controller *ctrl; 82 char * out = buf; 83 int index; 84 struct pci_resource *res; 85 struct pci_func *new_slot; 86 struct slot *slot; 87 88 - pci_dev = container_of (dev, struct pci_dev, dev); 89 - ctrl = pci_get_drvdata(pci_dev); 90 - 91 - slot=ctrl->slot; 92 93 while (slot) { 94 new_slot = cpqhp_slot_find(slot->bus, slot->device, 0); ··· 121 122 return out - buf; 123 } 124 - static DEVICE_ATTR (dev, S_IRUGO, show_dev, NULL); 125 126 - void cpqhp_create_ctrl_files (struct controller *ctrl) 127 { 128 - device_create_file (&ctrl->pci_dev->dev, &dev_attr_ctrl); 129 - device_create_file (&ctrl->pci_dev->dev, &dev_attr_dev); 130 }
··· 33 #include <linux/proc_fs.h> 34 #include <linux/workqueue.h> 35 #include <linux/pci.h> 36 + #include <linux/debugfs.h> 37 #include "cpqphp.h" 38 39 + static int show_ctrl (struct controller *ctrl, char *buf) 40 { 41 + char *out = buf; 42 int index; 43 struct pci_resource *res; 44 45 out += sprintf(buf, "Free resources: memory\n"); 46 index = 11; ··· 80 81 return out - buf; 82 } 83 84 + static int show_dev (struct controller *ctrl, char *buf) 85 { 86 char * out = buf; 87 int index; 88 struct pci_resource *res; 89 struct pci_func *new_slot; 90 struct slot *slot; 91 92 + slot = ctrl->slot; 93 94 while (slot) { 95 new_slot = cpqhp_slot_find(slot->bus, slot->device, 0); ··· 134 135 return out - buf; 136 } 137 138 + static int spew_debug_info(struct controller *ctrl, char *data, int size) 139 { 140 + int used; 141 + 142 + used = size - show_ctrl(ctrl, data); 143 + used = (size - used) - show_dev(ctrl, &data[used]); 144 + return used; 145 } 146 + 147 + struct ctrl_dbg { 148 + int size; 149 + char *data; 150 + struct controller *ctrl; 151 + }; 152 + 153 + #define MAX_OUTPUT (4*PAGE_SIZE) 154 + 155 + static int open(struct inode *inode, struct file *file) 156 + { 157 + struct controller *ctrl = inode->u.generic_ip; 158 + struct ctrl_dbg *dbg; 159 + int retval = -ENOMEM; 160 + 161 + lock_kernel(); 162 + dbg = kmalloc(sizeof(*dbg), GFP_KERNEL); 163 + if (!dbg) 164 + goto exit; 165 + dbg->data = kmalloc(MAX_OUTPUT, GFP_KERNEL); 166 + if (!dbg->data) { 167 + kfree(dbg); 168 + goto exit; 169 + } 170 + dbg->size = spew_debug_info(ctrl, dbg->data, MAX_OUTPUT); 171 + file->private_data = dbg; 172 + retval = 0; 173 + exit: 174 + unlock_kernel(); 175 + return retval; 176 + } 177 + 178 + static loff_t lseek(struct file *file, loff_t off, int whence) 179 + { 180 + struct ctrl_dbg *dbg; 181 + loff_t new = -1; 182 + 183 + lock_kernel(); 184 + dbg = file->private_data; 185 + 186 + switch (whence) { 187 + case 0: 188 + new = off; 189 + break; 190 + case 1: 191 + new = file->f_pos + off; 192 + break; 193 + } 194 + if (new < 0 || new > dbg->size) { 195 + unlock_kernel(); 196 + return -EINVAL; 197 + } 198 + unlock_kernel(); 199 + return (file->f_pos = new); 200 + } 201 + 202 + static ssize_t read(struct file *file, char __user *buf, 203 + size_t nbytes, loff_t *ppos) 204 + { 205 + struct ctrl_dbg *dbg = file->private_data; 206 + return simple_read_from_buffer(buf, nbytes, ppos, dbg->data, dbg->size); 207 + } 208 + 209 + static int release(struct inode *inode, struct file *file) 210 + { 211 + struct ctrl_dbg *dbg = file->private_data; 212 + 213 + kfree(dbg->data); 214 + kfree(dbg); 215 + return 0; 216 + } 217 + 218 + static struct file_operations debug_ops = { 219 + .owner = THIS_MODULE, 220 + .open = open, 221 + .llseek = lseek, 222 + .read = read, 223 + .release = release, 224 + }; 225 + 226 + static struct dentry *root; 227 + 228 + void cpqhp_initialize_debugfs(void) 229 + { 230 + if (!root) 231 + root = debugfs_create_dir("cpqhp", NULL); 232 + } 233 + 234 + void cpqhp_shutdown_debugfs(void) 235 + { 236 + debugfs_remove(root); 237 + } 238 + 239 + void cpqhp_create_debugfs_files(struct controller *ctrl) 240 + { 241 + ctrl->dentry = debugfs_create_file(ctrl->pci_dev->dev.bus_id, S_IRUGO, root, ctrl, &debug_ops); 242 + } 243 + 244 + void cpqhp_remove_debugfs_files(struct controller *ctrl) 245 + { 246 + if (ctrl->dentry) 247 + debugfs_remove(ctrl->dentry); 248 + ctrl->dentry = NULL; 249 + } 250 +
+1 -1
drivers/pci/hotplug/ibmphp_pci.c
··· 969 debug ("io 32\n"); 970 need_io_upper = TRUE; 971 } 972 - if ((io_base & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) { 973 debug ("pfmem 64\n"); 974 need_pfmem_upper = TRUE; 975 }
··· 969 debug ("io 32\n"); 970 need_io_upper = TRUE; 971 } 972 + if ((pfmem_base & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) { 973 debug ("pfmem 64\n"); 974 need_pfmem_upper = TRUE; 975 }
+49 -39
drivers/pci/hotplug/pciehp_core.c
··· 103 104 static int init_slots(struct controller *ctrl) 105 { 106 - struct slot *new_slot; 107 u8 number_of_slots; 108 u8 slot_device; 109 u32 slot_number; ··· 117 slot_number = ctrl->first_slot; 118 119 while (number_of_slots) { 120 - new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL); 121 - if (!new_slot) 122 goto error; 123 124 - memset(new_slot, 0, sizeof(struct slot)); 125 - new_slot->hotplug_slot = 126 - kmalloc(sizeof(*(new_slot->hotplug_slot)), 127 GFP_KERNEL); 128 - if (!new_slot->hotplug_slot) 129 goto error_slot; 130 - memset(new_slot->hotplug_slot, 0, sizeof(struct hotplug_slot)); 131 132 - new_slot->hotplug_slot->info = 133 - kmalloc(sizeof(*(new_slot->hotplug_slot->info)), 134 GFP_KERNEL); 135 - if (!new_slot->hotplug_slot->info) 136 goto error_hpslot; 137 - memset(new_slot->hotplug_slot->info, 0, 138 sizeof(struct hotplug_slot_info)); 139 - new_slot->hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, 140 - GFP_KERNEL); 141 - if (!new_slot->hotplug_slot->name) 142 goto error_info; 143 144 - new_slot->ctrl = ctrl; 145 - new_slot->bus = ctrl->slot_bus; 146 - new_slot->device = slot_device; 147 - new_slot->hpc_ops = ctrl->hpc_ops; 148 149 - new_slot->number = ctrl->first_slot; 150 - new_slot->hp_slot = slot_device - ctrl->slot_device_offset; 151 152 /* register this slot with the hotplug pci core */ 153 - new_slot->hotplug_slot->private = new_slot; 154 - new_slot->hotplug_slot->release = &release_slot; 155 - make_slot_name(new_slot->hotplug_slot->name, SLOT_NAME_SIZE, new_slot); 156 - new_slot->hotplug_slot->ops = &pciehp_hotplug_slot_ops; 157 158 - new_slot->hpc_ops->get_power_status(new_slot, &(new_slot->hotplug_slot->info->power_status)); 159 - new_slot->hpc_ops->get_attention_status(new_slot, &(new_slot->hotplug_slot->info->attention_status)); 160 - new_slot->hpc_ops->get_latch_status(new_slot, &(new_slot->hotplug_slot->info->latch_status)); 161 - new_slot->hpc_ops->get_adapter_status(new_slot, &(new_slot->hotplug_slot->info->adapter_status)); 162 163 - dbg("Registering bus=%x dev=%x hp_slot=%x sun=%x slot_device_offset=%x\n", 164 - new_slot->bus, new_slot->device, new_slot->hp_slot, new_slot->number, ctrl->slot_device_offset); 165 - result = pci_hp_register (new_slot->hotplug_slot); 166 if (result) { 167 err ("pci_hp_register failed with error %d\n", result); 168 goto error_name; 169 } 170 171 - new_slot->next = ctrl->slot; 172 - ctrl->slot = new_slot; 173 174 number_of_slots--; 175 slot_device++; ··· 186 return 0; 187 188 error_name: 189 - kfree(new_slot->hotplug_slot->name); 190 error_info: 191 - kfree(new_slot->hotplug_slot->info); 192 error_hpslot: 193 - kfree(new_slot->hotplug_slot); 194 error_slot: 195 - kfree(new_slot); 196 error: 197 return result; 198 } ··· 512 513 } 514 515 - int hpdriver_context = 0; 516 517 static void pciehp_remove (struct pcie_device *device) 518 {
··· 103 104 static int init_slots(struct controller *ctrl) 105 { 106 + struct slot *slot; 107 + struct hpc_ops *hpc_ops; 108 + struct hotplug_slot *hotplug_slot; 109 + struct hotplug_slot_info *hotplug_slot_info; 110 u8 number_of_slots; 111 u8 slot_device; 112 u32 slot_number; ··· 114 slot_number = ctrl->first_slot; 115 116 while (number_of_slots) { 117 + slot = kmalloc(sizeof(*slot), GFP_KERNEL); 118 + if (!slot) 119 goto error; 120 121 + memset(slot, 0, sizeof(struct slot)); 122 + slot->hotplug_slot = 123 + kmalloc(sizeof(*(slot->hotplug_slot)), 124 GFP_KERNEL); 125 + if (!slot->hotplug_slot) 126 goto error_slot; 127 + hotplug_slot = slot->hotplug_slot; 128 + memset(hotplug_slot, 0, sizeof(struct hotplug_slot)); 129 130 + hotplug_slot->info = 131 + kmalloc(sizeof(*(hotplug_slot->info)), 132 GFP_KERNEL); 133 + if (!hotplug_slot->info) 134 goto error_hpslot; 135 + hotplug_slot_info = hotplug_slot->info; 136 + memset(hotplug_slot_info, 0, 137 sizeof(struct hotplug_slot_info)); 138 + hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL); 139 + if (!hotplug_slot->name) 140 goto error_info; 141 142 + slot->ctrl = ctrl; 143 + slot->bus = ctrl->slot_bus; 144 + slot->device = slot_device; 145 + slot->hpc_ops = hpc_ops = ctrl->hpc_ops; 146 147 + slot->number = ctrl->first_slot; 148 + slot->hp_slot = slot_device - ctrl->slot_device_offset; 149 150 /* register this slot with the hotplug pci core */ 151 + hotplug_slot->private = slot; 152 + hotplug_slot->release = &release_slot; 153 + make_slot_name(hotplug_slot->name, SLOT_NAME_SIZE, slot); 154 + hotplug_slot->ops = &pciehp_hotplug_slot_ops; 155 156 + hpc_ops->get_power_status(slot, 157 + &(hotplug_slot_info->power_status)); 158 + hpc_ops->get_attention_status(slot, 159 + &(hotplug_slot_info->attention_status)); 160 + hpc_ops->get_latch_status(slot, 161 + &(hotplug_slot_info->latch_status)); 162 + hpc_ops->get_adapter_status(slot, 163 + &(hotplug_slot_info->adapter_status)); 164 165 + dbg("Registering bus=%x dev=%x hp_slot=%x sun=%x " 166 + "slot_device_offset=%x\n", 167 + slot->bus, slot->device, slot->hp_slot, slot->number, 168 + ctrl->slot_device_offset); 169 + result = pci_hp_register(hotplug_slot); 170 if (result) { 171 err ("pci_hp_register failed with error %d\n", result); 172 goto error_name; 173 } 174 175 + slot->next = ctrl->slot; 176 + ctrl->slot = slot; 177 178 number_of_slots--; 179 slot_device++; ··· 176 return 0; 177 178 error_name: 179 + kfree(hotplug_slot->name); 180 error_info: 181 + kfree(hotplug_slot_info); 182 error_hpslot: 183 + kfree(hotplug_slot); 184 error_slot: 185 + kfree(slot); 186 error: 187 return result; 188 } ··· 502 503 } 504 505 + static int hpdriver_context = 0; 506 507 static void pciehp_remove (struct pcie_device *device) 508 {
+17 -2
drivers/pci/hotplug/pciehp_hpc.c
··· 787 788 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON; 789 790 if (!pciehp_poll_mode) 791 - slot_cmd = slot_cmd | HP_INTR_ENABLE; 792 793 retval = pcie_write_cmd(slot, slot_cmd); 794 ··· 838 839 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF; 840 841 if (!pciehp_poll_mode) 842 - slot_cmd = slot_cmd | HP_INTR_ENABLE; 843 844 retval = pcie_write_cmd(slot, slot_cmd); 845
··· 787 788 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON; 789 790 + /* Enable detection that we turned off at slot power-off time */ 791 if (!pciehp_poll_mode) 792 + slot_cmd = slot_cmd | 793 + PWR_FAULT_DETECT_ENABLE | 794 + MRL_DETECT_ENABLE | 795 + PRSN_DETECT_ENABLE | 796 + HP_INTR_ENABLE; 797 798 retval = pcie_write_cmd(slot, slot_cmd); 799 ··· 833 834 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF; 835 836 + /* 837 + * If we get MRL or presence detect interrupts now, the isr 838 + * will notice the sticky power-fault bit too and issue power 839 + * indicator change commands. This will lead to an endless loop 840 + * of command completions, since the power-fault bit remains on 841 + * till the slot is powered on again. 842 + */ 843 if (!pciehp_poll_mode) 844 + slot_cmd = (slot_cmd & 845 + ~PWR_FAULT_DETECT_ENABLE & 846 + ~MRL_DETECT_ENABLE & 847 + ~PRSN_DETECT_ENABLE) | HP_INTR_ENABLE; 848 849 retval = pcie_write_cmd(slot, slot_cmd); 850
+28 -24
drivers/pci/hotplug/pciehp_pci.c
··· 34 #include "../pci.h" 35 #include "pciehp.h" 36 37 38 int pciehp_configure_device(struct slot *p_slot) 39 { ··· 80 } 81 82 for (fn = 0; fn < 8; fn++) { 83 - if (!(dev = pci_find_slot(p_slot->bus, 84 - PCI_DEVFN(p_slot->device, fn)))) 85 continue; 86 if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) { 87 err("Cannot hot-add display device %s\n", ··· 90 } 91 if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) || 92 (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) { 93 - /* Find an unused bus number for the new bridge */ 94 - struct pci_bus *child; 95 - unsigned char busnr, start = parent->secondary; 96 - unsigned char end = parent->subordinate; 97 - for (busnr = start; busnr <= end; busnr++) { 98 - if (!pci_find_bus(pci_domain_nr(parent), 99 - busnr)) 100 - break; 101 - } 102 - if (busnr >= end) { 103 - err("No free bus for hot-added bridge\n"); 104 - continue; 105 - } 106 - child = pci_add_new_bus(parent, dev, busnr); 107 - if (!child) { 108 - err("Cannot add new bus for %s\n", 109 - pci_name(dev)); 110 - continue; 111 - } 112 - child->subordinate = pci_do_scan_bus(child); 113 - pci_bus_size_bridges(child); 114 } 115 /* TBD: program firmware provided _HPP values */ 116 /* program_fw_provided_values(dev); */ ··· 98 99 pci_bus_assign_resources(parent); 100 pci_bus_add_devices(parent); 101 - pci_enable_bridges(parent); 102 return 0; 103 } 104
··· 34 #include "../pci.h" 35 #include "pciehp.h" 36 37 + static int pciehp_add_bridge(struct pci_dev *dev) 38 + { 39 + struct pci_bus *parent = dev->bus; 40 + int pass, busnr, start = parent->secondary; 41 + int end = parent->subordinate; 42 + 43 + for (busnr = start; busnr <= end; busnr++) { 44 + if (!pci_find_bus(pci_domain_nr(parent), busnr)) 45 + break; 46 + } 47 + if (busnr-- > end) { 48 + err("No bus number available for hot-added bridge %s\n", 49 + pci_name(dev)); 50 + return -1; 51 + } 52 + for (pass = 0; pass < 2; pass++) 53 + busnr = pci_scan_bridge(parent, dev, busnr, pass); 54 + if (!dev->subordinate) 55 + return -1; 56 + pci_bus_size_bridges(dev->subordinate); 57 + pci_bus_assign_resources(parent); 58 + pci_enable_bridges(parent); 59 + pci_bus_add_devices(parent); 60 + return 0; 61 + } 62 63 int pciehp_configure_device(struct slot *p_slot) 64 { ··· 55 } 56 57 for (fn = 0; fn < 8; fn++) { 58 + dev = pci_get_slot(parent, PCI_DEVFN(p_slot->device, fn)); 59 + if (!dev) 60 continue; 61 if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) { 62 err("Cannot hot-add display device %s\n", ··· 65 } 66 if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) || 67 (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) { 68 + pciehp_add_bridge(dev); 69 } 70 /* TBD: program firmware provided _HPP values */ 71 /* program_fw_provided_values(dev); */ ··· 93 94 pci_bus_assign_resources(parent); 95 pci_bus_add_devices(parent); 96 return 0; 97 } 98
+8 -5
drivers/pci/hotplug/pciehprm_acpi.c
··· 174 acpi_status status; 175 acpi_handle chandle, handle = DEVICE_ACPI_HANDLE(&(dev->dev)); 176 struct pci_dev *pdev = dev; 177 u8 *path_name; 178 /* 179 * Per PCI firmware specification, we should run the ACPI _OSC 180 * method to get control of hotplug hardware before using it. ··· 192 */ 193 if (!pdev || !pdev->bus->parent) 194 break; 195 dbg("Could not find %s in acpi namespace, trying parent\n", 196 pci_name(pdev)); 197 - if (!pdev->bus->parent->self) 198 /* Parent must be a host bridge */ 199 handle = acpi_get_pci_rootbridge_handle( 200 - pci_domain_nr(pdev->bus->parent), 201 - pdev->bus->parent->number); 202 else 203 handle = DEVICE_ACPI_HANDLE( 204 - &(pdev->bus->parent->self->dev)); 205 - pdev = pdev->bus->parent->self; 206 } 207 208 while (handle) {
··· 174 acpi_status status; 175 acpi_handle chandle, handle = DEVICE_ACPI_HANDLE(&(dev->dev)); 176 struct pci_dev *pdev = dev; 177 + struct pci_bus *parent; 178 u8 *path_name; 179 + 180 /* 181 * Per PCI firmware specification, we should run the ACPI _OSC 182 * method to get control of hotplug hardware before using it. ··· 190 */ 191 if (!pdev || !pdev->bus->parent) 192 break; 193 + parent = pdev->bus->parent; 194 dbg("Could not find %s in acpi namespace, trying parent\n", 195 pci_name(pdev)); 196 + if (!parent->self) 197 /* Parent must be a host bridge */ 198 handle = acpi_get_pci_rootbridge_handle( 199 + pci_domain_nr(parent), 200 + parent->number); 201 else 202 handle = DEVICE_ACPI_HANDLE( 203 + &(parent->self->dev)); 204 + pdev = parent->self; 205 } 206 207 while (handle) {
+3 -24
drivers/pci/hotplug/rpadlpar_core.c
··· 112 return NULL; 113 } 114 115 - static void rpadlpar_claim_one_bus(struct pci_bus *b) 116 - { 117 - struct list_head *ld; 118 - struct pci_bus *child_bus; 119 - 120 - for (ld = b->devices.next; ld != &b->devices; ld = ld->next) { 121 - struct pci_dev *dev = pci_dev_b(ld); 122 - int i; 123 - 124 - for (i = 0; i < PCI_NUM_RESOURCES; i++) { 125 - struct resource *r = &dev->resource[i]; 126 - 127 - if (r->parent || !r->start || !r->flags) 128 - continue; 129 - rpaphp_claim_resource(dev, i); 130 - } 131 - } 132 - 133 - list_for_each_entry(child_bus, &b->children, node) 134 - rpadlpar_claim_one_bus(child_bus); 135 - } 136 - 137 static struct pci_dev *dlpar_find_new_dev(struct pci_bus *parent, 138 struct device_node *dev_dn) 139 { ··· 132 struct pci_controller *phb = pdn->phb; 133 struct pci_dev *dev = NULL; 134 135 - rpaphp_eeh_init_nodes(dn); 136 /* Add EADS device to PHB bus, adding new entry to bus->devices */ 137 dev = of_create_pci_dev(dn, phb->bus, pdn->devfn); 138 if (!dev) { ··· 149 rpaphp_init_new_devs(dev->subordinate); 150 151 /* Claim new bus resources */ 152 - rpadlpar_claim_one_bus(dev->bus); 153 154 /* ioremap() for child bus, which may or may not succeed */ 155 (void) remap_bus_range(dev->bus);
··· 112 return NULL; 113 } 114 115 static struct pci_dev *dlpar_find_new_dev(struct pci_bus *parent, 116 struct device_node *dev_dn) 117 { ··· 154 struct pci_controller *phb = pdn->phb; 155 struct pci_dev *dev = NULL; 156 157 + eeh_add_device_tree_early(dn); 158 + 159 /* Add EADS device to PHB bus, adding new entry to bus->devices */ 160 dev = of_create_pci_dev(dn, phb->bus, pdn->devfn); 161 if (!dev) { ··· 170 rpaphp_init_new_devs(dev->subordinate); 171 172 /* Claim new bus resources */ 173 + pcibios_claim_one_bus(dev->bus); 174 175 /* ioremap() for child bus, which may or may not succeed */ 176 (void) remap_bus_range(dev->bus);
+7 -40
drivers/pci/hotplug/rpaphp_pci.c
··· 62 } 63 EXPORT_SYMBOL_GPL(rpaphp_find_pci_bus); 64 65 - int rpaphp_claim_resource(struct pci_dev *dev, int resource) 66 - { 67 - struct resource *res = &dev->resource[resource]; 68 - struct resource *root = pci_find_parent_resource(dev, res); 69 - char *dtype = resource < PCI_BRIDGE_RESOURCES ? "device" : "bridge"; 70 - int err = -EINVAL; 71 - 72 - if (root != NULL) { 73 - err = request_resource(root, res); 74 - } 75 - 76 - if (err) { 77 - err("PCI: %s region %d of %s %s [%lx:%lx]\n", 78 - root ? "Address space collision on" : 79 - "No parent found for", 80 - resource, dtype, pci_name(dev), res->start, res->end); 81 - } 82 - return err; 83 - } 84 - 85 - EXPORT_SYMBOL_GPL(rpaphp_claim_resource); 86 - 87 static int rpaphp_get_sensor_state(struct slot *slot, int *state) 88 { 89 int rc; ··· 155 156 if (r->parent || !r->start || !r->flags) 157 continue; 158 - rpaphp_claim_resource(dev, i); 159 } 160 } 161 } ··· 265 return dev; 266 } 267 268 - void rpaphp_eeh_init_nodes(struct device_node *dn) 269 - { 270 - struct device_node *sib; 271 - 272 - for (sib = dn->child; sib; sib = sib->sibling) 273 - rpaphp_eeh_init_nodes(sib); 274 - eeh_add_device_early(dn); 275 - return; 276 - 277 - } 278 - EXPORT_SYMBOL_GPL(rpaphp_eeh_init_nodes); 279 - 280 static void print_slot_pci_funcs(struct pci_bus *bus) 281 { 282 struct device_node *dn; ··· 290 if (!dn) 291 goto exit; 292 293 - rpaphp_eeh_init_nodes(dn); 294 dev = rpaphp_pci_config_slot(bus); 295 if (!dev) { 296 err("%s: can't find any devices.\n", __FUNCTION__); ··· 336 337 static int setup_pci_hotplug_slot_info(struct slot *slot) 338 { 339 dbg("%s Initilize the PCI slot's hotplug->info structure ...\n", 340 __FUNCTION__); 341 - rpaphp_get_power_status(slot, &slot->hotplug_slot->info->power_status); 342 rpaphp_get_pci_adapter_status(slot, 1, 343 - &slot->hotplug_slot->info-> 344 - adapter_status); 345 - if (slot->hotplug_slot->info->adapter_status == NOT_VALID) { 346 err("%s: NOT_VALID: skip dn->full_name=%s\n", 347 __FUNCTION__, slot->dn->full_name); 348 return -EINVAL;
··· 62 } 63 EXPORT_SYMBOL_GPL(rpaphp_find_pci_bus); 64 65 static int rpaphp_get_sensor_state(struct slot *slot, int *state) 66 { 67 int rc; ··· 177 178 if (r->parent || !r->start || !r->flags) 179 continue; 180 + pci_claim_resource(dev, i); 181 } 182 } 183 } ··· 287 return dev; 288 } 289 290 static void print_slot_pci_funcs(struct pci_bus *bus) 291 { 292 struct device_node *dn; ··· 324 if (!dn) 325 goto exit; 326 327 + eeh_add_device_tree_early(dn); 328 dev = rpaphp_pci_config_slot(bus); 329 if (!dev) { 330 err("%s: can't find any devices.\n", __FUNCTION__); ··· 370 371 static int setup_pci_hotplug_slot_info(struct slot *slot) 372 { 373 + struct hotplug_slot_info *hotplug_slot_info = slot->hotplug_slot->info; 374 + 375 dbg("%s Initilize the PCI slot's hotplug->info structure ...\n", 376 __FUNCTION__); 377 + rpaphp_get_power_status(slot, &hotplug_slot_info->power_status); 378 rpaphp_get_pci_adapter_status(slot, 1, 379 + &hotplug_slot_info->adapter_status); 380 + if (hotplug_slot_info->adapter_status == NOT_VALID) { 381 err("%s: NOT_VALID: skip dn->full_name=%s\n", 382 __FUNCTION__, slot->dn->full_name); 383 return -EINVAL;
+4
drivers/pci/hotplug/shpchp.h
··· 98 enum pci_bus_speed speed; 99 u32 first_slot; /* First physical slot number */ 100 u8 slot_bus; /* Bus where the slots handled by this controller sit */ 101 }; 102 103 struct hotplug_params {
··· 98 enum pci_bus_speed speed; 99 u32 first_slot; /* First physical slot number */ 100 u8 slot_bus; /* Bus where the slots handled by this controller sit */ 101 + u32 cap_offset; 102 + unsigned long mmio_base; 103 + unsigned long mmio_size; 104 + volatile int cmd_busy; 105 }; 106 107 struct hotplug_params {
+14 -2
drivers/pci/hotplug/shpchp_core.c
··· 65 static int get_attention_status (struct hotplug_slot *slot, u8 *value); 66 static int get_latch_status (struct hotplug_slot *slot, u8 *value); 67 static int get_adapter_status (struct hotplug_slot *slot, u8 *value); 68 static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value); 69 static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value); 70 ··· 78 .get_attention_status = get_attention_status, 79 .get_latch_status = get_latch_status, 80 .get_adapter_status = get_adapter_status, 81 .get_max_bus_speed = get_max_bus_speed, 82 .get_cur_bus_speed = get_cur_bus_speed, 83 }; ··· 316 return 0; 317 } 318 319 static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value) 320 { 321 struct slot *slot = get_slot (hotplug_slot, __FUNCTION__); ··· 390 dbg("%s: controller initialization failed\n", SHPC_MODULE_NAME); 391 goto err_out_free_ctrl; 392 } 393 - 394 - ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */ 395 396 pci_set_drvdata(pdev, ctrl); 397
··· 65 static int get_attention_status (struct hotplug_slot *slot, u8 *value); 66 static int get_latch_status (struct hotplug_slot *slot, u8 *value); 67 static int get_adapter_status (struct hotplug_slot *slot, u8 *value); 68 + static int get_address (struct hotplug_slot *slot, u32 *value); 69 static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value); 70 static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value); 71 ··· 77 .get_attention_status = get_attention_status, 78 .get_latch_status = get_latch_status, 79 .get_adapter_status = get_adapter_status, 80 + .get_address = get_address, 81 .get_max_bus_speed = get_max_bus_speed, 82 .get_cur_bus_speed = get_cur_bus_speed, 83 }; ··· 314 return 0; 315 } 316 317 + static int get_address (struct hotplug_slot *hotplug_slot, u32 *value) 318 + { 319 + struct slot *slot = get_slot (hotplug_slot, __FUNCTION__); 320 + struct pci_bus *bus = slot->ctrl->pci_dev->subordinate; 321 + 322 + dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 323 + 324 + *value = (pci_domain_nr(bus) << 16) | (slot->bus << 8) | slot->device; 325 + 326 + return 0; 327 + } 328 + 329 static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value) 330 { 331 struct slot *slot = get_slot (hotplug_slot, __FUNCTION__); ··· 376 dbg("%s: controller initialization failed\n", SHPC_MODULE_NAME); 377 goto err_out_free_ctrl; 378 } 379 380 pci_set_drvdata(pdev, ctrl); 381
-37
drivers/pci/hotplug/shpchp_ctrl.c
··· 248 up(&ctrl->crit_sect); 249 return WRONG_BUS_FREQUENCY; 250 } 251 - wait_for_ctrl_irq (ctrl); 252 253 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) { 254 err("%s: Can't set bus speed/mode in the case of adapter & bus mismatch\n", ··· 329 up(&ctrl->crit_sect); 330 return -1; 331 } 332 - 333 - /* Wait for the command to complete */ 334 - wait_for_ctrl_irq (ctrl); 335 336 rc = p_slot->hpc_ops->check_cmd_status(ctrl); 337 if (rc) { ··· 348 up(&ctrl->crit_sect); 349 return WRONG_BUS_FREQUENCY; 350 } 351 - wait_for_ctrl_irq (ctrl); 352 353 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) { 354 err("%s: Can't set bus speed/mode in the case of adapter & bus mismatch\n", ··· 362 up(&ctrl->crit_sect); 363 return rc; 364 } 365 - wait_for_ctrl_irq (ctrl); 366 367 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) { 368 err("%s: Failed to enable slot, error code(%d)\n", __FUNCTION__, rc); ··· 488 up(&ctrl->crit_sect); 489 return rc; 490 } 491 - wait_for_ctrl_irq (ctrl); 492 493 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) { 494 err("%s: Failed to enable slot, error code(%d)\n", __FUNCTION__, rc); ··· 525 526 p_slot->hpc_ops->green_led_on(p_slot); 527 528 - /* Wait for the command to complete */ 529 - wait_for_ctrl_irq (ctrl); 530 - 531 /* Done with exclusive hardware access */ 532 up(&ctrl->crit_sect); 533 ··· 542 up(&ctrl->crit_sect); 543 return rc; 544 } 545 - /* Wait for the command to complete */ 546 - wait_for_ctrl_irq (ctrl); 547 548 rc = p_slot->hpc_ops->check_cmd_status(ctrl); 549 if (rc) { ··· 591 up(&ctrl->crit_sect); 592 return rc; 593 } 594 - /* Wait for the command to complete */ 595 - wait_for_ctrl_irq (ctrl); 596 597 rc = p_slot->hpc_ops->check_cmd_status(ctrl); 598 if (rc) { ··· 607 up(&ctrl->crit_sect); 608 return rc; 609 } 610 - /* Wait for the command to complete */ 611 - wait_for_ctrl_irq (ctrl); 612 613 /* Done with exclusive hardware access */ 614 up(&ctrl->crit_sect); ··· 659 down(&p_slot->ctrl->crit_sect); 660 661 p_slot->hpc_ops->green_led_off(p_slot); 662 - 663 - /* Wait for the command to complete */ 664 - wait_for_ctrl_irq (p_slot->ctrl); 665 666 /* Done with exclusive hardware access */ 667 up(&p_slot->ctrl->crit_sect); ··· 771 down(&ctrl->crit_sect); 772 773 p_slot->hpc_ops->green_led_on(p_slot); 774 - /* Wait for the command to complete */ 775 - wait_for_ctrl_irq (ctrl); 776 777 p_slot->hpc_ops->set_attention_status(p_slot, 0); 778 - 779 - /* Wait for the command to complete */ 780 - wait_for_ctrl_irq (ctrl); 781 782 /* Done with exclusive hardware access */ 783 up(&ctrl->crit_sect); ··· 782 down(&ctrl->crit_sect); 783 784 p_slot->hpc_ops->green_led_off(p_slot); 785 - /* Wait for the command to complete */ 786 - wait_for_ctrl_irq (ctrl); 787 788 p_slot->hpc_ops->set_attention_status(p_slot, 0); 789 - /* Wait for the command to complete */ 790 - wait_for_ctrl_irq (ctrl); 791 792 /* Done with exclusive hardware access */ 793 up(&ctrl->crit_sect); ··· 817 818 /* blink green LED and turn off amber */ 819 p_slot->hpc_ops->green_led_blink(p_slot); 820 - /* Wait for the command to complete */ 821 - wait_for_ctrl_irq (ctrl); 822 823 p_slot->hpc_ops->set_attention_status(p_slot, 0); 824 - 825 - /* Wait for the command to complete */ 826 - wait_for_ctrl_irq (ctrl); 827 828 /* Done with exclusive hardware access */ 829 up(&ctrl->crit_sect); ··· 837 down(&ctrl->crit_sect); 838 839 p_slot->hpc_ops->set_attention_status(p_slot, 1); 840 - /* Wait for the command to complete */ 841 - wait_for_ctrl_irq (ctrl); 842 843 p_slot->hpc_ops->green_led_off(p_slot); 844 - /* Wait for the command to complete */ 845 - wait_for_ctrl_irq (ctrl); 846 847 /* Done with exclusive hardware access */ 848 up(&ctrl->crit_sect);
··· 248 up(&ctrl->crit_sect); 249 return WRONG_BUS_FREQUENCY; 250 } 251 252 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) { 253 err("%s: Can't set bus speed/mode in the case of adapter & bus mismatch\n", ··· 330 up(&ctrl->crit_sect); 331 return -1; 332 } 333 334 rc = p_slot->hpc_ops->check_cmd_status(ctrl); 335 if (rc) { ··· 352 up(&ctrl->crit_sect); 353 return WRONG_BUS_FREQUENCY; 354 } 355 356 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) { 357 err("%s: Can't set bus speed/mode in the case of adapter & bus mismatch\n", ··· 367 up(&ctrl->crit_sect); 368 return rc; 369 } 370 371 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) { 372 err("%s: Failed to enable slot, error code(%d)\n", __FUNCTION__, rc); ··· 494 up(&ctrl->crit_sect); 495 return rc; 496 } 497 498 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) { 499 err("%s: Failed to enable slot, error code(%d)\n", __FUNCTION__, rc); ··· 532 533 p_slot->hpc_ops->green_led_on(p_slot); 534 535 /* Done with exclusive hardware access */ 536 up(&ctrl->crit_sect); 537 ··· 552 up(&ctrl->crit_sect); 553 return rc; 554 } 555 556 rc = p_slot->hpc_ops->check_cmd_status(ctrl); 557 if (rc) { ··· 603 up(&ctrl->crit_sect); 604 return rc; 605 } 606 607 rc = p_slot->hpc_ops->check_cmd_status(ctrl); 608 if (rc) { ··· 621 up(&ctrl->crit_sect); 622 return rc; 623 } 624 625 /* Done with exclusive hardware access */ 626 up(&ctrl->crit_sect); ··· 675 down(&p_slot->ctrl->crit_sect); 676 677 p_slot->hpc_ops->green_led_off(p_slot); 678 679 /* Done with exclusive hardware access */ 680 up(&p_slot->ctrl->crit_sect); ··· 790 down(&ctrl->crit_sect); 791 792 p_slot->hpc_ops->green_led_on(p_slot); 793 794 p_slot->hpc_ops->set_attention_status(p_slot, 0); 795 796 /* Done with exclusive hardware access */ 797 up(&ctrl->crit_sect); ··· 806 down(&ctrl->crit_sect); 807 808 p_slot->hpc_ops->green_led_off(p_slot); 809 810 p_slot->hpc_ops->set_attention_status(p_slot, 0); 811 812 /* Done with exclusive hardware access */ 813 up(&ctrl->crit_sect); ··· 845 846 /* blink green LED and turn off amber */ 847 p_slot->hpc_ops->green_led_blink(p_slot); 848 849 p_slot->hpc_ops->set_attention_status(p_slot, 0); 850 851 /* Done with exclusive hardware access */ 852 up(&ctrl->crit_sect); ··· 870 down(&ctrl->crit_sect); 871 872 p_slot->hpc_ops->set_attention_status(p_slot, 1); 873 874 p_slot->hpc_ops->green_led_off(p_slot); 875 876 /* Done with exclusive hardware access */ 877 up(&ctrl->crit_sect);
+94 -50
drivers/pci/hotplug/shpchp_hpc.c
··· 275 return; 276 } 277 278 static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) 279 { 280 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; ··· 333 /* To make sure the Controller Busy bit is 0 before we send out the 334 * command. 335 */ 336 writew(temp_word, php_ctlr->creg + CMD); 337 338 DBG_LEAVE_ROUTINE 339 return retval; ··· 629 sec_bus_status = readw(php_ctlr->creg + SEC_BUS_CONFIG); 630 631 if (pi == 2) { 632 - *mode = (sec_bus_status & 0x0100) >> 7; 633 } else { 634 retval = -1; 635 } ··· 816 } 817 if (php_ctlr->pci_dev) { 818 iounmap(php_ctlr->creg); 819 - release_mem_region(pci_resource_start(php_ctlr->pci_dev, 0), pci_resource_len(php_ctlr->pci_dev, 0)); 820 php_ctlr->pci_dev = NULL; 821 } 822 ··· 1083 if (intr_loc & 0x0001) { 1084 /* 1085 * Command Complete Interrupt Pending 1086 - * RO only - clear by writing 0 to the Command Completion 1087 * Detect bit in Controller SERR-INT register 1088 */ 1089 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE); 1090 - temp_dword &= 0xfffeffff; 1091 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE); 1092 wake_up_interruptible(&ctrl->queue); 1093 } 1094 ··· 1147 int retval = 0; 1148 u8 pi; 1149 u32 slot_avail1, slot_avail2; 1150 - int slot_num; 1151 1152 DBG_ENTER_ROUTINE 1153 ··· 1165 slot_avail2 = readl(php_ctlr->creg + SLOT_AVAIL2); 1166 1167 if (pi == 2) { 1168 - if ((slot_num = ((slot_avail2 & SLOT_133MHZ_PCIX_533) >> 27) ) != 0 ) 1169 bus_speed = PCIX_133MHZ_533; 1170 - else if ((slot_num = ((slot_avail2 & SLOT_100MHZ_PCIX_533) >> 23) ) != 0 ) 1171 bus_speed = PCIX_100MHZ_533; 1172 - else if ((slot_num = ((slot_avail2 & SLOT_66MHZ_PCIX_533) >> 19) ) != 0 ) 1173 bus_speed = PCIX_66MHZ_533; 1174 - else if ((slot_num = ((slot_avail2 & SLOT_133MHZ_PCIX_266) >> 15) ) != 0 ) 1175 bus_speed = PCIX_133MHZ_266; 1176 - else if ((slot_num = ((slot_avail2 & SLOT_100MHZ_PCIX_266) >> 11) ) != 0 ) 1177 bus_speed = PCIX_100MHZ_266; 1178 - else if ((slot_num = ((slot_avail2 & SLOT_66MHZ_PCIX_266) >> 7) ) != 0 ) 1179 bus_speed = PCIX_66MHZ_266; 1180 - else if ((slot_num = ((slot_avail1 & SLOT_133MHZ_PCIX) >> 23) ) != 0 ) 1181 bus_speed = PCIX_133MHZ; 1182 - else if ((slot_num = ((slot_avail1 & SLOT_100MHZ_PCIX) >> 15) ) != 0 ) 1183 bus_speed = PCIX_100MHZ; 1184 - else if ((slot_num = ((slot_avail1 & SLOT_66MHZ_PCIX) >> 7) ) != 0 ) 1185 bus_speed = PCIX_66MHZ; 1186 - else if ((slot_num = (slot_avail2 & SLOT_66MHZ)) != 0 ) 1187 bus_speed = PCI_66MHZ; 1188 - else if ((slot_num = (slot_avail1 & SLOT_33MHZ)) != 0 ) 1189 bus_speed = PCI_33MHZ; 1190 else bus_speed = PCI_SPEED_UNKNOWN; 1191 } else { 1192 - if ((slot_num = ((slot_avail1 & SLOT_133MHZ_PCIX) >> 23) ) != 0 ) 1193 bus_speed = PCIX_133MHZ; 1194 - else if ((slot_num = ((slot_avail1 & SLOT_100MHZ_PCIX) >> 15) ) != 0 ) 1195 bus_speed = PCIX_100MHZ; 1196 - else if ((slot_num = ((slot_avail1 & SLOT_66MHZ_PCIX) >> 7) ) != 0 ) 1197 bus_speed = PCIX_66MHZ; 1198 - else if ((slot_num = (slot_avail2 & SLOT_66MHZ)) != 0 ) 1199 bus_speed = PCI_66MHZ; 1200 - else if ((slot_num = (slot_avail1 & SLOT_33MHZ)) != 0 ) 1201 bus_speed = PCI_33MHZ; 1202 else bus_speed = PCI_SPEED_UNKNOWN; 1203 } ··· 1346 .check_cmd_status = hpc_check_cmd_status, 1347 }; 1348 1349 int shpc_init(struct controller * ctrl, struct pci_dev * pdev) 1350 { 1351 struct php_ctlr_state_s *php_ctlr, *p; 1352 void *instance_id = ctrl; 1353 - int rc; 1354 u8 hp_slot; 1355 static int first = 1; 1356 - u32 shpc_cap_offset, shpc_base_offset; 1357 u32 tempdword, slot_reg; 1358 u8 i; 1359 1360 DBG_ENTER_ROUTINE 1361 1362 spin_lock_init(&list_lock); 1363 php_ctlr = (struct php_ctlr_state_s *) kmalloc(sizeof(struct php_ctlr_state_s), GFP_KERNEL); ··· 1388 1389 if ((pdev->vendor == PCI_VENDOR_ID_AMD) || (pdev->device == 1390 PCI_DEVICE_ID_AMD_GOLAM_7450)) { 1391 - shpc_base_offset = 0; /* amd shpc driver doesn't use this; assume 0 */ 1392 } else { 1393 - if ((shpc_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC)) == 0) { 1394 - err("%s : shpc_cap_offset == 0\n", __FUNCTION__); 1395 goto abort_free_ctlr; 1396 } 1397 - dbg("%s: shpc_cap_offset = %x\n", __FUNCTION__, shpc_cap_offset); 1398 - 1399 - rc = pci_write_config_byte(pdev, (u8)shpc_cap_offset + DWORD_SELECT , BASE_OFFSET); 1400 if (rc) { 1401 - err("%s : pci_word_config_byte failed\n", __FUNCTION__); 1402 - goto abort_free_ctlr; 1403 - } 1404 - 1405 - rc = pci_read_config_dword(pdev, (u8)shpc_cap_offset + DWORD_DATA, &shpc_base_offset); 1406 - if (rc) { 1407 - err("%s : pci_read_config_dword failed\n", __FUNCTION__); 1408 goto abort_free_ctlr; 1409 } 1410 1411 - for (i = 0; i <= 14; i++) { 1412 - rc = pci_write_config_byte(pdev, (u8)shpc_cap_offset + DWORD_SELECT , i); 1413 if (rc) { 1414 - err("%s : pci_word_config_byte failed\n", __FUNCTION__); 1415 - goto abort_free_ctlr; 1416 - } 1417 - 1418 - rc = pci_read_config_dword(pdev, (u8)shpc_cap_offset + DWORD_DATA, &tempdword); 1419 - if (rc) { 1420 - err("%s : pci_read_config_dword failed\n", __FUNCTION__); 1421 goto abort_free_ctlr; 1422 } 1423 dbg("%s: offset %d: value %x\n", __FUNCTION__,i, 1424 tempdword); 1425 } 1426 } 1427 1428 if (first) { ··· 1440 if (pci_enable_device(pdev)) 1441 goto abort_free_ctlr; 1442 1443 - if (!request_mem_region(pci_resource_start(pdev, 0) + shpc_base_offset, pci_resource_len(pdev, 0), MY_NAME)) { 1444 err("%s: cannot reserve MMIO region\n", __FUNCTION__); 1445 goto abort_free_ctlr; 1446 } 1447 1448 - php_ctlr->creg = ioremap(pci_resource_start(pdev, 0) + shpc_base_offset, pci_resource_len(pdev, 0)); 1449 if (!php_ctlr->creg) { 1450 - err("%s: cannot remap MMIO region %lx @ %lx\n", __FUNCTION__, pci_resource_len(pdev, 0), 1451 - pci_resource_start(pdev, 0) + shpc_base_offset); 1452 - release_mem_region(pci_resource_start(pdev, 0) + shpc_base_offset, pci_resource_len(pdev, 0)); 1453 goto abort_free_ctlr; 1454 } 1455 dbg("%s: php_ctlr->creg %p\n", __FUNCTION__, php_ctlr->creg);
··· 275 return; 276 } 277 278 + static inline int shpc_wait_cmd(struct controller *ctrl) 279 + { 280 + int retval = 0; 281 + unsigned int timeout_msec = shpchp_poll_mode ? 2000 : 1000; 282 + unsigned long timeout = msecs_to_jiffies(timeout_msec); 283 + int rc = wait_event_interruptible_timeout(ctrl->queue, 284 + !ctrl->cmd_busy, timeout); 285 + if (!rc) { 286 + retval = -EIO; 287 + err("Command not completed in %d msec\n", timeout_msec); 288 + } else if (rc < 0) { 289 + retval = -EINTR; 290 + info("Command was interrupted by a signal\n"); 291 + } 292 + ctrl->cmd_busy = 0; 293 + 294 + return retval; 295 + } 296 + 297 static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) 298 { 299 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; ··· 314 /* To make sure the Controller Busy bit is 0 before we send out the 315 * command. 316 */ 317 + slot->ctrl->cmd_busy = 1; 318 writew(temp_word, php_ctlr->creg + CMD); 319 + 320 + /* 321 + * Wait for command completion. 322 + */ 323 + retval = shpc_wait_cmd(slot->ctrl); 324 325 DBG_LEAVE_ROUTINE 326 return retval; ··· 604 sec_bus_status = readw(php_ctlr->creg + SEC_BUS_CONFIG); 605 606 if (pi == 2) { 607 + *mode = (sec_bus_status & 0x0100) >> 8; 608 } else { 609 retval = -1; 610 } ··· 791 } 792 if (php_ctlr->pci_dev) { 793 iounmap(php_ctlr->creg); 794 + release_mem_region(ctrl->mmio_base, ctrl->mmio_size); 795 php_ctlr->pci_dev = NULL; 796 } 797 ··· 1058 if (intr_loc & 0x0001) { 1059 /* 1060 * Command Complete Interrupt Pending 1061 + * RO only - clear by writing 1 to the Command Completion 1062 * Detect bit in Controller SERR-INT register 1063 */ 1064 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE); 1065 + temp_dword &= 0xfffdffff; 1066 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE); 1067 + ctrl->cmd_busy = 0; 1068 wake_up_interruptible(&ctrl->queue); 1069 } 1070 ··· 1121 int retval = 0; 1122 u8 pi; 1123 u32 slot_avail1, slot_avail2; 1124 1125 DBG_ENTER_ROUTINE 1126 ··· 1140 slot_avail2 = readl(php_ctlr->creg + SLOT_AVAIL2); 1141 1142 if (pi == 2) { 1143 + if (slot_avail2 & SLOT_133MHZ_PCIX_533) 1144 bus_speed = PCIX_133MHZ_533; 1145 + else if (slot_avail2 & SLOT_100MHZ_PCIX_533) 1146 bus_speed = PCIX_100MHZ_533; 1147 + else if (slot_avail2 & SLOT_66MHZ_PCIX_533) 1148 bus_speed = PCIX_66MHZ_533; 1149 + else if (slot_avail2 & SLOT_133MHZ_PCIX_266) 1150 bus_speed = PCIX_133MHZ_266; 1151 + else if (slot_avail2 & SLOT_100MHZ_PCIX_266) 1152 bus_speed = PCIX_100MHZ_266; 1153 + else if (slot_avail2 & SLOT_66MHZ_PCIX_266) 1154 bus_speed = PCIX_66MHZ_266; 1155 + else if (slot_avail1 & SLOT_133MHZ_PCIX) 1156 bus_speed = PCIX_133MHZ; 1157 + else if (slot_avail1 & SLOT_100MHZ_PCIX) 1158 bus_speed = PCIX_100MHZ; 1159 + else if (slot_avail1 & SLOT_66MHZ_PCIX) 1160 bus_speed = PCIX_66MHZ; 1161 + else if (slot_avail2 & SLOT_66MHZ) 1162 bus_speed = PCI_66MHZ; 1163 + else if (slot_avail1 & SLOT_33MHZ) 1164 bus_speed = PCI_33MHZ; 1165 else bus_speed = PCI_SPEED_UNKNOWN; 1166 } else { 1167 + if (slot_avail1 & SLOT_133MHZ_PCIX) 1168 bus_speed = PCIX_133MHZ; 1169 + else if (slot_avail1 & SLOT_100MHZ_PCIX) 1170 bus_speed = PCIX_100MHZ; 1171 + else if (slot_avail1 & SLOT_66MHZ_PCIX) 1172 bus_speed = PCIX_66MHZ; 1173 + else if (slot_avail2 & SLOT_66MHZ) 1174 bus_speed = PCI_66MHZ; 1175 + else if (slot_avail1 & SLOT_33MHZ) 1176 bus_speed = PCI_33MHZ; 1177 else bus_speed = PCI_SPEED_UNKNOWN; 1178 } ··· 1321 .check_cmd_status = hpc_check_cmd_status, 1322 }; 1323 1324 + inline static int shpc_indirect_creg_read(struct controller *ctrl, int index, 1325 + u32 *value) 1326 + { 1327 + int rc; 1328 + u32 cap_offset = ctrl->cap_offset; 1329 + struct pci_dev *pdev = ctrl->pci_dev; 1330 + 1331 + rc = pci_write_config_byte(pdev, cap_offset + DWORD_SELECT, index); 1332 + if (rc) 1333 + return rc; 1334 + return pci_read_config_dword(pdev, cap_offset + DWORD_DATA, value); 1335 + } 1336 + 1337 int shpc_init(struct controller * ctrl, struct pci_dev * pdev) 1338 { 1339 struct php_ctlr_state_s *php_ctlr, *p; 1340 void *instance_id = ctrl; 1341 + int rc, num_slots = 0; 1342 u8 hp_slot; 1343 static int first = 1; 1344 + u32 shpc_base_offset; 1345 u32 tempdword, slot_reg; 1346 u8 i; 1347 1348 DBG_ENTER_ROUTINE 1349 + 1350 + ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */ 1351 1352 spin_lock_init(&list_lock); 1353 php_ctlr = (struct php_ctlr_state_s *) kmalloc(sizeof(struct php_ctlr_state_s), GFP_KERNEL); ··· 1348 1349 if ((pdev->vendor == PCI_VENDOR_ID_AMD) || (pdev->device == 1350 PCI_DEVICE_ID_AMD_GOLAM_7450)) { 1351 + /* amd shpc driver doesn't use Base Offset; assume 0 */ 1352 + ctrl->mmio_base = pci_resource_start(pdev, 0); 1353 + ctrl->mmio_size = pci_resource_len(pdev, 0); 1354 } else { 1355 + ctrl->cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC); 1356 + if (!ctrl->cap_offset) { 1357 + err("%s : cap_offset == 0\n", __FUNCTION__); 1358 goto abort_free_ctlr; 1359 } 1360 + dbg("%s: cap_offset = %x\n", __FUNCTION__, ctrl->cap_offset); 1361 + 1362 + rc = shpc_indirect_creg_read(ctrl, 0, &shpc_base_offset); 1363 if (rc) { 1364 + err("%s: cannot read base_offset\n", __FUNCTION__); 1365 goto abort_free_ctlr; 1366 } 1367 1368 + rc = shpc_indirect_creg_read(ctrl, 3, &tempdword); 1369 + if (rc) { 1370 + err("%s: cannot read slot config\n", __FUNCTION__); 1371 + goto abort_free_ctlr; 1372 + } 1373 + num_slots = tempdword & SLOT_NUM; 1374 + dbg("%s: num_slots (indirect) %x\n", __FUNCTION__, num_slots); 1375 + 1376 + for (i = 0; i < 9 + num_slots; i++) { 1377 + rc = shpc_indirect_creg_read(ctrl, i, &tempdword); 1378 if (rc) { 1379 + err("%s: cannot read creg (index = %d)\n", 1380 + __FUNCTION__, i); 1381 goto abort_free_ctlr; 1382 } 1383 dbg("%s: offset %d: value %x\n", __FUNCTION__,i, 1384 tempdword); 1385 } 1386 + 1387 + ctrl->mmio_base = 1388 + pci_resource_start(pdev, 0) + shpc_base_offset; 1389 + ctrl->mmio_size = 0x24 + 0x4 * num_slots; 1390 } 1391 1392 if (first) { ··· 1396 if (pci_enable_device(pdev)) 1397 goto abort_free_ctlr; 1398 1399 + if (!request_mem_region(ctrl->mmio_base, ctrl->mmio_size, MY_NAME)) { 1400 err("%s: cannot reserve MMIO region\n", __FUNCTION__); 1401 goto abort_free_ctlr; 1402 } 1403 1404 + php_ctlr->creg = ioremap(ctrl->mmio_base, ctrl->mmio_size); 1405 if (!php_ctlr->creg) { 1406 + err("%s: cannot remap MMIO region %lx @ %lx\n", __FUNCTION__, 1407 + ctrl->mmio_size, ctrl->mmio_base); 1408 + release_mem_region(ctrl->mmio_base, ctrl->mmio_size); 1409 goto abort_free_ctlr; 1410 } 1411 dbg("%s: php_ctlr->creg %p\n", __FUNCTION__, php_ctlr->creg);
+14 -5
drivers/pci/hotplug/shpchp_pci.c
··· 89 struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate; 90 int num, fn; 91 92 - dev = pci_find_slot(p_slot->bus, PCI_DEVFN(p_slot->device, 0)); 93 if (dev) { 94 err("Device %s already exists at %x:%x, cannot hot-add\n", 95 pci_name(dev), p_slot->bus, p_slot->device); 96 return -EINVAL; 97 } 98 ··· 104 } 105 106 for (fn = 0; fn < 8; fn++) { 107 - if (!(dev = pci_find_slot(p_slot->bus, 108 - PCI_DEVFN(p_slot->device, fn)))) 109 continue; 110 if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) { 111 err("Cannot hot-add display device %s\n", 112 pci_name(dev)); 113 continue; 114 } 115 if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) || ··· 126 } 127 if (busnr >= end) { 128 err("No free bus for hot-added bridge\n"); 129 continue; 130 } 131 child = pci_add_new_bus(parent, dev, busnr); 132 if (!child) { 133 err("Cannot add new bus for %s\n", 134 pci_name(dev)); 135 continue; 136 } 137 child->subordinate = pci_do_scan_bus(child); 138 pci_bus_size_bridges(child); 139 } 140 program_fw_provided_values(dev); 141 } 142 143 pci_bus_assign_resources(parent); ··· 154 int rc = 0; 155 int j; 156 u8 bctl = 0; 157 - 158 dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus, p_slot->device); 159 160 for (j=0; j<8 ; j++) { 161 - struct pci_dev* temp = pci_find_slot(p_slot->bus, 162 (p_slot->device << 3) | j); 163 if (!temp) 164 continue; 165 if ((temp->class >> 16) == PCI_BASE_CLASS_DISPLAY) { 166 err("Cannot remove display device %s\n", 167 pci_name(temp)); 168 continue; 169 } 170 if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) { ··· 174 if (bctl & PCI_BRIDGE_CTL_VGA) { 175 err("Cannot remove display device %s\n", 176 pci_name(temp)); 177 continue; 178 } 179 } 180 pci_remove_bus_device(temp); 181 } 182 return rc; 183 }
··· 89 struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate; 90 int num, fn; 91 92 + dev = pci_get_slot(parent, PCI_DEVFN(p_slot->device, 0)); 93 if (dev) { 94 err("Device %s already exists at %x:%x, cannot hot-add\n", 95 pci_name(dev), p_slot->bus, p_slot->device); 96 + pci_dev_put(dev); 97 return -EINVAL; 98 } 99 ··· 103 } 104 105 for (fn = 0; fn < 8; fn++) { 106 + dev = pci_get_slot(parent, PCI_DEVFN(p_slot->device, fn)); 107 + if (!dev) 108 continue; 109 if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) { 110 err("Cannot hot-add display device %s\n", 111 pci_name(dev)); 112 + pci_dev_put(dev); 113 continue; 114 } 115 if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) || ··· 124 } 125 if (busnr >= end) { 126 err("No free bus for hot-added bridge\n"); 127 + pci_dev_put(dev); 128 continue; 129 } 130 child = pci_add_new_bus(parent, dev, busnr); 131 if (!child) { 132 err("Cannot add new bus for %s\n", 133 pci_name(dev)); 134 + pci_dev_put(dev); 135 continue; 136 } 137 child->subordinate = pci_do_scan_bus(child); 138 pci_bus_size_bridges(child); 139 } 140 program_fw_provided_values(dev); 141 + pci_dev_put(dev); 142 } 143 144 pci_bus_assign_resources(parent); ··· 149 int rc = 0; 150 int j; 151 u8 bctl = 0; 152 + struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate; 153 + 154 dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus, p_slot->device); 155 156 for (j=0; j<8 ; j++) { 157 + struct pci_dev* temp = pci_get_slot(parent, 158 (p_slot->device << 3) | j); 159 if (!temp) 160 continue; 161 if ((temp->class >> 16) == PCI_BASE_CLASS_DISPLAY) { 162 err("Cannot remove display device %s\n", 163 pci_name(temp)); 164 + pci_dev_put(temp); 165 continue; 166 } 167 if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) { ··· 167 if (bctl & PCI_BRIDGE_CTL_VGA) { 168 err("Cannot remove display device %s\n", 169 pci_name(temp)); 170 + pci_dev_put(temp); 171 continue; 172 } 173 } 174 pci_remove_bus_device(temp); 175 + pci_dev_put(temp); 176 } 177 return rc; 178 }
+4 -3
drivers/pci/pci.c
··· 19 #include <asm/dma.h> /* isa_dma_bridge_buggy */ 20 #include "pci.h" 21 22 23 /** 24 * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children ··· 63 } 64 return max; 65 } 66 67 static int __pci_find_next_cap(struct pci_bus *bus, unsigned int devfn, u8 pos, int cap) 68 { ··· 590 { 591 u8 pin; 592 593 - pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); 594 if (!pin) 595 return -1; 596 pin--; ··· 920 EXPORT_SYMBOL(pci_enable_device_bars); 921 EXPORT_SYMBOL(pci_enable_device); 922 EXPORT_SYMBOL(pci_disable_device); 923 - EXPORT_SYMBOL(pci_max_busnr); 924 - EXPORT_SYMBOL(pci_bus_max_busnr); 925 EXPORT_SYMBOL(pci_find_capability); 926 EXPORT_SYMBOL(pci_bus_find_capability); 927 EXPORT_SYMBOL(pci_release_regions);
··· 19 #include <asm/dma.h> /* isa_dma_bridge_buggy */ 20 #include "pci.h" 21 22 + #if 0 23 24 /** 25 * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children ··· 62 } 63 return max; 64 } 65 + 66 + #endif /* 0 */ 67 68 static int __pci_find_next_cap(struct pci_bus *bus, unsigned int devfn, u8 pos, int cap) 69 { ··· 587 { 588 u8 pin; 589 590 + pin = dev->pin; 591 if (!pin) 592 return -1; 593 pin--; ··· 917 EXPORT_SYMBOL(pci_enable_device_bars); 918 EXPORT_SYMBOL(pci_enable_device); 919 EXPORT_SYMBOL(pci_disable_device); 920 EXPORT_SYMBOL(pci_find_capability); 921 EXPORT_SYMBOL(pci_bus_find_capability); 922 EXPORT_SYMBOL(pci_release_regions);
-5
drivers/pci/pci.h
··· 26 #ifdef CONFIG_PROC_FS 27 extern int pci_proc_attach_device(struct pci_dev *dev); 28 extern int pci_proc_detach_device(struct pci_dev *dev); 29 - extern int pci_proc_attach_bus(struct pci_bus *bus); 30 extern int pci_proc_detach_bus(struct pci_bus *bus); 31 #else 32 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 33 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 34 - static inline int pci_proc_attach_bus(struct pci_bus *bus) { return 0; } 35 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 36 #endif 37 38 /* Functions for PCI Hotplug drivers to use */ 39 extern unsigned int pci_do_scan_bus(struct pci_bus *bus); 40 - extern int pci_remove_device_safe(struct pci_dev *dev); 41 - extern unsigned char pci_max_busnr(void); 42 - extern unsigned char pci_bus_max_busnr(struct pci_bus *bus); 43 extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap); 44 45 extern void pci_remove_legacy_files(struct pci_bus *bus);
··· 26 #ifdef CONFIG_PROC_FS 27 extern int pci_proc_attach_device(struct pci_dev *dev); 28 extern int pci_proc_detach_device(struct pci_dev *dev); 29 extern int pci_proc_detach_bus(struct pci_bus *bus); 30 #else 31 static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; } 32 static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; } 33 static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; } 34 #endif 35 36 /* Functions for PCI Hotplug drivers to use */ 37 extern unsigned int pci_do_scan_bus(struct pci_bus *bus); 38 extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap); 39 40 extern void pci_remove_legacy_files(struct pci_bus *bus);
+2 -2
drivers/pci/pcie/portdrv_core.c
··· 238 device->driver = NULL; 239 device->driver_data = NULL; 240 device->release = release_pcie_device; /* callback to free pcie dev */ 241 - sprintf(&device->bus_id[0], "pcie%02x", 242 - get_descriptor_id(port_type, service_type)); 243 device->parent = &parent->dev; 244 } 245
··· 238 device->driver = NULL; 239 device->driver_data = NULL; 240 device->release = release_pcie_device; /* callback to free pcie dev */ 241 + snprintf(device->bus_id, sizeof(device->bus_id), "%s:pcie%02x", 242 + pci_name(parent), get_descriptor_id(port_type, service_type)); 243 device->parent = &parent->dev; 244 } 245
+44 -5
drivers/pci/probe.c
··· 264 265 if (base <= limit) { 266 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO; 267 - res->start = base; 268 - res->end = limit + 0xfff; 269 } 270 271 res = child->resource[1]; ··· 433 { 434 struct pci_bus *child; 435 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS); 436 - u32 buses, i; 437 u16 bctl; 438 439 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses); ··· 543 * as cards with a PCI-to-PCI bridge can be 544 * inserted later. 545 */ 546 - for (i=0; i<CARDBUS_RESERVE_BUSNR; i++) 547 if (pci_find_bus(pci_domain_nr(bus), 548 max+i+1)) 549 break; 550 max += i; 551 pci_fixup_parent_subordinate_busnr(child, max); 552 } ··· 580 581 sprintf(child->name, (is_cardbus ? "PCI CardBus #%02x" : "PCI Bus #%02x"), child->number); 582 583 return max; 584 } 585 ··· 608 unsigned char irq; 609 610 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq); 611 if (irq) 612 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq); 613 dev->irq = irq; ··· 662 /* The PCI-to-PCI bridge spec requires that subtractive 663 decoding (i.e. transparent) bridge must have programming 664 interface code of 0x01. */ 665 dev->transparent = ((dev->class & 0xff) == 1); 666 pci_read_bases(dev, 2, PCI_ROM_ADDRESS1); 667 break; ··· 717 * reading the dword at 0x100 which must either be 0 or a valid extended 718 * capability header. 719 */ 720 - static int pci_cfg_space_size(struct pci_dev *dev) 721 { 722 int pos; 723 u32 status;
··· 264 265 if (base <= limit) { 266 res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO; 267 + if (!res->start) 268 + res->start = base; 269 + if (!res->end) 270 + res->end = limit + 0xfff; 271 } 272 273 res = child->resource[1]; ··· 431 { 432 struct pci_bus *child; 433 int is_cardbus = (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS); 434 + u32 buses, i, j = 0; 435 u16 bctl; 436 437 pci_read_config_dword(dev, PCI_PRIMARY_BUS, &buses); ··· 541 * as cards with a PCI-to-PCI bridge can be 542 * inserted later. 543 */ 544 + for (i=0; i<CARDBUS_RESERVE_BUSNR; i++) { 545 + struct pci_bus *parent = bus; 546 if (pci_find_bus(pci_domain_nr(bus), 547 max+i+1)) 548 break; 549 + while (parent->parent) { 550 + if ((!pcibios_assign_all_busses()) && 551 + (parent->subordinate > max) && 552 + (parent->subordinate <= max+i)) { 553 + j = 1; 554 + } 555 + parent = parent->parent; 556 + } 557 + if (j) { 558 + /* 559 + * Often, there are two cardbus bridges 560 + * -- try to leave one valid bus number 561 + * for each one. 562 + */ 563 + i /= 2; 564 + break; 565 + } 566 + } 567 max += i; 568 pci_fixup_parent_subordinate_busnr(child, max); 569 } ··· 559 560 sprintf(child->name, (is_cardbus ? "PCI CardBus #%02x" : "PCI Bus #%02x"), child->number); 561 562 + while (bus->parent) { 563 + if ((child->subordinate > bus->subordinate) || 564 + (child->number > bus->subordinate) || 565 + (child->number < bus->number) || 566 + (child->subordinate < bus->number)) { 567 + printk(KERN_WARNING "PCI: Bus #%02x (-#%02x) may be " 568 + "hidden behind%s bridge #%02x (-#%02x)%s\n", 569 + child->number, child->subordinate, 570 + bus->self->transparent ? " transparent" : " ", 571 + bus->number, bus->subordinate, 572 + pcibios_assign_all_busses() ? " " : 573 + " (try 'pci=assign-busses')"); 574 + } 575 + bus = bus->parent; 576 + } 577 + 578 return max; 579 } 580 ··· 571 unsigned char irq; 572 573 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &irq); 574 + dev->pin = irq; 575 if (irq) 576 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq); 577 dev->irq = irq; ··· 624 /* The PCI-to-PCI bridge spec requires that subtractive 625 decoding (i.e. transparent) bridge must have programming 626 interface code of 0x01. */ 627 + pci_read_irq(dev); 628 dev->transparent = ((dev->class & 0xff) == 1); 629 pci_read_bases(dev, 2, PCI_ROM_ADDRESS1); 630 break; ··· 678 * reading the dword at 0x100 which must either be 0 or a valid extended 679 * capability header. 680 */ 681 + int pci_cfg_space_size(struct pci_dev *dev) 682 { 683 int pos; 684 u32 status;
+2 -1
drivers/pci/proc.c
··· 431 return 0; 432 } 433 434 int pci_proc_attach_bus(struct pci_bus* bus) 435 { 436 struct proc_dir_entry *de = bus->procdir; ··· 448 } 449 return 0; 450 } 451 452 int pci_proc_detach_bus(struct pci_bus* bus) 453 { ··· 614 615 #ifdef CONFIG_HOTPLUG 616 EXPORT_SYMBOL(pci_proc_attach_device); 617 - EXPORT_SYMBOL(pci_proc_attach_bus); 618 EXPORT_SYMBOL(pci_proc_detach_bus); 619 #endif 620
··· 431 return 0; 432 } 433 434 + #if 0 435 int pci_proc_attach_bus(struct pci_bus* bus) 436 { 437 struct proc_dir_entry *de = bus->procdir; ··· 447 } 448 return 0; 449 } 450 + #endif /* 0 */ 451 452 int pci_proc_detach_bus(struct pci_bus* bus) 453 { ··· 612 613 #ifdef CONFIG_HOTPLUG 614 EXPORT_SYMBOL(pci_proc_attach_device); 615 EXPORT_SYMBOL(pci_proc_detach_bus); 616 #endif 617
+26
drivers/pci/quirks.c
··· 1342 pci_do_fixups(dev, start, end); 1343 } 1344 1345 EXPORT_SYMBOL(pcie_mch_quirk); 1346 #ifdef CONFIG_HOTPLUG 1347 EXPORT_SYMBOL(pci_fixup_device);
··· 1342 pci_do_fixups(dev, start, end); 1343 } 1344 1345 + /* Enable 1k I/O space granularity on the Intel P64H2 */ 1346 + static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev) 1347 + { 1348 + u16 en1k; 1349 + u8 io_base_lo, io_limit_lo; 1350 + unsigned long base, limit; 1351 + struct resource *res = dev->resource + PCI_BRIDGE_RESOURCES; 1352 + 1353 + pci_read_config_word(dev, 0x40, &en1k); 1354 + 1355 + if (en1k & 0x200) { 1356 + printk(KERN_INFO "PCI: Enable I/O Space to 1 KB Granularity\n"); 1357 + 1358 + pci_read_config_byte(dev, PCI_IO_BASE, &io_base_lo); 1359 + pci_read_config_byte(dev, PCI_IO_LIMIT, &io_limit_lo); 1360 + base = (io_base_lo & (PCI_IO_RANGE_MASK | 0x0c)) << 8; 1361 + limit = (io_limit_lo & (PCI_IO_RANGE_MASK | 0x0c)) << 8; 1362 + 1363 + if (base <= limit) { 1364 + res->start = base; 1365 + res->end = limit + 0x3ff; 1366 + } 1367 + } 1368 + } 1369 + DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1460, quirk_p64h2_1k_io); 1370 + 1371 EXPORT_SYMBOL(pcie_mch_quirk); 1372 #ifdef CONFIG_HOTPLUG 1373 EXPORT_SYMBOL(pci_fixup_device);
+2 -1
drivers/pci/remove.c
··· 48 * in question is not being used by a driver. 49 * Returns 0 on success. 50 */ 51 int pci_remove_device_safe(struct pci_dev *dev) 52 { 53 if (pci_dev_driver(dev)) ··· 56 pci_destroy_dev(dev); 57 return 0; 58 } 59 - EXPORT_SYMBOL(pci_remove_device_safe); 60 61 void pci_remove_bus(struct pci_bus *pci_bus) 62 {
··· 48 * in question is not being used by a driver. 49 * Returns 0 on success. 50 */ 51 + #if 0 52 int pci_remove_device_safe(struct pci_dev *dev) 53 { 54 if (pci_dev_driver(dev)) ··· 55 pci_destroy_dev(dev); 56 return 0; 57 } 58 + #endif /* 0 */ 59 60 void pci_remove_bus(struct pci_bus *pci_bus) 61 {
+1 -1
drivers/pcmcia/vrc4173_cardu.c
··· 561 { 562 vrc4173_cardu_slots = 0; 563 564 - return pci_module_init(&vrc4173_cardu_driver); 565 } 566 567 static void __devexit vrc4173_cardu_exit(void)
··· 561 { 562 vrc4173_cardu_slots = 0; 563 564 + return pci_register_driver(&vrc4173_cardu_driver); 565 } 566 567 static void __devexit vrc4173_cardu_exit(void)
+1 -1
drivers/serial/serial_txx9.c
··· 1195 serial_txx9_register_ports(&serial_txx9_reg); 1196 1197 #ifdef ENABLE_SERIAL_TXX9_PCI 1198 - ret = pci_module_init(&serial_txx9_pci_driver); 1199 #endif 1200 } 1201 return ret;
··· 1195 serial_txx9_register_ports(&serial_txx9_reg); 1196 1197 #ifdef ENABLE_SERIAL_TXX9_PCI 1198 + ret = pci_register_driver(&serial_txx9_pci_driver); 1199 #endif 1200 } 1201 return ret;
+1
drivers/video/cyblafb.c
··· 1666 #endif 1667 output("CyblaFB version %s initializing\n", VERSION); 1668 return pci_module_init(&cyblafb_pci_driver); 1669 } 1670 1671 static void __exit cyblafb_exit(void)
··· 1666 #endif 1667 output("CyblaFB version %s initializing\n", VERSION); 1668 return pci_module_init(&cyblafb_pci_driver); 1669 + return pci_register_driver(&cyblafb_pci_driver); 1670 } 1671 1672 static void __exit cyblafb_exit(void)
+69
include/linux/pci.h
··· 78 #define PCI_UNKNOWN ((pci_power_t __force) 5) 79 #define PCI_POWER_ERROR ((pci_power_t __force) -1) 80 81 /* 82 * The pci_dev structure is used to describe PCI devices. 83 */ ··· 115 unsigned int class; /* 3 bytes: (base,sub,prog-if) */ 116 u8 hdr_type; /* PCI header type (`multi' flag masked out) */ 117 u8 rom_base_reg; /* which config register controls the ROM */ 118 119 struct pci_driver *driver; /* which driver has allocated this device */ 120 u64 dma_mask; /* Mask of the bits of bus address this ··· 128 this is D0-D3, D0 being fully functional, 129 and D3 being off. */ 130 131 struct device dev; /* Generic device interface */ 132 133 /* device is compatible with these IDs */ ··· 251 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */ 252 }; 253 254 struct module; 255 struct pci_driver { 256 struct list_head node; ··· 311 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */ 312 void (*shutdown) (struct pci_dev *dev); 313 314 struct device_driver driver; 315 struct pci_dynids dynids; 316 }; ··· 516 517 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *), 518 void *userdata); 519 520 /* kmem_cache style wrapper around pci_alloc_consistent() */ 521
··· 78 #define PCI_UNKNOWN ((pci_power_t __force) 5) 79 #define PCI_POWER_ERROR ((pci_power_t __force) -1) 80 81 + /** The pci_channel state describes connectivity between the CPU and 82 + * the pci device. If some PCI bus between here and the pci device 83 + * has crashed or locked up, this info is reflected here. 84 + */ 85 + typedef unsigned int __bitwise pci_channel_state_t; 86 + 87 + enum pci_channel_state { 88 + /* I/O channel is in normal state */ 89 + pci_channel_io_normal = (__force pci_channel_state_t) 1, 90 + 91 + /* I/O to channel is blocked */ 92 + pci_channel_io_frozen = (__force pci_channel_state_t) 2, 93 + 94 + /* PCI card is dead */ 95 + pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, 96 + }; 97 + 98 /* 99 * The pci_dev structure is used to describe PCI devices. 100 */ ··· 98 unsigned int class; /* 3 bytes: (base,sub,prog-if) */ 99 u8 hdr_type; /* PCI header type (`multi' flag masked out) */ 100 u8 rom_base_reg; /* which config register controls the ROM */ 101 + u8 pin; /* which interrupt pin this device uses */ 102 103 struct pci_driver *driver; /* which driver has allocated this device */ 104 u64 dma_mask; /* Mask of the bits of bus address this ··· 110 this is D0-D3, D0 being fully functional, 111 and D3 being off. */ 112 113 + pci_channel_state_t error_state; /* current connectivity state */ 114 struct device dev; /* Generic device interface */ 115 116 /* device is compatible with these IDs */ ··· 232 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */ 233 }; 234 235 + /* ---------------------------------------------------------------- */ 236 + /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides 237 + * a set fof callbacks in struct pci_error_handlers, then that device driver 238 + * will be notified of PCI bus errors, and will be driven to recovery 239 + * when an error occurs. 240 + */ 241 + 242 + typedef unsigned int __bitwise pci_ers_result_t; 243 + 244 + enum pci_ers_result { 245 + /* no result/none/not supported in device driver */ 246 + PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, 247 + 248 + /* Device driver can recover without slot reset */ 249 + PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, 250 + 251 + /* Device driver wants slot to be reset. */ 252 + PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, 253 + 254 + /* Device has completely failed, is unrecoverable */ 255 + PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, 256 + 257 + /* Device driver is fully recovered and operational */ 258 + PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, 259 + }; 260 + 261 + /* PCI bus error event callbacks */ 262 + struct pci_error_handlers 263 + { 264 + /* PCI bus error detected on this device */ 265 + pci_ers_result_t (*error_detected)(struct pci_dev *dev, 266 + enum pci_channel_state error); 267 + 268 + /* MMIO has been re-enabled, but not DMA */ 269 + pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); 270 + 271 + /* PCI Express link has been reset */ 272 + pci_ers_result_t (*link_reset)(struct pci_dev *dev); 273 + 274 + /* PCI slot has been reset */ 275 + pci_ers_result_t (*slot_reset)(struct pci_dev *dev); 276 + 277 + /* Device driver may resume normal operations */ 278 + void (*resume)(struct pci_dev *dev); 279 + }; 280 + 281 + /* ---------------------------------------------------------------- */ 282 + 283 struct module; 284 struct pci_driver { 285 struct list_head node; ··· 244 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */ 245 void (*shutdown) (struct pci_dev *dev); 246 247 + struct pci_error_handlers *err_handler; 248 struct device_driver driver; 249 struct pci_dynids dynids; 250 }; ··· 448 449 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *), 450 void *userdata); 451 + int pci_cfg_space_size(struct pci_dev *dev); 452 453 /* kmem_cache style wrapper around pci_alloc_consistent() */ 454
+1 -1
sound/oss/ad1889.c
··· 1089 1090 static int __init ad1889_init_module(void) 1091 { 1092 - return pci_module_init(&ad1889_driver); 1093 } 1094 1095 static void ad1889_exit_module(void)
··· 1089 1090 static int __init ad1889_init_module(void) 1091 { 1092 + return pci_register_driver(&ad1889_driver); 1093 } 1094 1095 static void ad1889_exit_module(void)
+1 -1
sound/oss/btaudio.c
··· 1101 digital ? "digital" : "", 1102 analog && digital ? "+" : "", 1103 analog ? "analog" : ""); 1104 - return pci_module_init(&btaudio_pci_driver); 1105 } 1106 1107 static void btaudio_cleanup_module(void)
··· 1101 digital ? "digital" : "", 1102 analog && digital ? "+" : "", 1103 analog ? "analog" : ""); 1104 + return pci_register_driver(&btaudio_pci_driver); 1105 } 1106 1107 static void btaudio_cleanup_module(void)
+1 -1
sound/oss/cmpci.c
··· 3366 static int __init init_cmpci(void) 3367 { 3368 printk(KERN_INFO "cmpci: version $Revision: 6.82 $ time " __TIME__ " " __DATE__ "\n"); 3369 - return pci_module_init(&cm_driver); 3370 } 3371 3372 static void __exit cleanup_cmpci(void)
··· 3366 static int __init init_cmpci(void) 3367 { 3368 printk(KERN_INFO "cmpci: version $Revision: 6.82 $ time " __TIME__ " " __DATE__ "\n"); 3369 + return pci_register_driver(&cm_driver); 3370 } 3371 3372 static void __exit cleanup_cmpci(void)
+1 -1
sound/oss/cs4281/cs4281m.c
··· 4461 printk(KERN_INFO "cs4281: version v%d.%02d.%d time " __TIME__ " " 4462 __DATE__ "\n", CS4281_MAJOR_VERSION, CS4281_MINOR_VERSION, 4463 CS4281_ARCH); 4464 - rtn = pci_module_init(&cs4281_pci_driver); 4465 4466 CS_DBGOUT(CS_INIT | CS_FUNCTION, 2, 4467 printk(KERN_INFO "cs4281: cs4281_init_module()- (%d)\n",rtn));
··· 4461 printk(KERN_INFO "cs4281: version v%d.%02d.%d time " __TIME__ " " 4462 __DATE__ "\n", CS4281_MAJOR_VERSION, CS4281_MINOR_VERSION, 4463 CS4281_ARCH); 4464 + rtn = pci_register_driver(&cs4281_pci_driver); 4465 4466 CS_DBGOUT(CS_INIT | CS_FUNCTION, 2, 4467 printk(KERN_INFO "cs4281: cs4281_init_module()- (%d)\n",rtn));
+1 -1
sound/oss/cs46xx.c
··· 5690 int rtn = 0; 5691 CS_DBGOUT(CS_INIT | CS_FUNCTION, 2, printk(KERN_INFO 5692 "cs46xx: cs46xx_init_module()+ \n")); 5693 - rtn = pci_module_init(&cs46xx_pci_driver); 5694 5695 if(rtn == -ENODEV) 5696 {
··· 5690 int rtn = 0; 5691 CS_DBGOUT(CS_INIT | CS_FUNCTION, 2, printk(KERN_INFO 5692 "cs46xx: cs46xx_init_module()+ \n")); 5693 + rtn = pci_register_driver(&cs46xx_pci_driver); 5694 5695 if(rtn == -ENODEV) 5696 {
+1 -1
sound/oss/emu10k1/main.c
··· 1428 { 1429 printk(KERN_INFO "Creative EMU10K1 PCI Audio Driver, version " DRIVER_VERSION ", " __TIME__ " " __DATE__ "\n"); 1430 1431 - return pci_module_init(&emu10k1_pci_driver); 1432 } 1433 1434 static void __exit emu10k1_cleanup_module(void)
··· 1428 { 1429 printk(KERN_INFO "Creative EMU10K1 PCI Audio Driver, version " DRIVER_VERSION ", " __TIME__ " " __DATE__ "\n"); 1430 1431 + return pci_register_driver(&emu10k1_pci_driver); 1432 } 1433 1434 static void __exit emu10k1_cleanup_module(void)
+1 -1
sound/oss/es1370.c
··· 2779 static int __init init_es1370(void) 2780 { 2781 printk(KERN_INFO "es1370: version v0.38 time " __TIME__ " " __DATE__ "\n"); 2782 - return pci_module_init(&es1370_driver); 2783 } 2784 2785 static void __exit cleanup_es1370(void)
··· 2779 static int __init init_es1370(void) 2780 { 2781 printk(KERN_INFO "es1370: version v0.38 time " __TIME__ " " __DATE__ "\n"); 2782 + return pci_register_driver(&es1370_driver); 2783 } 2784 2785 static void __exit cleanup_es1370(void)
+1 -1
sound/oss/es1371.c
··· 3090 static int __init init_es1371(void) 3091 { 3092 printk(KERN_INFO PFX "version v0.32 time " __TIME__ " " __DATE__ "\n"); 3093 - return pci_module_init(&es1371_driver); 3094 } 3095 3096 static void __exit cleanup_es1371(void)
··· 3090 static int __init init_es1371(void) 3091 { 3092 printk(KERN_INFO PFX "version v0.32 time " __TIME__ " " __DATE__ "\n"); 3093 + return pci_register_driver(&es1371_driver); 3094 } 3095 3096 static void __exit cleanup_es1371(void)
+1 -1
sound/oss/ite8172.c
··· 2206 static int __init init_it8172(void) 2207 { 2208 info("version v0.5 time " __TIME__ " " __DATE__); 2209 - return pci_module_init(&it8172_driver); 2210 } 2211 2212 static void __exit cleanup_it8172(void)
··· 2206 static int __init init_it8172(void) 2207 { 2208 info("version v0.5 time " __TIME__ " " __DATE__); 2209 + return pci_register_driver(&it8172_driver); 2210 } 2211 2212 static void __exit cleanup_it8172(void)
+1 -1
sound/oss/kahlua.c
··· 218 static int __init kahlua_init_module(void) 219 { 220 printk(KERN_INFO "Cyrix Kahlua VSA1 XpressAudio support (c) Copyright 2003 Red Hat Inc\n"); 221 - return pci_module_init(&kahlua_driver); 222 } 223 224 static void __devexit kahlua_cleanup_module(void)
··· 218 static int __init kahlua_init_module(void) 219 { 220 printk(KERN_INFO "Cyrix Kahlua VSA1 XpressAudio support (c) Copyright 2003 Red Hat Inc\n"); 221 + return pci_register_driver(&kahlua_driver); 222 } 223 224 static void __devexit kahlua_cleanup_module(void)
+1 -1
sound/oss/maestro.c
··· 3624 { 3625 int rc; 3626 3627 - rc = pci_module_init(&maestro_pci_driver); 3628 if (rc < 0) 3629 return rc; 3630
··· 3624 { 3625 int rc; 3626 3627 + rc = pci_register_driver(&maestro_pci_driver); 3628 if (rc < 0) 3629 return rc; 3630
+1 -1
sound/oss/nec_vrc5477.c
··· 2045 static int __init init_vrc5477_ac97(void) 2046 { 2047 printk("Vrc5477 AC97 driver: version v0.2 time " __TIME__ " " __DATE__ " by Jun Sun\n"); 2048 - return pci_module_init(&vrc5477_ac97_driver); 2049 } 2050 2051 static void __exit cleanup_vrc5477_ac97(void)
··· 2045 static int __init init_vrc5477_ac97(void) 2046 { 2047 printk("Vrc5477 AC97 driver: version v0.2 time " __TIME__ " " __DATE__ " by Jun Sun\n"); 2048 + return pci_register_driver(&vrc5477_ac97_driver); 2049 } 2050 2051 static void __exit cleanup_vrc5477_ac97(void)
+1 -1
sound/oss/nm256_audio.c
··· 1644 static int __init do_init_nm256(void) 1645 { 1646 printk (KERN_INFO "NeoMagic 256AV/256ZX audio driver, version 1.1p\n"); 1647 - return pci_module_init(&nm256_pci_driver); 1648 } 1649 1650 static void __exit cleanup_nm256 (void)
··· 1644 static int __init do_init_nm256(void) 1645 { 1646 printk (KERN_INFO "NeoMagic 256AV/256ZX audio driver, version 1.1p\n"); 1647 + return pci_register_driver(&nm256_pci_driver); 1648 } 1649 1650 static void __exit cleanup_nm256 (void)
+1 -1
sound/oss/rme96xx.c
··· 1095 devices = ((devices-1) & RME96xx_MASK_DEVS) + 1; 1096 printk(KERN_INFO RME_MESS" reserving %d dsp device(s)\n",devices); 1097 numcards = 0; 1098 - return pci_module_init(&rme96xx_driver); 1099 } 1100 1101 static void __exit cleanup_rme96xx(void)
··· 1095 devices = ((devices-1) & RME96xx_MASK_DEVS) + 1; 1096 printk(KERN_INFO RME_MESS" reserving %d dsp device(s)\n",devices); 1097 numcards = 0; 1098 + return pci_register_driver(&rme96xx_driver); 1099 } 1100 1101 static void __exit cleanup_rme96xx(void)
+1 -1
sound/oss/sonicvibes.c
··· 2765 if (!(wavetable_mem = __get_free_pages(GFP_KERNEL, 20-PAGE_SHIFT))) 2766 printk(KERN_INFO "sv: cannot allocate 1MB of contiguous nonpageable memory for wavetable data\n"); 2767 #endif 2768 - return pci_module_init(&sv_driver); 2769 } 2770 2771 static void __exit cleanup_sonicvibes(void)
··· 2765 if (!(wavetable_mem = __get_free_pages(GFP_KERNEL, 20-PAGE_SHIFT))) 2766 printk(KERN_INFO "sv: cannot allocate 1MB of contiguous nonpageable memory for wavetable data\n"); 2767 #endif 2768 + return pci_register_driver(&sv_driver); 2769 } 2770 2771 static void __exit cleanup_sonicvibes(void)
+1 -1
sound/oss/ymfpci.c
··· 2680 2681 static int __init ymf_init_module(void) 2682 { 2683 - return pci_module_init(&ymfpci_driver); 2684 } 2685 2686 static void __exit ymf_cleanup_module (void)
··· 2680 2681 static int __init ymf_init_module(void) 2682 { 2683 + return pci_register_driver(&ymfpci_driver); 2684 } 2685 2686 static void __exit ymf_cleanup_module (void)