···11Accessing PCI device resources through sysfs22+--------------------------------------------2334sysfs, usually mounted at /sys, provides access to PCI resources on platforms45that support it. For example, a given bus might look like this:···4847 binary - file contains binary data4948 cpumask - file contains a cpumask type50495151-The read only files are informational, writes to them will be ignored.5252-Writable files can be used to perform actions on the device (e.g. changing5353-config space, detaching a device). mmapable files are available via an5454-mmap of the file at offset 0 and can be used to do actual device programming5555-from userspace. Note that some platforms don't support mmapping of certain5656-resources, so be sure to check the return value from any attempted mmap.5050+The read only files are informational, writes to them will be ignored, with5151+the exception of the 'rom' file. Writable files can be used to perform5252+actions on the device (e.g. changing config space, detaching a device).5353+mmapable files are available via an mmap of the file at offset 0 and can be5454+used to do actual device programming from userspace. Note that some platforms5555+don't support mmapping of certain resources, so be sure to check the return5656+value from any attempted mmap.5757+5858+The 'rom' file is special in that it provides read-only access to the device's5959+ROM file, if available. It's disabled by default, however, so applications6060+should write the string "1" to the file to enable it before attempting a read6161+call, and disable it following the access by writing "0" to the file.57625863Accessing legacy resources through sysfs6464+----------------------------------------59656066Legacy I/O port and ISA memory resources are also provided in sysfs if the6167underlying platform supports them. They're located in the PCI class heirarchy,···8375to access legacy memory space.84768577Supporting PCI access on new platforms7878+--------------------------------------86798780In order to support PCI resource mapping as described above, Linux platform8881code must define HAVE_PCI_MMAP and provide a pci_mmap_page_range function.
+246
Documentation/pci-error-recovery.txt
···11+22+ PCI Error Recovery33+ ------------------44+ May 31, 200555+66+ Current document maintainer:77+ Linas Vepstas <linas@austin.ibm.com>88+99+1010+Some PCI bus controllers are able to detect certain "hard" PCI errors1111+on the bus, such as parity errors on the data and address busses, as1212+well as SERR and PERR errors. These chipsets are then able to disable1313+I/O to/from the affected device, so that, for example, a bad DMA1414+address doesn't end up corrupting system memory. These same chipsets1515+are also able to reset the affected PCI device, and return it to1616+working condition. This document describes a generic API form1717+performing error recovery.1818+1919+The core idea is that after a PCI error has been detected, there must2020+be a way for the kernel to coordinate with all affected device drivers2121+so that the pci card can be made operational again, possibly after2222+performing a full electrical #RST of the PCI card. The API below2323+provides a generic API for device drivers to be notified of PCI2424+errors, and to be notified of, and respond to, a reset sequence.2525+2626+Preliminary sketch of API, cut-n-pasted-n-modified email from2727+Ben Herrenschmidt, circa 5 april 20052828+2929+The error recovery API support is exposed to the driver in the form of3030+a structure of function pointers pointed to by a new field in struct3131+pci_driver. The absence of this pointer in pci_driver denotes an3232+"non-aware" driver, behaviour on these is platform dependant.3333+Platforms like ppc64 can try to simulate pci hotplug remove/add.3434+3535+The definition of "pci_error_token" is not covered here. It is based on3636+Seto's work on the synchronous error detection. We still need to define3737+functions for extracting infos out of an opaque error token. This is3838+separate from this API.3939+4040+This structure has the form:4141+4242+struct pci_error_handlers4343+{4444+ int (*error_detected)(struct pci_dev *dev, pci_error_token error);4545+ int (*mmio_enabled)(struct pci_dev *dev);4646+ int (*resume)(struct pci_dev *dev);4747+ int (*link_reset)(struct pci_dev *dev);4848+ int (*slot_reset)(struct pci_dev *dev);4949+};5050+5151+A driver doesn't have to implement all of these callbacks. The5252+only mandatory one is error_detected(). If a callback is not5353+implemented, the corresponding feature is considered unsupported.5454+For example, if mmio_enabled() and resume() aren't there, then the5555+driver is assumed as not doing any direct recovery and requires5656+a reset. If link_reset() is not implemented, the card is assumed as5757+not caring about link resets, in which case, if recover is supported,5858+the core can try recover (but not slot_reset() unless it really did5959+reset the slot). If slot_reset() is not supported, link_reset() can6060+be called instead on a slot reset.6161+6262+At first, the call will always be :6363+6464+ 1) error_detected()6565+6666+ Error detected. This is sent once after an error has been detected. At6767+this point, the device might not be accessible anymore depending on the6868+platform (the slot will be isolated on ppc64). The driver may already6969+have "noticed" the error because of a failing IO, but this is the proper7070+"synchronisation point", that is, it gives a chance to the driver to7171+cleanup, waiting for pending stuff (timers, whatever, etc...) to7272+complete; it can take semaphores, schedule, etc... everything but touch7373+the device. Within this function and after it returns, the driver7474+shouldn't do any new IOs. Called in task context. This is sort of a7575+"quiesce" point. See note about interrupts at the end of this doc.7676+7777+ Result codes:7878+ - PCIERR_RESULT_CAN_RECOVER:7979+ Driever returns this if it thinks it might be able to recover8080+ the HW by just banging IOs or if it wants to be given8181+ a chance to extract some diagnostic informations (see8282+ below).8383+ - PCIERR_RESULT_NEED_RESET:8484+ Driver returns this if it thinks it can't recover unless the8585+ slot is reset.8686+ - PCIERR_RESULT_DISCONNECT:8787+ Return this if driver thinks it won't recover at all,8888+ (this will detach the driver ? or just leave it8989+ dangling ? to be decided)9090+9191+So at this point, we have called error_detected() for all drivers9292+on the segment that had the error. On ppc64, the slot is isolated. What9393+happens now typically depends on the result from the drivers. If all9494+drivers on the segment/slot return PCIERR_RESULT_CAN_RECOVER, we would9595+re-enable IOs on the slot (or do nothing special if the platform doesn't9696+isolate slots) and call 2). If not and we can reset slots, we go to 4),9797+if neither, we have a dead slot. If it's an hotplug slot, we might9898+"simulate" reset by triggering HW unplug/replug though.9999+100100+>>> Current ppc64 implementation assumes that a device driver will101101+>>> *not* schedule or semaphore in this routine; the current ppc64102102+>>> implementation uses one kernel thread to notify all devices;103103+>>> thus, of one device sleeps/schedules, all devices are affected.104104+>>> Doing better requires complex multi-threaded logic in the error105105+>>> recovery implementation (e.g. waiting for all notification threads106106+>>> to "join" before proceeding with recovery.) This seems excessively107107+>>> complex and not worth implementing.108108+109109+>>> The current ppc64 implementation doesn't much care if the device110110+>>> attempts i/o at this point, or not. I/O's will fail, returning111111+>>> a value of 0xff on read, and writes will be dropped. If the device112112+>>> driver attempts more than 10K I/O's to a frozen adapter, it will113113+>>> assume that the device driver has gone into an infinite loop, and114114+>>> it will panic the the kernel.115115+116116+ 2) mmio_enabled()117117+118118+ This is the "early recovery" call. IOs are allowed again, but DMA is119119+not (hrm... to be discussed, I prefer not), with some restrictions. This120120+is NOT a callback for the driver to start operations again, only to121121+peek/poke at the device, extract diagnostic information, if any, and122122+eventually do things like trigger a device local reset or some such,123123+but not restart operations. This is sent if all drivers on a segment124124+agree that they can try to recover and no automatic link reset was125125+performed by the HW. If the platform can't just re-enable IOs without126126+a slot reset or a link reset, it doesn't call this callback and goes127127+directly to 3) or 4). All IOs should be done _synchronously_ from128128+within this callback, errors triggered by them will be returned via129129+the normal pci_check_whatever() api, no new error_detected() callback130130+will be issued due to an error happening here. However, such an error131131+might cause IOs to be re-blocked for the whole segment, and thus132132+invalidate the recovery that other devices on the same segment might133133+have done, forcing the whole segment into one of the next states,134134+that is link reset or slot reset.135135+136136+ Result codes:137137+ - PCIERR_RESULT_RECOVERED138138+ Driver returns this if it thinks the device is fully139139+ functionnal and thinks it is ready to start140140+ normal driver operations again. There is no141141+ guarantee that the driver will actually be142142+ allowed to proceed, as another driver on the143143+ same segment might have failed and thus triggered a144144+ slot reset on platforms that support it.145145+146146+ - PCIERR_RESULT_NEED_RESET147147+ Driver returns this if it thinks the device is not148148+ recoverable in it's current state and it needs a slot149149+ reset to proceed.150150+151151+ - PCIERR_RESULT_DISCONNECT152152+ Same as above. Total failure, no recovery even after153153+ reset driver dead. (To be defined more precisely)154154+155155+>>> The current ppc64 implementation does not implement this callback.156156+157157+ 3) link_reset()158158+159159+ This is called after the link has been reset. This is typically160160+a PCI Express specific state at this point and is done whenever a161161+non-fatal error has been detected that can be "solved" by resetting162162+the link. This call informs the driver of the reset and the driver163163+should check if the device appears to be in working condition.164164+This function acts a bit like 2) mmio_enabled(), in that the driver165165+is not supposed to restart normal driver I/O operations right away.166166+Instead, it should just "probe" the device to check it's recoverability167167+status. If all is right, then the core will call resume() once all168168+drivers have ack'd link_reset().169169+170170+ Result codes:171171+ (identical to mmio_enabled)172172+173173+>>> The current ppc64 implementation does not implement this callback.174174+175175+ 4) slot_reset()176176+177177+ This is called after the slot has been soft or hard reset by the178178+platform. A soft reset consists of asserting the adapter #RST line179179+and then restoring the PCI BARs and PCI configuration header. If the180180+platform supports PCI hotplug, then it might instead perform a hard181181+reset by toggling power on the slot off/on. This call gives drivers182182+the chance to re-initialize the hardware (re-download firmware, etc.),183183+but drivers shouldn't restart normal I/O processing operations at184184+this point. (See note about interrupts; interrupts aren't guaranteed185185+to be delivered until the resume() callback has been called). If all186186+device drivers report success on this callback, the patform will call187187+resume() to complete the error handling and let the driver restart188188+normal I/O processing.189189+190190+A driver can still return a critical failure for this function if191191+it can't get the device operational after reset. If the platform192192+previously tried a soft reset, it migh now try a hard reset (power193193+cycle) and then call slot_reset() again. It the device still can't194194+be recovered, there is nothing more that can be done; the platform195195+will typically report a "permanent failure" in such a case. The196196+device will be considered "dead" in this case.197197+198198+ Result codes:199199+ - PCIERR_RESULT_DISCONNECT200200+ Same as above.201201+202202+>>> The current ppc64 implementation does not try a power-cycle reset203203+>>> if the driver returned PCIERR_RESULT_DISCONNECT. However, it should.204204+205205+ 5) resume()206206+207207+ This is called if all drivers on the segment have returned208208+PCIERR_RESULT_RECOVERED from one of the 3 prevous callbacks.209209+That basically tells the driver to restart activity, tht everything210210+is back and running. No result code is taken into account here. If211211+a new error happens, it will restart a new error handling process.212212+213213+That's it. I think this covers all the possibilities. The way those214214+callbacks are called is platform policy. A platform with no slot reset215215+capability for example may want to just "ignore" drivers that can't216216+recover (disconnect them) and try to let other cards on the same segment217217+recover. Keep in mind that in most real life cases, though, there will218218+be only one driver per segment.219219+220220+Now, there is a note about interrupts. If you get an interrupt and your221221+device is dead or has been isolated, there is a problem :)222222+223223+After much thinking, I decided to leave that to the platform. That is,224224+the recovery API only precies that:225225+226226+ - There is no guarantee that interrupt delivery can proceed from any227227+device on the segment starting from the error detection and until the228228+restart callback is sent, at which point interrupts are expected to be229229+fully operational.230230+231231+ - There is no guarantee that interrupt delivery is stopped, that is, ad232232+river that gets an interrupts after detecting an error, or that detects233233+and error within the interrupt handler such that it prevents proper234234+ack'ing of the interrupt (and thus removal of the source) should just235235+return IRQ_NOTHANDLED. It's up to the platform to deal with taht236236+condition, typically by masking the irq source during the duration of237237+the error handling. It is expected that the platform "knows" which238238+interrupts are routed to error-management capable slots and can deal239239+with temporarily disabling that irq number during error processing (this240240+isn't terribly complex). That means some IRQ latency for other devices241241+sharing the interrupt, but there is simply no other way. High end242242+platforms aren't supposed to share interrupts between many devices243243+anyway :)244244+245245+246246+Revised: 31 May 2005 Linas Vepstas <linas@austin.ibm.com>
+7
MAINTAINERS
···19871987L: linux-abi-devel@lists.sourceforge.net19881988S: Maintained1989198919901990+PCI ERROR RECOVERY19911991+P: Linas Vepstas19921992+M: linas@austin.ibm.com19931993+L: linux-kernel@vger.kernel.org19941994+L: linux-pci@atrey.karlin.mff.cuni.cz19951995+S: Supported19961996+19901997PCI SOUND DRIVERS (ES1370, ES1371 and SONICVIBES)19911998P: Thomas Sailer19921999M: sailer@ife.ee.ethz.ch
+2-1
arch/alpha/kernel/sys_alcor.c
···254254 * motherboard, by looking for a 21040 TULIP in slot 6, which is255255 * built into XLT and BRET/MAVERICK, but not available on ALCOR.256256 */257257- dev = pci_find_device(PCI_VENDOR_ID_DEC,257257+ dev = pci_get_device(PCI_VENDOR_ID_DEC,258258 PCI_DEVICE_ID_DEC_TULIP,259259 NULL);260260 if (dev && dev->devfn == PCI_DEVFN(6,0)) {···262262 printk(KERN_INFO "%s: Detected AS500 or XLT motherboard.\n",263263 __FUNCTION__);264264 }265265+ pci_dev_put(dev);265266}266267267268
+3-3
arch/alpha/kernel/sys_sio.c
···105105 struct pci_dev *dev = NULL;106106107107 /* Iterate through the devices, collecting IRQ levels. */108108- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {108108+ for_each_pci_dev(dev) {109109 if ((dev->class >> 16 == PCI_BASE_CLASS_BRIDGE) &&110110 (dev->class >> 8 != PCI_CLASS_BRIDGE_PCMCIA))111111 continue;···229229 */230230231231 dev = NULL;232232- while ((dev = pci_find_device(PCI_VENDOR_ID_NCR, PCI_ANY_ID, dev))) {233233- if (dev->device == PCI_DEVICE_ID_NCR_53C810232232+ while ((dev = pci_get_device(PCI_VENDOR_ID_NCR, PCI_ANY_ID, dev))) {233233+ if (dev->device == PCI_DEVICE_ID_NCR_53C810234234 || dev->device == PCI_DEVICE_ID_NCR_53C815235235 || dev->device == PCI_DEVICE_ID_NCR_53C820236236 || dev->device == PCI_DEVICE_ID_NCR_53C825) {
+2-6
arch/frv/mb93090-mb00/pci-frv.c
···142142 u16 command;143143 struct resource *r, *pr;144144145145- while (dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev),146146- dev != NULL147147- ) {145145+ for_each_pci_dev(dev) {148146 pci_read_config_word(dev, PCI_COMMAND, &command);149147 for(idx = 0; idx < 6; idx++) {150148 r = &dev->resource[idx];···186188 int idx;187189 struct resource *r;188190189189- while (dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev),190190- dev != NULL191191- ) {191191+ for_each_pci_dev(dev) {192192 int class = dev->class >> 8;193193194194 /* Don't touch classless devices and host bridges */
···5353 * don't use pci_enable_device().5454 */5555 printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");5656- while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)5656+ for_each_pci_dev(dev)5757 acpi_pci_irq_enable(dev);5858 } else5959 printk(KERN_INFO "PCI: If a device doesn't work, try \"pci=routeirq\". If it helps, post a report\n");
···7878 for (i=0; i < rt->size; i++)7979 sum += addr[i];8080 if (!sum) {8181- DBG("PCI: Interrupt Routing Table found at 0x%p\n", rt);8181+ DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n", rt);8282 return rt;8383 }8484 return NULL;···128128#ifdef DEBUG129129 {130130 int j;131131- DBG("%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);131131+ DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);132132 for(j=0; j<4; j++)133133 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);134134 DBG("\n");···160160 return;161161162162 eisa_irq_mask |= (1 << irq);163163- printk("PCI: setting IRQ %u as level-triggered\n", irq);163163+ printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);164164 val = inb(port);165165 if (!(val & mask)) {166166- DBG(" -> edge");166166+ DBG(KERN_DEBUG " -> edge");167167 outb(val | mask, port);168168 }169169}···677677 {678678 case PCI_DEVICE_ID_AL_M1533:679679 case PCI_DEVICE_ID_AL_M1563:680680- printk("PCI: Using ALI IRQ Router\n");681681- r->name = "ALI";682682- r->get = pirq_ali_get;683683- r->set = pirq_ali_set;684684- return 1;680680+ printk(KERN_DEBUG "PCI: Using ALI IRQ Router\n");681681+ r->name = "ALI";682682+ r->get = pirq_ali_get;683683+ r->set = pirq_ali_set;684684+ return 1;685685 }686686 return 0;687687}···749749 r->get = NULL;750750 r->set = NULL;751751752752- DBG("PCI: Attempting to find IRQ router for %04x:%04x\n",752752+ DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for %04x:%04x\n",753753 rt->rtr_vendor, rt->rtr_device);754754755755 pirq_router_dev = pci_find_slot(rt->rtr_bus, rt->rtr_devfn);756756 if (!pirq_router_dev) {757757- DBG("PCI: Interrupt router not found at %02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);757757+ DBG(KERN_DEBUG "PCI: Interrupt router not found at "758758+ "%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);758759 return;759760 }760761···800799 /* Find IRQ pin */801800 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);802801 if (!pin) {803803- DBG(" -> no interrupt pin\n");802802+ DBG(KERN_DEBUG " -> no interrupt pin\n");804803 return 0;805804 }806805 pin = pin - 1;···810809 if (!pirq_table)811810 return 0;812811813813- DBG("IRQ for %s[%c]", pci_name(dev), 'A' + pin);812812+ DBG(KERN_DEBUG "IRQ for %s[%c]", pci_name(dev), 'A' + pin);814813 info = pirq_get_info(dev);815814 if (!info) {816816- DBG(" -> not found in routing table\n");815815+ DBG(" -> not found in routing table\n" KERN_DEBUG);817816 return 0;818817 }819818 pirq = info->irq[pin].link;820819 mask = info->irq[pin].bitmap;821820 if (!pirq) {822822- DBG(" -> not routed\n");821821+ DBG(" -> not routed\n" KERN_DEBUG);823822 return 0;824823 }825824 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq, mask, pirq_table->exclusive_irqs);···849848 newirq = dev->irq;850849 if (newirq && !((1 << newirq) & mask)) {851850 if ( pci_probe & PCI_USE_PIRQ_MASK) newirq = 0;852852- else printk(KERN_WARNING "PCI: IRQ %i for device %s doesn't match PIRQ mask - try pci=usepirqmask\n", newirq, pci_name(dev));851851+ else printk("\n" KERN_WARNING852852+ "PCI: IRQ %i for device %s doesn't match PIRQ mask "853853+ "- try pci=usepirqmask\n" KERN_DEBUG, newirq,854854+ pci_name(dev));853855 }854856 if (!newirq && assign) {855857 for (i = 0; i < 16; i++) {···927923 struct pci_dev *dev = NULL;928924 u8 pin;929925930930- DBG("PCI: IRQ fixup\n");926926+ DBG(KERN_DEBUG "PCI: IRQ fixup\n");931927 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {932928 /*933929 * If the BIOS has set an out of range IRQ number, just ignore it.934930 * Also keep track of which IRQ's are already in use.935931 */936932 if (dev->irq >= 16) {937937- DBG("%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);933933+ DBG(KERN_DEBUG "%s: ignoring bogus IRQ %d\n", pci_name(dev), dev->irq);938934 dev->irq = 0;939935 }940936 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */···1043103910441040static int __init pcibios_irq_init(void)10451041{10461046- DBG("PCI: IRQ init\n");10421042+ DBG(KERN_DEBUG "PCI: IRQ init\n");1047104310481044 if (pcibios_enable_irq || raw_pci_ops == NULL)10491045 return 0;
+1-1
arch/mips/vr41xx/common/vrc4173.c
···561561{562562 int err;563563564564- err = pci_module_init(&vrc4173_driver);564564+ err = pci_register_driver(&vrc4173_driver);565565 if (err < 0)566566 return err;567567
+11-10
arch/ppc/kernel/pci.c
···503503 u16 command;504504 struct resource *r;505505506506- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {506506+ for_each_pci_dev(dev) {507507 pci_read_config_word(dev, PCI_COMMAND, &command);508508 for (idx = 0; idx < 6; idx++) {509509 r = &dev->resource[idx];···540540 int idx;541541 struct resource *r;542542543543- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {543543+ for_each_pci_dev(dev) {544544 int class = dev->class >> 8;545545546546 /* Don't touch classless devices and host bridges */···867867 */868868 if (!pci_to_OF_bus_map)869869 return 0;870870- while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {871871- if (pci_to_OF_bus_map[dev->bus->number] != *bus)872872- continue;873873- if (dev->devfn != *devfn)874874- continue;875875- *bus = dev->bus->number;876876- return 0;877877- }870870+871871+ for_each_pci_dev(dev)872872+ if (pci_to_OF_bus_map[dev->bus->number] == *bus &&873873+ dev->devfn == *devfn) {874874+ *bus = dev->bus->number;875875+ pci_dev_put(dev);876876+ return 0;877877+ }878878+878879 return -ENODEV;879880}880881EXPORT_SYMBOL(pci_device_from_OF_node);
+7-4
arch/ppc/platforms/85xx/mpc85xx_cds_common.c
···351351void __init352352mpc85xx_cds_pcibios_fixup(void)353353{354354- struct pci_dev *dev = NULL;354354+ struct pci_dev *dev;355355 u_char c;356356357357- if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,357357+ if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,358358 PCI_DEVICE_ID_VIA_82C586_1, NULL))) {359359 /*360360 * U-Boot does not set the enable bits···371371 */372372 dev->irq = 14;373373 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);374374+ pci_dev_put(dev);374375 }375376376377 /*377378 * Force legacy USB interrupt routing378379 */379379- if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,380380+ if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,380381 PCI_DEVICE_ID_VIA_82C586_2, NULL))) {381382 dev->irq = 10;382383 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 10);384384+ pci_dev_put(dev);383385 }384386385385- if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,387387+ if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,386388 PCI_DEVICE_ID_VIA_82C586_2, dev))) {387389 dev->irq = 11;388390 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);391391+ pci_dev_put(dev);389392 }390393}391394#endif /* CONFIG_PCI */
+5-10
arch/sparc64/kernel/ebus.c
···527527{528528 struct pci_dev *pdev = start;529529530530- do {531531- pdev = pci_find_device(PCI_VENDOR_ID_SUN, PCI_ANY_ID, pdev);532532- if (pdev &&533533- (pdev->device == PCI_DEVICE_ID_SUN_EBUS ||534534- pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS))530530+ while ((pdev = pci_get_device(PCI_VENDOR_ID_SUN, PCI_ANY_ID, pdev)))531531+ if (pdev->device == PCI_DEVICE_ID_SUN_EBUS ||532532+ pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS)535533 break;536536- } while (pdev != NULL);537534538538- if (pdev && (pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS))539539- *is_rio_p = 1;540540- else541541- *is_rio_p = 0;535535+ *is_rio_p = !!(pdev && (pdev->device == PCI_DEVICE_ID_SUN_RIO_EBUS));542536543537 return pdev;544538}···631637 ebus->is_rio = is_rio;632638 ++num_ebus;633639 }640640+ pci_dev_put(pdev); /* XXX for the case, when ebusnd is 0, is it OK? */634641635642#ifdef CONFIG_SUN_AUXIO636643 auxio_probe();
+3-4
drivers/acpi/pci_irq.c
···361361362362 if ((bridge->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS) {363363 /* PC card has the same IRQ as its cardbridge */364364- pci_read_config_byte(bridge, PCI_INTERRUPT_PIN,365365- &bridge_pin);364364+ bridge_pin = bridge->pin;366365 if (!bridge_pin) {367366 ACPI_DEBUG_PRINT((ACPI_DB_INFO,368367 "No interrupt pin configured for device %s\n",···411412 if (!dev)412413 return_VALUE(-EINVAL);413414414414- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);415415+ pin = dev->pin;415416 if (!pin) {416417 ACPI_DEBUG_PRINT((ACPI_DB_INFO,417418 "No interrupt pin configured for device %s\n",···502503 if (!dev || !dev->bus)503504 return_VOID;504505505505- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);506506+ pin = dev->pin;506507 if (!pin)507508 return_VOID;508509 pin--;
···787787788788 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON;789789790790+ /* Enable detection that we turned off at slot power-off time */790791 if (!pciehp_poll_mode)791791- slot_cmd = slot_cmd | HP_INTR_ENABLE; 792792+ slot_cmd = slot_cmd |793793+ PWR_FAULT_DETECT_ENABLE |794794+ MRL_DETECT_ENABLE |795795+ PRSN_DETECT_ENABLE |796796+ HP_INTR_ENABLE;792797793798 retval = pcie_write_cmd(slot, slot_cmd);794799···838833839834 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF;840835836836+ /*837837+ * If we get MRL or presence detect interrupts now, the isr838838+ * will notice the sticky power-fault bit too and issue power839839+ * indicator change commands. This will lead to an endless loop840840+ * of command completions, since the power-fault bit remains on841841+ * till the slot is powered on again.842842+ */841843 if (!pciehp_poll_mode)842842- slot_cmd = slot_cmd | HP_INTR_ENABLE; 844844+ slot_cmd = (slot_cmd &845845+ ~PWR_FAULT_DETECT_ENABLE &846846+ ~MRL_DETECT_ENABLE &847847+ ~PRSN_DETECT_ENABLE) | HP_INTR_ENABLE;843848844849 retval = pcie_write_cmd(slot, slot_cmd);845850
+28-24
drivers/pci/hotplug/pciehp_pci.c
···3434#include "../pci.h"3535#include "pciehp.h"36363737+static int pciehp_add_bridge(struct pci_dev *dev)3838+{3939+ struct pci_bus *parent = dev->bus;4040+ int pass, busnr, start = parent->secondary;4141+ int end = parent->subordinate;4242+4343+ for (busnr = start; busnr <= end; busnr++) {4444+ if (!pci_find_bus(pci_domain_nr(parent), busnr))4545+ break;4646+ }4747+ if (busnr-- > end) {4848+ err("No bus number available for hot-added bridge %s\n",4949+ pci_name(dev));5050+ return -1;5151+ }5252+ for (pass = 0; pass < 2; pass++)5353+ busnr = pci_scan_bridge(parent, dev, busnr, pass);5454+ if (!dev->subordinate)5555+ return -1;5656+ pci_bus_size_bridges(dev->subordinate);5757+ pci_bus_assign_resources(parent);5858+ pci_enable_bridges(parent);5959+ pci_bus_add_devices(parent);6060+ return 0;6161+}37623863int pciehp_configure_device(struct slot *p_slot)3964{···8055 }81568257 for (fn = 0; fn < 8; fn++) {8383- if (!(dev = pci_find_slot(p_slot->bus,8484- PCI_DEVFN(p_slot->device, fn))))5858+ dev = pci_get_slot(parent, PCI_DEVFN(p_slot->device, fn));5959+ if (!dev)8560 continue;8661 if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {8762 err("Cannot hot-add display device %s\n",···9065 }9166 if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||9267 (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)) {9393- /* Find an unused bus number for the new bridge */9494- struct pci_bus *child;9595- unsigned char busnr, start = parent->secondary;9696- unsigned char end = parent->subordinate;9797- for (busnr = start; busnr <= end; busnr++) {9898- if (!pci_find_bus(pci_domain_nr(parent),9999- busnr))100100- break;101101- }102102- if (busnr >= end) {103103- err("No free bus for hot-added bridge\n");104104- continue;105105- }106106- child = pci_add_new_bus(parent, dev, busnr);107107- if (!child) {108108- err("Cannot add new bus for %s\n",109109- pci_name(dev));110110- continue;111111- }112112- child->subordinate = pci_do_scan_bus(child);113113- pci_bus_size_bridges(child);6868+ pciehp_add_bridge(dev);11469 }11570 /* TBD: program firmware provided _HPP values */11671 /* program_fw_provided_values(dev); */···98939994 pci_bus_assign_resources(parent);10095 pci_bus_add_devices(parent);101101- pci_enable_bridges(parent);10296 return 0;10397}10498
+8-5
drivers/pci/hotplug/pciehprm_acpi.c
···174174 acpi_status status;175175 acpi_handle chandle, handle = DEVICE_ACPI_HANDLE(&(dev->dev));176176 struct pci_dev *pdev = dev;177177+ struct pci_bus *parent;177178 u8 *path_name;179179+178180 /*179181 * Per PCI firmware specification, we should run the ACPI _OSC180182 * method to get control of hotplug hardware before using it.···192190 */193191 if (!pdev || !pdev->bus->parent)194192 break;193193+ parent = pdev->bus->parent;195194 dbg("Could not find %s in acpi namespace, trying parent\n",196195 pci_name(pdev));197197- if (!pdev->bus->parent->self)196196+ if (!parent->self)198197 /* Parent must be a host bridge */199198 handle = acpi_get_pci_rootbridge_handle(200200- pci_domain_nr(pdev->bus->parent),201201- pdev->bus->parent->number);199199+ pci_domain_nr(parent),200200+ parent->number);202201 else203202 handle = DEVICE_ACPI_HANDLE(204204- &(pdev->bus->parent->self->dev));205205- pdev = pdev->bus->parent->self;203203+ &(parent->self->dev));204204+ pdev = parent->self;206205 }207206208207 while (handle) {
+3-24
drivers/pci/hotplug/rpadlpar_core.c
···112112 return NULL;113113}114114115115-static void rpadlpar_claim_one_bus(struct pci_bus *b)116116-{117117- struct list_head *ld;118118- struct pci_bus *child_bus;119119-120120- for (ld = b->devices.next; ld != &b->devices; ld = ld->next) {121121- struct pci_dev *dev = pci_dev_b(ld);122122- int i;123123-124124- for (i = 0; i < PCI_NUM_RESOURCES; i++) {125125- struct resource *r = &dev->resource[i];126126-127127- if (r->parent || !r->start || !r->flags)128128- continue;129129- rpaphp_claim_resource(dev, i);130130- }131131- }132132-133133- list_for_each_entry(child_bus, &b->children, node)134134- rpadlpar_claim_one_bus(child_bus);135135-}136136-137115static struct pci_dev *dlpar_find_new_dev(struct pci_bus *parent,138116 struct device_node *dev_dn)139117{···132154 struct pci_controller *phb = pdn->phb;133155 struct pci_dev *dev = NULL;134156135135- rpaphp_eeh_init_nodes(dn);157157+ eeh_add_device_tree_early(dn);158158+136159 /* Add EADS device to PHB bus, adding new entry to bus->devices */137160 dev = of_create_pci_dev(dn, phb->bus, pdn->devfn);138161 if (!dev) {···149170 rpaphp_init_new_devs(dev->subordinate);150171151172 /* Claim new bus resources */152152- rpadlpar_claim_one_bus(dev->bus);173173+ pcibios_claim_one_bus(dev->bus);153174154175 /* ioremap() for child bus, which may or may not succeed */155176 (void) remap_bus_range(dev->bus);
+7-40
drivers/pci/hotplug/rpaphp_pci.c
···6262}6363EXPORT_SYMBOL_GPL(rpaphp_find_pci_bus);64646565-int rpaphp_claim_resource(struct pci_dev *dev, int resource)6666-{6767- struct resource *res = &dev->resource[resource];6868- struct resource *root = pci_find_parent_resource(dev, res);6969- char *dtype = resource < PCI_BRIDGE_RESOURCES ? "device" : "bridge";7070- int err = -EINVAL;7171-7272- if (root != NULL) {7373- err = request_resource(root, res);7474- }7575-7676- if (err) {7777- err("PCI: %s region %d of %s %s [%lx:%lx]\n",7878- root ? "Address space collision on" :7979- "No parent found for",8080- resource, dtype, pci_name(dev), res->start, res->end);8181- }8282- return err;8383-}8484-8585-EXPORT_SYMBOL_GPL(rpaphp_claim_resource);8686-8765static int rpaphp_get_sensor_state(struct slot *slot, int *state)8866{8967 int rc;···155177156178 if (r->parent || !r->start || !r->flags)157179 continue;158158- rpaphp_claim_resource(dev, i);180180+ pci_claim_resource(dev, i);159181 }160182 }161183 }···265287 return dev;266288}267289268268-void rpaphp_eeh_init_nodes(struct device_node *dn)269269-{270270- struct device_node *sib;271271-272272- for (sib = dn->child; sib; sib = sib->sibling) 273273- rpaphp_eeh_init_nodes(sib);274274- eeh_add_device_early(dn);275275- return;276276-277277-}278278-EXPORT_SYMBOL_GPL(rpaphp_eeh_init_nodes);279279-280290static void print_slot_pci_funcs(struct pci_bus *bus)281291{282292 struct device_node *dn;···290324 if (!dn)291325 goto exit;292326293293- rpaphp_eeh_init_nodes(dn);327327+ eeh_add_device_tree_early(dn);294328 dev = rpaphp_pci_config_slot(bus);295329 if (!dev) {296330 err("%s: can't find any devices.\n", __FUNCTION__);···336370337371static int setup_pci_hotplug_slot_info(struct slot *slot)338372{373373+ struct hotplug_slot_info *hotplug_slot_info = slot->hotplug_slot->info;374374+339375 dbg("%s Initilize the PCI slot's hotplug->info structure ...\n",340376 __FUNCTION__);341341- rpaphp_get_power_status(slot, &slot->hotplug_slot->info->power_status);377377+ rpaphp_get_power_status(slot, &hotplug_slot_info->power_status);342378 rpaphp_get_pci_adapter_status(slot, 1,343343- &slot->hotplug_slot->info->344344- adapter_status);345345- if (slot->hotplug_slot->info->adapter_status == NOT_VALID) {379379+ &hotplug_slot_info->adapter_status);380380+ if (hotplug_slot_info->adapter_status == NOT_VALID) {346381 err("%s: NOT_VALID: skip dn->full_name=%s\n",347382 __FUNCTION__, slot->dn->full_name);348383 return -EINVAL;
+4
drivers/pci/hotplug/shpchp.h
···9898 enum pci_bus_speed speed;9999 u32 first_slot; /* First physical slot number */100100 u8 slot_bus; /* Bus where the slots handled by this controller sit */101101+ u32 cap_offset;102102+ unsigned long mmio_base;103103+ unsigned long mmio_size;104104+ volatile int cmd_busy;101105};102106103107struct hotplug_params {
···248248 up(&ctrl->crit_sect);249249 return WRONG_BUS_FREQUENCY;250250 }251251- wait_for_ctrl_irq (ctrl);252251253252 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) {254253 err("%s: Can't set bus speed/mode in the case of adapter & bus mismatch\n",···329330 up(&ctrl->crit_sect);330331 return -1;331332 }332332-333333- /* Wait for the command to complete */334334- wait_for_ctrl_irq (ctrl);335333336334 rc = p_slot->hpc_ops->check_cmd_status(ctrl);337335 if (rc) {···348352 up(&ctrl->crit_sect);349353 return WRONG_BUS_FREQUENCY;350354 }351351- wait_for_ctrl_irq (ctrl);352355353356 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) {354357 err("%s: Can't set bus speed/mode in the case of adapter & bus mismatch\n",···362367 up(&ctrl->crit_sect);363368 return rc;364369 }365365- wait_for_ctrl_irq (ctrl);366370367371 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) {368372 err("%s: Failed to enable slot, error code(%d)\n", __FUNCTION__, rc);···488494 up(&ctrl->crit_sect);489495 return rc;490496 }491491- wait_for_ctrl_irq (ctrl);492497493498 if ((rc = p_slot->hpc_ops->check_cmd_status(ctrl))) {494499 err("%s: Failed to enable slot, error code(%d)\n", __FUNCTION__, rc);···525532526533 p_slot->hpc_ops->green_led_on(p_slot);527534528528- /* Wait for the command to complete */529529- wait_for_ctrl_irq (ctrl);530530-531535 /* Done with exclusive hardware access */532536 up(&ctrl->crit_sect);533537···542552 up(&ctrl->crit_sect);543553 return rc;544554 }545545- /* Wait for the command to complete */546546- wait_for_ctrl_irq (ctrl);547555548556 rc = p_slot->hpc_ops->check_cmd_status(ctrl);549557 if (rc) {···591603 up(&ctrl->crit_sect);592604 return rc;593605 }594594- /* Wait for the command to complete */595595- wait_for_ctrl_irq (ctrl);596606597607 rc = p_slot->hpc_ops->check_cmd_status(ctrl);598608 if (rc) {···607621 up(&ctrl->crit_sect);608622 return rc;609623 }610610- /* Wait for the command to complete */611611- wait_for_ctrl_irq (ctrl);612624613625 /* Done with exclusive hardware access */614626 up(&ctrl->crit_sect);···659675 down(&p_slot->ctrl->crit_sect);660676661677 p_slot->hpc_ops->green_led_off(p_slot);662662-663663- /* Wait for the command to complete */664664- wait_for_ctrl_irq (p_slot->ctrl);665678666679 /* Done with exclusive hardware access */667680 up(&p_slot->ctrl->crit_sect);···771790 down(&ctrl->crit_sect);772791773792 p_slot->hpc_ops->green_led_on(p_slot);774774- /* Wait for the command to complete */775775- wait_for_ctrl_irq (ctrl);776793777794 p_slot->hpc_ops->set_attention_status(p_slot, 0);778778-779779- /* Wait for the command to complete */780780- wait_for_ctrl_irq (ctrl);781795782796 /* Done with exclusive hardware access */783797 up(&ctrl->crit_sect);···782806 down(&ctrl->crit_sect);783807784808 p_slot->hpc_ops->green_led_off(p_slot);785785- /* Wait for the command to complete */786786- wait_for_ctrl_irq (ctrl);787809788810 p_slot->hpc_ops->set_attention_status(p_slot, 0);789789- /* Wait for the command to complete */790790- wait_for_ctrl_irq (ctrl);791811792812 /* Done with exclusive hardware access */793813 up(&ctrl->crit_sect);···817845818846 /* blink green LED and turn off amber */819847 p_slot->hpc_ops->green_led_blink(p_slot);820820- /* Wait for the command to complete */821821- wait_for_ctrl_irq (ctrl);822848823849 p_slot->hpc_ops->set_attention_status(p_slot, 0);824824-825825- /* Wait for the command to complete */826826- wait_for_ctrl_irq (ctrl);827850828851 /* Done with exclusive hardware access */829852 up(&ctrl->crit_sect);···837870 down(&ctrl->crit_sect);838871839872 p_slot->hpc_ops->set_attention_status(p_slot, 1);840840- /* Wait for the command to complete */841841- wait_for_ctrl_irq (ctrl);842873843874 p_slot->hpc_ops->green_led_off(p_slot);844844- /* Wait for the command to complete */845845- wait_for_ctrl_irq (ctrl);846875847876 /* Done with exclusive hardware access */848877 up(&ctrl->crit_sect);
+94-50
drivers/pci/hotplug/shpchp_hpc.c
···275275 return;276276}277277278278+static inline int shpc_wait_cmd(struct controller *ctrl)279279+{280280+ int retval = 0;281281+ unsigned int timeout_msec = shpchp_poll_mode ? 2000 : 1000;282282+ unsigned long timeout = msecs_to_jiffies(timeout_msec);283283+ int rc = wait_event_interruptible_timeout(ctrl->queue,284284+ !ctrl->cmd_busy, timeout);285285+ if (!rc) {286286+ retval = -EIO;287287+ err("Command not completed in %d msec\n", timeout_msec);288288+ } else if (rc < 0) {289289+ retval = -EINTR;290290+ info("Command was interrupted by a signal\n");291291+ }292292+ ctrl->cmd_busy = 0;293293+294294+ return retval;295295+}296296+278297static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd)279298{280299 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;···333314 /* To make sure the Controller Busy bit is 0 before we send out the334315 * command. 335316 */317317+ slot->ctrl->cmd_busy = 1;336318 writew(temp_word, php_ctlr->creg + CMD);319319+320320+ /*321321+ * Wait for command completion.322322+ */323323+ retval = shpc_wait_cmd(slot->ctrl);337324338325 DBG_LEAVE_ROUTINE 339326 return retval;···629604 sec_bus_status = readw(php_ctlr->creg + SEC_BUS_CONFIG);630605631606 if (pi == 2) {632632- *mode = (sec_bus_status & 0x0100) >> 7;607607+ *mode = (sec_bus_status & 0x0100) >> 8;633608 } else {634609 retval = -1;635610 }···816791 }817792 if (php_ctlr->pci_dev) {818793 iounmap(php_ctlr->creg);819819- release_mem_region(pci_resource_start(php_ctlr->pci_dev, 0), pci_resource_len(php_ctlr->pci_dev, 0));794794+ release_mem_region(ctrl->mmio_base, ctrl->mmio_size);820795 php_ctlr->pci_dev = NULL;821796 }822797···10831058 if (intr_loc & 0x0001) {10841059 /* 10851060 * Command Complete Interrupt Pending 10861086- * RO only - clear by writing 0 to the Command Completion10611061+ * RO only - clear by writing 1 to the Command Completion10871062 * Detect bit in Controller SERR-INT register10881063 */10891064 temp_dword = readl(php_ctlr->creg + SERR_INTR_ENABLE);10901090- temp_dword &= 0xfffeffff;10651065+ temp_dword &= 0xfffdffff;10911066 writel(temp_dword, php_ctlr->creg + SERR_INTR_ENABLE);10671067+ ctrl->cmd_busy = 0;10921068 wake_up_interruptible(&ctrl->queue);10931069 }10941070···11471121 int retval = 0;11481122 u8 pi;11491123 u32 slot_avail1, slot_avail2;11501150- int slot_num;1151112411521125 DBG_ENTER_ROUTINE 11531126···11651140 slot_avail2 = readl(php_ctlr->creg + SLOT_AVAIL2);1166114111671142 if (pi == 2) {11681168- if ((slot_num = ((slot_avail2 & SLOT_133MHZ_PCIX_533) >> 27) ) != 0 )11431143+ if (slot_avail2 & SLOT_133MHZ_PCIX_533)11691144 bus_speed = PCIX_133MHZ_533;11701170- else if ((slot_num = ((slot_avail2 & SLOT_100MHZ_PCIX_533) >> 23) ) != 0 )11451145+ else if (slot_avail2 & SLOT_100MHZ_PCIX_533)11711146 bus_speed = PCIX_100MHZ_533;11721172- else if ((slot_num = ((slot_avail2 & SLOT_66MHZ_PCIX_533) >> 19) ) != 0 )11471147+ else if (slot_avail2 & SLOT_66MHZ_PCIX_533)11731148 bus_speed = PCIX_66MHZ_533;11741174- else if ((slot_num = ((slot_avail2 & SLOT_133MHZ_PCIX_266) >> 15) ) != 0 )11491149+ else if (slot_avail2 & SLOT_133MHZ_PCIX_266)11751150 bus_speed = PCIX_133MHZ_266;11761176- else if ((slot_num = ((slot_avail2 & SLOT_100MHZ_PCIX_266) >> 11) ) != 0 )11511151+ else if (slot_avail2 & SLOT_100MHZ_PCIX_266)11771152 bus_speed = PCIX_100MHZ_266;11781178- else if ((slot_num = ((slot_avail2 & SLOT_66MHZ_PCIX_266) >> 7) ) != 0 )11531153+ else if (slot_avail2 & SLOT_66MHZ_PCIX_266)11791154 bus_speed = PCIX_66MHZ_266;11801180- else if ((slot_num = ((slot_avail1 & SLOT_133MHZ_PCIX) >> 23) ) != 0 )11551155+ else if (slot_avail1 & SLOT_133MHZ_PCIX)11811156 bus_speed = PCIX_133MHZ;11821182- else if ((slot_num = ((slot_avail1 & SLOT_100MHZ_PCIX) >> 15) ) != 0 )11571157+ else if (slot_avail1 & SLOT_100MHZ_PCIX)11831158 bus_speed = PCIX_100MHZ;11841184- else if ((slot_num = ((slot_avail1 & SLOT_66MHZ_PCIX) >> 7) ) != 0 )11591159+ else if (slot_avail1 & SLOT_66MHZ_PCIX)11851160 bus_speed = PCIX_66MHZ;11861186- else if ((slot_num = (slot_avail2 & SLOT_66MHZ)) != 0 )11611161+ else if (slot_avail2 & SLOT_66MHZ)11871162 bus_speed = PCI_66MHZ;11881188- else if ((slot_num = (slot_avail1 & SLOT_33MHZ)) != 0 )11631163+ else if (slot_avail1 & SLOT_33MHZ)11891164 bus_speed = PCI_33MHZ;11901165 else bus_speed = PCI_SPEED_UNKNOWN;11911166 } else {11921192- if ((slot_num = ((slot_avail1 & SLOT_133MHZ_PCIX) >> 23) ) != 0 )11671167+ if (slot_avail1 & SLOT_133MHZ_PCIX)11931168 bus_speed = PCIX_133MHZ;11941194- else if ((slot_num = ((slot_avail1 & SLOT_100MHZ_PCIX) >> 15) ) != 0 )11691169+ else if (slot_avail1 & SLOT_100MHZ_PCIX)11951170 bus_speed = PCIX_100MHZ;11961196- else if ((slot_num = ((slot_avail1 & SLOT_66MHZ_PCIX) >> 7) ) != 0 )11711171+ else if (slot_avail1 & SLOT_66MHZ_PCIX)11971172 bus_speed = PCIX_66MHZ;11981198- else if ((slot_num = (slot_avail2 & SLOT_66MHZ)) != 0 )11731173+ else if (slot_avail2 & SLOT_66MHZ)11991174 bus_speed = PCI_66MHZ;12001200- else if ((slot_num = (slot_avail1 & SLOT_33MHZ)) != 0 )11751175+ else if (slot_avail1 & SLOT_33MHZ)12011176 bus_speed = PCI_33MHZ;12021177 else bus_speed = PCI_SPEED_UNKNOWN;12031178 }···13461321 .check_cmd_status = hpc_check_cmd_status,13471322};1348132313241324+inline static int shpc_indirect_creg_read(struct controller *ctrl, int index,13251325+ u32 *value)13261326+{13271327+ int rc;13281328+ u32 cap_offset = ctrl->cap_offset;13291329+ struct pci_dev *pdev = ctrl->pci_dev;13301330+13311331+ rc = pci_write_config_byte(pdev, cap_offset + DWORD_SELECT, index);13321332+ if (rc)13331333+ return rc;13341334+ return pci_read_config_dword(pdev, cap_offset + DWORD_DATA, value);13351335+}13361336+13491337int shpc_init(struct controller * ctrl, struct pci_dev * pdev)13501338{13511339 struct php_ctlr_state_s *php_ctlr, *p;13521340 void *instance_id = ctrl;13531353- int rc;13411341+ int rc, num_slots = 0;13541342 u8 hp_slot;13551343 static int first = 1;13561356- u32 shpc_cap_offset, shpc_base_offset;13441344+ u32 shpc_base_offset;13571345 u32 tempdword, slot_reg;13581346 u8 i;1359134713601348 DBG_ENTER_ROUTINE13491349+13501350+ ctrl->pci_dev = pdev; /* pci_dev of the P2P bridge */1361135113621352 spin_lock_init(&list_lock);13631353 php_ctlr = (struct php_ctlr_state_s *) kmalloc(sizeof(struct php_ctlr_state_s), GFP_KERNEL);···1388134813891349 if ((pdev->vendor == PCI_VENDOR_ID_AMD) || (pdev->device ==13901350 PCI_DEVICE_ID_AMD_GOLAM_7450)) {13911391- shpc_base_offset = 0; /* amd shpc driver doesn't use this; assume 0 */13511351+ /* amd shpc driver doesn't use Base Offset; assume 0 */13521352+ ctrl->mmio_base = pci_resource_start(pdev, 0);13531353+ ctrl->mmio_size = pci_resource_len(pdev, 0);13921354 } else {13931393- if ((shpc_cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC)) == 0) {13941394- err("%s : shpc_cap_offset == 0\n", __FUNCTION__);13551355+ ctrl->cap_offset = pci_find_capability(pdev, PCI_CAP_ID_SHPC);13561356+ if (!ctrl->cap_offset) {13571357+ err("%s : cap_offset == 0\n", __FUNCTION__);13951358 goto abort_free_ctlr;13961359 }13971397- dbg("%s: shpc_cap_offset = %x\n", __FUNCTION__, shpc_cap_offset); 13981398-13991399- rc = pci_write_config_byte(pdev, (u8)shpc_cap_offset + DWORD_SELECT , BASE_OFFSET);13601360+ dbg("%s: cap_offset = %x\n", __FUNCTION__, ctrl->cap_offset);13611361+13621362+ rc = shpc_indirect_creg_read(ctrl, 0, &shpc_base_offset);14001363 if (rc) {14011401- err("%s : pci_word_config_byte failed\n", __FUNCTION__);14021402- goto abort_free_ctlr;14031403- }14041404-14051405- rc = pci_read_config_dword(pdev, (u8)shpc_cap_offset + DWORD_DATA, &shpc_base_offset);14061406- if (rc) {14071407- err("%s : pci_read_config_dword failed\n", __FUNCTION__);13641364+ err("%s: cannot read base_offset\n", __FUNCTION__);14081365 goto abort_free_ctlr;14091366 }1410136714111411- for (i = 0; i <= 14; i++) {14121412- rc = pci_write_config_byte(pdev, (u8)shpc_cap_offset + DWORD_SELECT , i);13681368+ rc = shpc_indirect_creg_read(ctrl, 3, &tempdword);13691369+ if (rc) {13701370+ err("%s: cannot read slot config\n", __FUNCTION__);13711371+ goto abort_free_ctlr;13721372+ }13731373+ num_slots = tempdword & SLOT_NUM;13741374+ dbg("%s: num_slots (indirect) %x\n", __FUNCTION__, num_slots);13751375+13761376+ for (i = 0; i < 9 + num_slots; i++) {13771377+ rc = shpc_indirect_creg_read(ctrl, i, &tempdword);14131378 if (rc) {14141414- err("%s : pci_word_config_byte failed\n", __FUNCTION__);14151415- goto abort_free_ctlr;14161416- }14171417-14181418- rc = pci_read_config_dword(pdev, (u8)shpc_cap_offset + DWORD_DATA, &tempdword);14191419- if (rc) {14201420- err("%s : pci_read_config_dword failed\n", __FUNCTION__);13791379+ err("%s: cannot read creg (index = %d)\n",13801380+ __FUNCTION__, i);14211381 goto abort_free_ctlr;14221382 }14231383 dbg("%s: offset %d: value %x\n", __FUNCTION__,i,14241384 tempdword);14251385 }13861386+13871387+ ctrl->mmio_base =13881388+ pci_resource_start(pdev, 0) + shpc_base_offset;13891389+ ctrl->mmio_size = 0x24 + 0x4 * num_slots;14261390 }1427139114281392 if (first) {···14401396 if (pci_enable_device(pdev))14411397 goto abort_free_ctlr;1442139814431443- if (!request_mem_region(pci_resource_start(pdev, 0) + shpc_base_offset, pci_resource_len(pdev, 0), MY_NAME)) {13991399+ if (!request_mem_region(ctrl->mmio_base, ctrl->mmio_size, MY_NAME)) {14441400 err("%s: cannot reserve MMIO region\n", __FUNCTION__);14451401 goto abort_free_ctlr;14461402 }1447140314481448- php_ctlr->creg = ioremap(pci_resource_start(pdev, 0) + shpc_base_offset, pci_resource_len(pdev, 0));14041404+ php_ctlr->creg = ioremap(ctrl->mmio_base, ctrl->mmio_size);14491405 if (!php_ctlr->creg) {14501450- err("%s: cannot remap MMIO region %lx @ %lx\n", __FUNCTION__, pci_resource_len(pdev, 0), 14511451- pci_resource_start(pdev, 0) + shpc_base_offset);14521452- release_mem_region(pci_resource_start(pdev, 0) + shpc_base_offset, pci_resource_len(pdev, 0));14061406+ err("%s: cannot remap MMIO region %lx @ %lx\n", __FUNCTION__,14071407+ ctrl->mmio_size, ctrl->mmio_base);14081408+ release_mem_region(ctrl->mmio_base, ctrl->mmio_size);14531409 goto abort_free_ctlr;14541410 }14551411 dbg("%s: php_ctlr->creg %p\n", __FUNCTION__, php_ctlr->creg);
+14-5
drivers/pci/hotplug/shpchp_pci.c
···8989 struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate;9090 int num, fn;91919292- dev = pci_find_slot(p_slot->bus, PCI_DEVFN(p_slot->device, 0));9292+ dev = pci_get_slot(parent, PCI_DEVFN(p_slot->device, 0));9393 if (dev) {9494 err("Device %s already exists at %x:%x, cannot hot-add\n",9595 pci_name(dev), p_slot->bus, p_slot->device);9696+ pci_dev_put(dev);9697 return -EINVAL;9798 }9899···104103 }105104106105 for (fn = 0; fn < 8; fn++) {107107- if (!(dev = pci_find_slot(p_slot->bus,108108- PCI_DEVFN(p_slot->device, fn))))106106+ dev = pci_get_slot(parent, PCI_DEVFN(p_slot->device, fn));107107+ if (!dev)109108 continue;110109 if ((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) {111110 err("Cannot hot-add display device %s\n",112111 pci_name(dev));112112+ pci_dev_put(dev);113113 continue;114114 }115115 if ((dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) ||···126124 }127125 if (busnr >= end) {128126 err("No free bus for hot-added bridge\n");127127+ pci_dev_put(dev);129128 continue;130129 }131130 child = pci_add_new_bus(parent, dev, busnr);132131 if (!child) {133132 err("Cannot add new bus for %s\n",134133 pci_name(dev));134134+ pci_dev_put(dev);135135 continue;136136 }137137 child->subordinate = pci_do_scan_bus(child);138138 pci_bus_size_bridges(child);139139 }140140 program_fw_provided_values(dev);141141+ pci_dev_put(dev);141142 }142143143144 pci_bus_assign_resources(parent);···154149 int rc = 0;155150 int j;156151 u8 bctl = 0;157157-152152+ struct pci_bus *parent = p_slot->ctrl->pci_dev->subordinate;153153+158154 dbg("%s: bus/dev = %x/%x\n", __FUNCTION__, p_slot->bus, p_slot->device);159155160156 for (j=0; j<8 ; j++) {161161- struct pci_dev* temp = pci_find_slot(p_slot->bus,157157+ struct pci_dev* temp = pci_get_slot(parent,162158 (p_slot->device << 3) | j);163159 if (!temp)164160 continue;165161 if ((temp->class >> 16) == PCI_BASE_CLASS_DISPLAY) {166162 err("Cannot remove display device %s\n",167163 pci_name(temp));164164+ pci_dev_put(temp);168165 continue;169166 }170167 if (temp->hdr_type == PCI_HEADER_TYPE_BRIDGE) {···174167 if (bctl & PCI_BRIDGE_CTL_VGA) {175168 err("Cannot remove display device %s\n",176169 pci_name(temp));170170+ pci_dev_put(temp);177171 continue;178172 }179173 }180174 pci_remove_bus_device(temp);175175+ pci_dev_put(temp);181176 }182177 return rc;183178}
+4-3
drivers/pci/pci.c
···1919#include <asm/dma.h> /* isa_dma_bridge_buggy */2020#include "pci.h"21212222+#if 022232324/**2425 * pci_bus_max_busnr - returns maximum PCI bus number of given bus' children···6362 }6463 return max;6564}6565+6666+#endif /* 0 */66676768static int __pci_find_next_cap(struct pci_bus *bus, unsigned int devfn, u8 pos, int cap)6869{···590587{591588 u8 pin;592589593593- pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);590590+ pin = dev->pin;594591 if (!pin)595592 return -1;596593 pin--;···920917EXPORT_SYMBOL(pci_enable_device_bars);921918EXPORT_SYMBOL(pci_enable_device);922919EXPORT_SYMBOL(pci_disable_device);923923-EXPORT_SYMBOL(pci_max_busnr);924924-EXPORT_SYMBOL(pci_bus_max_busnr);925920EXPORT_SYMBOL(pci_find_capability);926921EXPORT_SYMBOL(pci_bus_find_capability);927922EXPORT_SYMBOL(pci_release_regions);
-5
drivers/pci/pci.h
···2626#ifdef CONFIG_PROC_FS2727extern int pci_proc_attach_device(struct pci_dev *dev);2828extern int pci_proc_detach_device(struct pci_dev *dev);2929-extern int pci_proc_attach_bus(struct pci_bus *bus);3029extern int pci_proc_detach_bus(struct pci_bus *bus);3130#else3231static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }3332static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }3434-static inline int pci_proc_attach_bus(struct pci_bus *bus) { return 0; }3533static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }3634#endif37353836/* Functions for PCI Hotplug drivers to use */3937extern unsigned int pci_do_scan_bus(struct pci_bus *bus);4040-extern int pci_remove_device_safe(struct pci_dev *dev);4141-extern unsigned char pci_max_busnr(void);4242-extern unsigned char pci_bus_max_busnr(struct pci_bus *bus);4338extern int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);44394540extern void pci_remove_legacy_files(struct pci_bus *bus);
···4848 * in question is not being used by a driver.4949 * Returns 0 on success.5050 */5151+#if 05152int pci_remove_device_safe(struct pci_dev *dev)5253{5354 if (pci_dev_driver(dev))···5655 pci_destroy_dev(dev);5756 return 0;5857}5959-EXPORT_SYMBOL(pci_remove_device_safe);5858+#endif /* 0 */60596160void pci_remove_bus(struct pci_bus *pci_bus)6261{
···7878#define PCI_UNKNOWN ((pci_power_t __force) 5)7979#define PCI_POWER_ERROR ((pci_power_t __force) -1)80808181+/** The pci_channel state describes connectivity between the CPU and8282+ * the pci device. If some PCI bus between here and the pci device8383+ * has crashed or locked up, this info is reflected here.8484+ */8585+typedef unsigned int __bitwise pci_channel_state_t;8686+8787+enum pci_channel_state {8888+ /* I/O channel is in normal state */8989+ pci_channel_io_normal = (__force pci_channel_state_t) 1,9090+9191+ /* I/O to channel is blocked */9292+ pci_channel_io_frozen = (__force pci_channel_state_t) 2,9393+9494+ /* PCI card is dead */9595+ pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,9696+};9797+8198/*8299 * The pci_dev structure is used to describe PCI devices.83100 */···11598 unsigned int class; /* 3 bytes: (base,sub,prog-if) */11699 u8 hdr_type; /* PCI header type (`multi' flag masked out) */117100 u8 rom_base_reg; /* which config register controls the ROM */101101+ u8 pin; /* which interrupt pin this device uses */118102119103 struct pci_driver *driver; /* which driver has allocated this device */120104 u64 dma_mask; /* Mask of the bits of bus address this···128110 this is D0-D3, D0 being fully functional,129111 and D3 being off. */130112113113+ pci_channel_state_t error_state; /* current connectivity state */131114 struct device dev; /* Generic device interface */132115133116 /* device is compatible with these IDs */···251232 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */252233};253234235235+/* ---------------------------------------------------------------- */236236+/** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides237237+ * a set fof callbacks in struct pci_error_handlers, then that device driver238238+ * will be notified of PCI bus errors, and will be driven to recovery239239+ * when an error occurs.240240+ */241241+242242+typedef unsigned int __bitwise pci_ers_result_t;243243+244244+enum pci_ers_result {245245+ /* no result/none/not supported in device driver */246246+ PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,247247+248248+ /* Device driver can recover without slot reset */249249+ PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,250250+251251+ /* Device driver wants slot to be reset. */252252+ PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,253253+254254+ /* Device has completely failed, is unrecoverable */255255+ PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,256256+257257+ /* Device driver is fully recovered and operational */258258+ PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,259259+};260260+261261+/* PCI bus error event callbacks */262262+struct pci_error_handlers263263+{264264+ /* PCI bus error detected on this device */265265+ pci_ers_result_t (*error_detected)(struct pci_dev *dev,266266+ enum pci_channel_state error);267267+268268+ /* MMIO has been re-enabled, but not DMA */269269+ pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);270270+271271+ /* PCI Express link has been reset */272272+ pci_ers_result_t (*link_reset)(struct pci_dev *dev);273273+274274+ /* PCI slot has been reset */275275+ pci_ers_result_t (*slot_reset)(struct pci_dev *dev);276276+277277+ /* Device driver may resume normal operations */278278+ void (*resume)(struct pci_dev *dev);279279+};280280+281281+/* ---------------------------------------------------------------- */282282+254283struct module;255284struct pci_driver {256285 struct list_head node;···311244 int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */312245 void (*shutdown) (struct pci_dev *dev);313246247247+ struct pci_error_handlers *err_handler;314248 struct device_driver driver;315249 struct pci_dynids dynids;316250};···516448517449void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),518450 void *userdata);451451+int pci_cfg_space_size(struct pci_dev *dev);519452520453/* kmem_cache style wrapper around pci_alloc_consistent() */521454
+1-1
sound/oss/ad1889.c
···1089108910901090static int __init ad1889_init_module(void)10911091{10921092- return pci_module_init(&ad1889_driver);10921092+ return pci_register_driver(&ad1889_driver);10931093}1094109410951095static void ad1889_exit_module(void)
+1-1
sound/oss/btaudio.c
···11011101 digital ? "digital" : "",11021102 analog && digital ? "+" : "",11031103 analog ? "analog" : "");11041104- return pci_module_init(&btaudio_pci_driver);11041104+ return pci_register_driver(&btaudio_pci_driver);11051105}1106110611071107static void btaudio_cleanup_module(void)
+1-1
sound/oss/cmpci.c
···33663366static int __init init_cmpci(void)33673367{33683368 printk(KERN_INFO "cmpci: version $Revision: 6.82 $ time " __TIME__ " " __DATE__ "\n");33693369- return pci_module_init(&cm_driver);33693369+ return pci_register_driver(&cm_driver);33703370}3371337133723372static void __exit cleanup_cmpci(void)