Merge tag 'staging-6.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging driver fixes from Greg KH:
"Here are some small staging driver fixes that resolve some reported
issues and have been in my tree for too long due to the holiday break.
They resolve the following issues:

- lots of gpib build-time fixes as reported by testers and 0-day

- gpib logical fixes

- mailmap fix

All of these have been in linux-next for a while, with no reported
issues other than the duplicated change"

* tag 'staging-6.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
staging: gpib: mite: remove unused global functions
staging: gpib: refer to correct config symbol in tnt4882 Makefile
mailmap: update Bingwu Zhang's email address
staging: gpib: fix address space mixup
staging: gpib: use ioport_map
staging: gpib: fix pcmcia dependencies
staging: gpib: add module author and description fields
staging: gpib: fix Makefiles
staging: gpib: make global 'usec_diff' functions static
staging: gpib: Modify mismatched function name
staging: gpib: Add lower bound check for secondary address
staging: gpib: Fix erroneous removal of blank before newline

+2
.mailmap
··· 121 Benjamin Poirier <benjamin.poirier@gmail.com> <bpoirier@suse.de> 122 Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@gmail.com> 123 Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@redhat.com> 124 Bjorn Andersson <andersson@kernel.org> <bjorn@kryo.se> 125 Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@linaro.org> 126 Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com>
··· 121 Benjamin Poirier <benjamin.poirier@gmail.com> <bpoirier@suse.de> 122 Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@gmail.com> 123 Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@redhat.com> 124 + Bingwu Zhang <xtex@aosc.io> <xtexchooser@duck.com> 125 + Bingwu Zhang <xtex@aosc.io> <xtex@xtexx.eu.org> 126 Bjorn Andersson <andersson@kernel.org> <bjorn@kryo.se> 127 Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@linaro.org> 128 Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com>
+6 -2
drivers/staging/gpib/Kconfig
··· 65 depends on ISA_BUS || PCI || PCMCIA 66 depends on HAS_IOPORT 67 depends on !X86_PAE 68 select GPIB_COMMON 69 select GPIB_NEC7210 70 help ··· 91 depends on HAS_IOPORT 92 depends on ISA_BUS || PCI || PCMCIA 93 depends on !X86_PAE 94 select GPIB_COMMON 95 select GPIB_NEC7210 96 help ··· 180 config GPIB_INES 181 tristate "INES" 182 depends on PCI || ISA_BUS || PCMCIA 183 depends on HAS_IOPORT 184 depends on !X86_PAE 185 select GPIB_COMMON ··· 203 called cb7210. 204 205 config GPIB_PCMCIA 206 - bool "PCMCIA/Cardbus support for NI MC and Ines boards" 207 - depends on PCCARD && (GPIB_NI_PCI_ISA || GPIB_CB7210 || GPIB_INES) 208 help 209 Enable PCMCIA/CArdbus support for National Instruments, 210 measurement computing boards and Ines boards.
··· 65 depends on ISA_BUS || PCI || PCMCIA 66 depends on HAS_IOPORT 67 depends on !X86_PAE 68 + depends on PCMCIA || !PCMCIA 69 + depends on HAS_IOPORT_MAP 70 select GPIB_COMMON 71 select GPIB_NEC7210 72 help ··· 89 depends on HAS_IOPORT 90 depends on ISA_BUS || PCI || PCMCIA 91 depends on !X86_PAE 92 + depends on PCMCIA || !PCMCIA 93 select GPIB_COMMON 94 select GPIB_NEC7210 95 help ··· 177 config GPIB_INES 178 tristate "INES" 179 depends on PCI || ISA_BUS || PCMCIA 180 + depends on PCMCIA || !PCMCIA 181 depends on HAS_IOPORT 182 depends on !X86_PAE 183 select GPIB_COMMON ··· 199 called cb7210. 200 201 config GPIB_PCMCIA 202 + def_bool y 203 + depends on PCMCIA && (GPIB_NI_PCI_ISA || GPIB_CB7210 || GPIB_INES) 204 help 205 Enable PCMCIA/CArdbus support for National Instruments, 206 measurement computing boards and Ines boards.
+1 -1
drivers/staging/gpib/agilent_82350b/Makefile
··· 1 2 - obj-m += agilent_82350b.o
··· 1 2 + obj-$(CONFIG_GPIB_AGILENT_82350B) += agilent_82350b.o
+2 -2
drivers/staging/gpib/agilent_82350b/agilent_82350b.c
··· 700 GPIB_82350A_REGION)); 701 dev_dbg(board->gpib_dev, "%s: gpib base address remapped to 0x%p\n", 702 driver_name, a_priv->gpib_base); 703 - tms_priv->iobase = a_priv->gpib_base + TMS9914_BASE_REG; 704 a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device, 705 SRAM_82350A_REGION), 706 pci_resource_len(a_priv->pci_device, ··· 724 pci_resource_len(a_priv->pci_device, GPIB_REGION)); 725 dev_dbg(board->gpib_dev, "%s: gpib base address remapped to 0x%p\n", 726 driver_name, a_priv->gpib_base); 727 - tms_priv->iobase = a_priv->gpib_base + TMS9914_BASE_REG; 728 a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device, SRAM_REGION), 729 pci_resource_len(a_priv->pci_device, SRAM_REGION)); 730 dev_dbg(board->gpib_dev, "%s: sram base address remapped to 0x%p\n",
··· 700 GPIB_82350A_REGION)); 701 dev_dbg(board->gpib_dev, "%s: gpib base address remapped to 0x%p\n", 702 driver_name, a_priv->gpib_base); 703 + tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG; 704 a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device, 705 SRAM_82350A_REGION), 706 pci_resource_len(a_priv->pci_device, ··· 724 pci_resource_len(a_priv->pci_device, GPIB_REGION)); 725 dev_dbg(board->gpib_dev, "%s: gpib base address remapped to 0x%p\n", 726 driver_name, a_priv->gpib_base); 727 + tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG; 728 a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device, SRAM_REGION), 729 pci_resource_len(a_priv->pci_device, SRAM_REGION)); 730 dev_dbg(board->gpib_dev, "%s: sram base address remapped to 0x%p\n",
+1 -1
drivers/staging/gpib/agilent_82357a/Makefile
··· 1 2 - obj-m += agilent_82357a.o 3 4
··· 1 2 + obj-$(CONFIG_GPIB_AGILENT_82357A) += agilent_82357a.o 3 4
+1 -1
drivers/staging/gpib/cb7210/Makefile
··· 1 ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA 2 - obj-m += cb7210.o 3 4
··· 1 ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA 2 + obj-$(CONFIG_GPIB_CB7210) += cb7210.o 3 4
+6 -6
drivers/staging/gpib/cb7210/cb7210.c
··· 971 switch (cb_priv->pci_chip) { 972 case PCI_CHIP_AMCC_S5933: 973 cb_priv->amcc_iobase = pci_resource_start(cb_priv->pci_device, 0); 974 - nec_priv->iobase = (void *)(pci_resource_start(cb_priv->pci_device, 1)); 975 cb_priv->fifo_iobase = pci_resource_start(cb_priv->pci_device, 2); 976 break; 977 case PCI_CHIP_QUANCOM: 978 - nec_priv->iobase = (void *)(pci_resource_start(cb_priv->pci_device, 0)); 979 - cb_priv->fifo_iobase = (unsigned long)nec_priv->iobase; 980 break; 981 default: 982 pr_err("cb7210: bug! unhandled pci_chip=%i\n", cb_priv->pci_chip); ··· 1040 return retval; 1041 cb_priv = board->private_data; 1042 nec_priv = &cb_priv->nec7210_priv; 1043 - if (request_region((unsigned long)config->ibbase, cb7210_iosize, "cb7210") == 0) { 1044 - pr_err("gpib: ioports starting at 0x%p are already in use\n", config->ibbase); 1045 return -EIO; 1046 } 1047 nec_priv->iobase = config->ibbase; ··· 1471 (unsigned long)curr_dev->resource[0]->start); 1472 return -EIO; 1473 } 1474 - nec_priv->iobase = (void *)(unsigned long)curr_dev->resource[0]->start; 1475 cb_priv->fifo_iobase = curr_dev->resource[0]->start; 1476 1477 if (request_irq(curr_dev->irq, cb7210_interrupt, IRQF_SHARED,
··· 971 switch (cb_priv->pci_chip) { 972 case PCI_CHIP_AMCC_S5933: 973 cb_priv->amcc_iobase = pci_resource_start(cb_priv->pci_device, 0); 974 + nec_priv->iobase = pci_resource_start(cb_priv->pci_device, 1); 975 cb_priv->fifo_iobase = pci_resource_start(cb_priv->pci_device, 2); 976 break; 977 case PCI_CHIP_QUANCOM: 978 + nec_priv->iobase = pci_resource_start(cb_priv->pci_device, 0); 979 + cb_priv->fifo_iobase = nec_priv->iobase; 980 break; 981 default: 982 pr_err("cb7210: bug! unhandled pci_chip=%i\n", cb_priv->pci_chip); ··· 1040 return retval; 1041 cb_priv = board->private_data; 1042 nec_priv = &cb_priv->nec7210_priv; 1043 + if (request_region(config->ibbase, cb7210_iosize, "cb7210") == 0) { 1044 + pr_err("gpib: ioports starting at 0x%u are already in use\n", config->ibbase); 1045 return -EIO; 1046 } 1047 nec_priv->iobase = config->ibbase; ··· 1471 (unsigned long)curr_dev->resource[0]->start); 1472 return -EIO; 1473 } 1474 + nec_priv->iobase = curr_dev->resource[0]->start; 1475 cb_priv->fifo_iobase = curr_dev->resource[0]->start; 1476 1477 if (request_irq(curr_dev->irq, cb7210_interrupt, IRQF_SHARED,
+2 -2
drivers/staging/gpib/cb7210/cb7210.h
··· 113 HS_STATUS = 0x8, /* HS_STATUS register */ 114 }; 115 116 - static inline unsigned long nec7210_iobase(const struct cb7210_priv *cb_priv) 117 { 118 - return (unsigned long)(cb_priv->nec7210_priv.iobase); 119 } 120 121 static inline int cb7210_page_in_bits(unsigned int page)
··· 113 HS_STATUS = 0x8, /* HS_STATUS register */ 114 }; 115 116 + static inline u32 nec7210_iobase(const struct cb7210_priv *cb_priv) 117 { 118 + return cb_priv->nec7210_priv.iobase; 119 } 120 121 static inline int cb7210_page_in_bits(unsigned int page)
+1 -1
drivers/staging/gpib/cec/Makefile
··· 1 2 - obj-m += cec_gpib.o 3
··· 1 2 + obj-$(CONFIG_GPIB_CEC_PCI) += cec_gpib.o 3
+2 -2
drivers/staging/gpib/cec/cec_gpib.c
··· 297 298 cec_priv->plx_iobase = pci_resource_start(cec_priv->pci_device, 1); 299 pr_info(" plx9050 base address 0x%lx\n", cec_priv->plx_iobase); 300 - nec_priv->iobase = (void *)(pci_resource_start(cec_priv->pci_device, 3)); 301 - pr_info(" nec7210 base address 0x%p\n", nec_priv->iobase); 302 303 isr_flags |= IRQF_SHARED; 304 if (request_irq(cec_priv->pci_device->irq, cec_interrupt, isr_flags, "pci-gpib", board)) {
··· 297 298 cec_priv->plx_iobase = pci_resource_start(cec_priv->pci_device, 1); 299 pr_info(" plx9050 base address 0x%lx\n", cec_priv->plx_iobase); 300 + nec_priv->iobase = pci_resource_start(cec_priv->pci_device, 3); 301 + pr_info(" nec7210 base address 0x%x\n", nec_priv->iobase); 302 303 isr_flags |= IRQF_SHARED; 304 if (request_irq(cec_priv->pci_device->irq, cec_interrupt, isr_flags, "pci-gpib", board)) {
+2 -52
drivers/staging/gpib/common/gpib_os.c
··· 116 return 0; 117 } 118 119 - void writeb_wrapper(unsigned int value, void *address) 120 - { 121 - writeb(value, address); 122 - }; 123 - EXPORT_SYMBOL(writeb_wrapper); 124 - 125 - void writew_wrapper(unsigned int value, void *address) 126 - { 127 - writew(value, address); 128 - }; 129 - EXPORT_SYMBOL(writew_wrapper); 130 - 131 - unsigned int readb_wrapper(void *address) 132 - { 133 - return readb(address); 134 - }; 135 - EXPORT_SYMBOL(readb_wrapper); 136 - 137 - unsigned int readw_wrapper(void *address) 138 - { 139 - return readw(address); 140 - }; 141 - EXPORT_SYMBOL(readw_wrapper); 142 - 143 - #ifdef CONFIG_HAS_IOPORT 144 - void outb_wrapper(unsigned int value, void *address) 145 - { 146 - outb(value, (unsigned long)(address)); 147 - }; 148 - EXPORT_SYMBOL(outb_wrapper); 149 - 150 - void outw_wrapper(unsigned int value, void *address) 151 - { 152 - outw(value, (unsigned long)(address)); 153 - }; 154 - EXPORT_SYMBOL(outw_wrapper); 155 - 156 - unsigned int inb_wrapper(void *address) 157 - { 158 - return inb((unsigned long)(address)); 159 - }; 160 - EXPORT_SYMBOL(inb_wrapper); 161 - 162 - unsigned int inw_wrapper(void *address) 163 - { 164 - return inw((unsigned long)(address)); 165 - }; 166 - EXPORT_SYMBOL(inw_wrapper); 167 - #endif 168 - 169 /* this is a function instead of a constant because of Suse 170 * defining HZ to be a function call to get_hz() 171 */ ··· 486 return -1; 487 } 488 489 - if (pad > MAX_GPIB_PRIMARY_ADDRESS || sad > MAX_GPIB_SECONDARY_ADDRESS) { 490 pr_err("gpib: bad address for serial poll"); 491 return -1; 492 } ··· 1573 1574 if (WARN_ON_ONCE(sizeof(void *) > sizeof(base_addr))) 1575 return -EFAULT; 1576 - config->ibbase = (void *)(unsigned long)(base_addr); 1577 1578 return 0; 1579 }
··· 116 return 0; 117 } 118 119 /* this is a function instead of a constant because of Suse 120 * defining HZ to be a function call to get_hz() 121 */ ··· 536 return -1; 537 } 538 539 + if (pad > MAX_GPIB_PRIMARY_ADDRESS || sad > MAX_GPIB_SECONDARY_ADDRESS || sad < -1) { 540 pr_err("gpib: bad address for serial poll"); 541 return -1; 542 } ··· 1623 1624 if (WARN_ON_ONCE(sizeof(void *) > sizeof(base_addr))) 1625 return -EFAULT; 1626 + config->ibbase = base_addr; 1627 1628 return 0; 1629 }
+1 -1
drivers/staging/gpib/eastwood/Makefile
··· 1 2 - obj-m += fluke_gpib.o 3
··· 1 2 + obj-$(CONFIG_GPIB_FLUKE) += fluke_gpib.o 3
+6 -6
drivers/staging/gpib/eastwood/fluke_gpib.c
··· 1011 } 1012 e_priv->gpib_iomem_res = res; 1013 1014 - nec_priv->iobase = ioremap(e_priv->gpib_iomem_res->start, 1015 resource_size(e_priv->gpib_iomem_res)); 1016 - pr_info("gpib: iobase %lx remapped to %p, length=%d\n", 1017 - (unsigned long)e_priv->gpib_iomem_res->start, 1018 - nec_priv->iobase, (int)resource_size(e_priv->gpib_iomem_res)); 1019 - if (!nec_priv->iobase) { 1020 dev_err(&fluke_gpib_pdev->dev, "Could not map I/O memory\n"); 1021 return -ENOMEM; 1022 } ··· 1107 gpib_free_pseudo_irq(board); 1108 nec_priv = &e_priv->nec7210_priv; 1109 1110 - if (nec_priv->iobase) { 1111 fluke_paged_write_byte(e_priv, 0, ISR0_IMR0, ISR0_IMR0_PAGE); 1112 nec7210_board_reset(nec_priv, board); 1113 }
··· 1011 } 1012 e_priv->gpib_iomem_res = res; 1013 1014 + nec_priv->mmiobase = ioremap(e_priv->gpib_iomem_res->start, 1015 resource_size(e_priv->gpib_iomem_res)); 1016 + pr_info("gpib: mmiobase %llx remapped to %p, length=%d\n", 1017 + (u64)e_priv->gpib_iomem_res->start, 1018 + nec_priv->mmiobase, (int)resource_size(e_priv->gpib_iomem_res)); 1019 + if (!nec_priv->mmiobase) { 1020 dev_err(&fluke_gpib_pdev->dev, "Could not map I/O memory\n"); 1021 return -ENOMEM; 1022 } ··· 1107 gpib_free_pseudo_irq(board); 1108 nec_priv = &e_priv->nec7210_priv; 1109 1110 + if (nec_priv->mmiobase) { 1111 fluke_paged_write_byte(e_priv, 0, ISR0_IMR0, ISR0_IMR0_PAGE); 1112 nec7210_board_reset(nec_priv, board); 1113 }
+2 -2
drivers/staging/gpib/eastwood/fluke_gpib.h
··· 72 { 73 u8 retval; 74 75 - retval = readl(nec_priv->iobase + register_num * nec_priv->offset); 76 return retval; 77 } 78 ··· 80 static inline void fluke_write_byte_nolock(struct nec7210_priv *nec_priv, uint8_t data, 81 int register_num) 82 { 83 - writel(data, nec_priv->iobase + register_num * nec_priv->offset); 84 } 85 86 static inline uint8_t fluke_paged_read_byte(struct fluke_priv *e_priv,
··· 72 { 73 u8 retval; 74 75 + retval = readl(nec_priv->mmiobase + register_num * nec_priv->offset); 76 return retval; 77 } 78 ··· 80 static inline void fluke_write_byte_nolock(struct nec7210_priv *nec_priv, uint8_t data, 81 int register_num) 82 { 83 + writel(data, nec_priv->mmiobase + register_num * nec_priv->offset); 84 } 85 86 static inline uint8_t fluke_paged_read_byte(struct fluke_priv *e_priv,
+14 -13
drivers/staging/gpib/fmh_gpib/fmh_gpib.c
··· 24 #include <linux/slab.h> 25 26 MODULE_LICENSE("GPL"); 27 28 static irqreturn_t fmh_gpib_interrupt(int irq, void *arg); 29 static int fmh_gpib_attach_holdoff_all(gpib_board_t *board, const gpib_board_config_t *config); ··· 1421 } 1422 e_priv->gpib_iomem_res = res; 1423 1424 - nec_priv->iobase = ioremap(e_priv->gpib_iomem_res->start, 1425 resource_size(e_priv->gpib_iomem_res)); 1426 - if (!nec_priv->iobase) { 1427 dev_err(board->dev, "Could not map I/O memory for gpib\n"); 1428 return -ENOMEM; 1429 } 1430 - dev_info(board->dev, "iobase 0x%lx remapped to %p, length=%ld\n", 1431 - (unsigned long)e_priv->gpib_iomem_res->start, 1432 - nec_priv->iobase, (unsigned long)resource_size(e_priv->gpib_iomem_res)); 1433 1434 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma_fifos"); 1435 if (!res) { ··· 1508 free_irq(e_priv->irq, board); 1509 if (e_priv->fifo_base) 1510 fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG); 1511 - if (nec_priv->iobase) { 1512 write_byte(nec_priv, 0, ISR0_IMR0_REG); 1513 nec7210_board_reset(nec_priv, board); 1514 } 1515 if (e_priv->fifo_base) 1516 iounmap(e_priv->fifo_base); 1517 - if (nec_priv->iobase) 1518 - iounmap(nec_priv->iobase); 1519 if (e_priv->dma_port_res) { 1520 release_mem_region(e_priv->dma_port_res->start, 1521 resource_size(e_priv->dma_port_res)); ··· 1565 e_priv->gpib_iomem_res = &pci_device->resource[gpib_control_status_pci_resource_index]; 1566 e_priv->dma_port_res = &pci_device->resource[gpib_fifo_pci_resource_index]; 1567 1568 - nec_priv->iobase = ioremap(pci_resource_start(pci_device, 1569 gpib_control_status_pci_resource_index), 1570 pci_resource_len(pci_device, 1571 gpib_control_status_pci_resource_index)); 1572 dev_info(board->dev, "base address for gpib control/status registers remapped to 0x%p\n", 1573 - nec_priv->iobase); 1574 1575 if (e_priv->dma_port_res->flags & IORESOURCE_MEM) { 1576 e_priv->fifo_base = ioremap(pci_resource_start(pci_device, ··· 1633 free_irq(e_priv->irq, board); 1634 if (e_priv->fifo_base) 1635 fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG); 1636 - if (nec_priv->iobase) { 1637 write_byte(nec_priv, 0, ISR0_IMR0_REG); 1638 nec7210_board_reset(nec_priv, board); 1639 } 1640 if (e_priv->fifo_base) 1641 iounmap(e_priv->fifo_base); 1642 - if (nec_priv->iobase) 1643 - iounmap(nec_priv->iobase); 1644 if (e_priv->dma_port_res || e_priv->gpib_iomem_res) 1645 pci_release_regions(to_pci_dev(board->dev)); 1646 if (board->dev)
··· 24 #include <linux/slab.h> 25 26 MODULE_LICENSE("GPL"); 27 + MODULE_DESCRIPTION("GPIB Driver for fmh_gpib_core"); 28 + MODULE_AUTHOR("Frank Mori Hess <fmh6jj@gmail.com>"); 29 30 static irqreturn_t fmh_gpib_interrupt(int irq, void *arg); 31 static int fmh_gpib_attach_holdoff_all(gpib_board_t *board, const gpib_board_config_t *config); ··· 1419 } 1420 e_priv->gpib_iomem_res = res; 1421 1422 + nec_priv->mmiobase = ioremap(e_priv->gpib_iomem_res->start, 1423 resource_size(e_priv->gpib_iomem_res)); 1424 + if (!nec_priv->mmiobase) { 1425 dev_err(board->dev, "Could not map I/O memory for gpib\n"); 1426 return -ENOMEM; 1427 } 1428 + dev_info(board->dev, "iobase %pr remapped to %p\n", 1429 + e_priv->gpib_iomem_res, nec_priv->mmiobase); 1430 1431 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma_fifos"); 1432 if (!res) { ··· 1507 free_irq(e_priv->irq, board); 1508 if (e_priv->fifo_base) 1509 fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG); 1510 + if (nec_priv->mmiobase) { 1511 write_byte(nec_priv, 0, ISR0_IMR0_REG); 1512 nec7210_board_reset(nec_priv, board); 1513 } 1514 if (e_priv->fifo_base) 1515 iounmap(e_priv->fifo_base); 1516 + if (nec_priv->mmiobase) 1517 + iounmap(nec_priv->mmiobase); 1518 if (e_priv->dma_port_res) { 1519 release_mem_region(e_priv->dma_port_res->start, 1520 resource_size(e_priv->dma_port_res)); ··· 1564 e_priv->gpib_iomem_res = &pci_device->resource[gpib_control_status_pci_resource_index]; 1565 e_priv->dma_port_res = &pci_device->resource[gpib_fifo_pci_resource_index]; 1566 1567 + nec_priv->mmiobase = ioremap(pci_resource_start(pci_device, 1568 gpib_control_status_pci_resource_index), 1569 pci_resource_len(pci_device, 1570 gpib_control_status_pci_resource_index)); 1571 dev_info(board->dev, "base address for gpib control/status registers remapped to 0x%p\n", 1572 + nec_priv->mmiobase); 1573 1574 if (e_priv->dma_port_res->flags & IORESOURCE_MEM) { 1575 e_priv->fifo_base = ioremap(pci_resource_start(pci_device, ··· 1632 free_irq(e_priv->irq, board); 1633 if (e_priv->fifo_base) 1634 fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG); 1635 + if (nec_priv->mmiobase) { 1636 write_byte(nec_priv, 0, ISR0_IMR0_REG); 1637 nec7210_board_reset(nec_priv, board); 1638 } 1639 if (e_priv->fifo_base) 1640 iounmap(e_priv->fifo_base); 1641 + if (nec_priv->mmiobase) 1642 + iounmap(nec_priv->mmiobase); 1643 if (e_priv->dma_port_res || e_priv->gpib_iomem_res) 1644 pci_release_regions(to_pci_dev(board->dev)); 1645 if (board->dev)
+2 -2
drivers/staging/gpib/fmh_gpib/fmh_gpib.h
··· 127 static inline uint8_t gpib_cs_read_byte(struct nec7210_priv *nec_priv, 128 unsigned int register_num) 129 { 130 - return readb(nec_priv->iobase + register_num * nec_priv->offset); 131 } 132 133 static inline void gpib_cs_write_byte(struct nec7210_priv *nec_priv, uint8_t data, 134 unsigned int register_num) 135 { 136 - writeb(data, nec_priv->iobase + register_num * nec_priv->offset); 137 } 138 139 static inline uint16_t fifos_read(struct fmh_priv *fmh_priv, int register_num)
··· 127 static inline uint8_t gpib_cs_read_byte(struct nec7210_priv *nec_priv, 128 unsigned int register_num) 129 { 130 + return readb(nec_priv->mmiobase + register_num * nec_priv->offset); 131 } 132 133 static inline void gpib_cs_write_byte(struct nec7210_priv *nec_priv, uint8_t data, 134 unsigned int register_num) 135 { 136 + writeb(data, nec_priv->mmiobase + register_num * nec_priv->offset); 137 } 138 139 static inline uint16_t fifos_read(struct fmh_priv *fmh_priv, int register_num)
+1 -1
drivers/staging/gpib/gpio/Makefile
··· 1 2 - obj-m += gpib_bitbang.o 3 4
··· 1 2 + obj-$(CONFIG_GPIB_GPIO) += gpib_bitbang.o 3 4
+1 -1
drivers/staging/gpib/gpio/gpib_bitbang.c
··· 315 enum listener_function_state listener_state; 316 }; 317 318 - inline long usec_diff(struct timespec64 *a, struct timespec64 *b); 319 static void bb_buffer_print(unsigned char *buffer, size_t length, int cmd, int eoi); 320 static void set_data_lines(u8 byte); 321 static u8 get_data_lines(void);
··· 315 enum listener_function_state listener_state; 316 }; 317 318 + static inline long usec_diff(struct timespec64 *a, struct timespec64 *b); 319 static void bb_buffer_print(unsigned char *buffer, size_t length, int cmd, int eoi); 320 static void set_data_lines(u8 byte); 321 static u8 get_data_lines(void);
+1 -1
drivers/staging/gpib/hp_82335/Makefile
··· 1 2 - obj-m += hp82335.o 3 4
··· 1 2 + obj-$(CONFIG_GPIB_HP82335) += hp82335.o 3 4
+11 -10
drivers/staging/gpib/hp_82335/hp82335.c
··· 9 */ 10 11 #include "hp82335.h" 12 #include <linux/ioport.h> 13 #include <linux/sched.h> 14 #include <linux/module.h> ··· 234 { 235 struct tms9914_priv *tms_priv = &hp_priv->tms9914_priv; 236 237 - writeb(0, tms_priv->iobase + HPREG_INTR_CLEAR); 238 } 239 240 int hp82335_attach(gpib_board_t *board, const gpib_board_config_t *config) ··· 242 struct hp82335_priv *hp_priv; 243 struct tms9914_priv *tms_priv; 244 int retval; 245 - const unsigned long upper_iomem_base = (unsigned long)config->ibbase + hp82335_rom_size; 246 247 board->status = 0; 248 ··· 254 tms_priv->write_byte = hp82335_write_byte; 255 tms_priv->offset = 1; 256 257 - switch ((unsigned long)(config->ibbase)) { 258 case 0xc4000: 259 case 0xc8000: 260 case 0xcc000: ··· 272 case 0xfc000: 273 break; 274 default: 275 - pr_err("hp82335: invalid base io address 0x%p\n", config->ibbase); 276 return -EINVAL; 277 } 278 if (!request_mem_region(upper_iomem_base, hp82335_upper_iomem_size, "hp82335")) { ··· 281 return -EBUSY; 282 } 283 hp_priv->raw_iobase = upper_iomem_base; 284 - tms_priv->iobase = ioremap(upper_iomem_base, hp82335_upper_iomem_size); 285 pr_info("hp82335: upper half of 82335 iomem region 0x%lx remapped to 0x%p\n", 286 - hp_priv->raw_iobase, tms_priv->iobase); 287 288 retval = request_irq(config->ibirq, hp82335_interrupt, 0, "hp82335", board); 289 if (retval) { ··· 297 298 hp82335_clear_interrupt(hp_priv); 299 300 - writeb(INTR_ENABLE, tms_priv->iobase + HPREG_CCR); 301 302 tms9914_online(board, tms_priv); 303 ··· 313 tms_priv = &hp_priv->tms9914_priv; 314 if (hp_priv->irq) 315 free_irq(hp_priv->irq, board); 316 - if (tms_priv->iobase) { 317 - writeb(0, tms_priv->iobase + HPREG_CCR); 318 tms9914_board_reset(tms_priv); 319 - iounmap((void *)tms_priv->iobase); 320 } 321 if (hp_priv->raw_iobase) 322 release_mem_region(hp_priv->raw_iobase, hp82335_upper_iomem_size);
··· 9 */ 10 11 #include "hp82335.h" 12 + #include <linux/io.h> 13 #include <linux/ioport.h> 14 #include <linux/sched.h> 15 #include <linux/module.h> ··· 233 { 234 struct tms9914_priv *tms_priv = &hp_priv->tms9914_priv; 235 236 + writeb(0, tms_priv->mmiobase + HPREG_INTR_CLEAR); 237 } 238 239 int hp82335_attach(gpib_board_t *board, const gpib_board_config_t *config) ··· 241 struct hp82335_priv *hp_priv; 242 struct tms9914_priv *tms_priv; 243 int retval; 244 + const unsigned long upper_iomem_base = config->ibbase + hp82335_rom_size; 245 246 board->status = 0; 247 ··· 253 tms_priv->write_byte = hp82335_write_byte; 254 tms_priv->offset = 1; 255 256 + switch (config->ibbase) { 257 case 0xc4000: 258 case 0xc8000: 259 case 0xcc000: ··· 271 case 0xfc000: 272 break; 273 default: 274 + pr_err("hp82335: invalid base io address 0x%u\n", config->ibbase); 275 return -EINVAL; 276 } 277 if (!request_mem_region(upper_iomem_base, hp82335_upper_iomem_size, "hp82335")) { ··· 280 return -EBUSY; 281 } 282 hp_priv->raw_iobase = upper_iomem_base; 283 + tms_priv->mmiobase = ioremap(upper_iomem_base, hp82335_upper_iomem_size); 284 pr_info("hp82335: upper half of 82335 iomem region 0x%lx remapped to 0x%p\n", 285 + hp_priv->raw_iobase, tms_priv->mmiobase); 286 287 retval = request_irq(config->ibirq, hp82335_interrupt, 0, "hp82335", board); 288 if (retval) { ··· 296 297 hp82335_clear_interrupt(hp_priv); 298 299 + writeb(INTR_ENABLE, tms_priv->mmiobase + HPREG_CCR); 300 301 tms9914_online(board, tms_priv); 302 ··· 312 tms_priv = &hp_priv->tms9914_priv; 313 if (hp_priv->irq) 314 free_irq(hp_priv->irq, board); 315 + if (tms_priv->mmiobase) { 316 + writeb(0, tms_priv->mmiobase + HPREG_CCR); 317 tms9914_board_reset(tms_priv); 318 + iounmap(tms_priv->mmiobase); 319 } 320 if (hp_priv->raw_iobase) 321 release_mem_region(hp_priv->raw_iobase, hp82335_upper_iomem_size);
+1 -1
drivers/staging/gpib/hp_82341/Makefile
··· 1 2 - obj-m += hp_82341.o
··· 1 2 + obj-$(CONFIG_GPIB_HP82341) += hp_82341.o
+8 -8
drivers/staging/gpib/hp_82341/hp_82341.c
··· 473 474 static uint8_t hp_82341_read_byte(struct tms9914_priv *priv, unsigned int register_num) 475 { 476 - return inb((unsigned long)(priv->iobase) + register_num); 477 } 478 479 static void hp_82341_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num) 480 { 481 - outb(data, (unsigned long)(priv->iobase) + register_num); 482 } 483 484 static int hp_82341_find_isapnp_board(struct pnp_dev **dev) ··· 682 { 683 struct hp_82341_priv *hp_priv; 684 struct tms9914_priv *tms_priv; 685 - unsigned long start_addr; 686 - void *iobase; 687 int irq; 688 int i; 689 int retval; ··· 704 if (retval < 0) 705 return retval; 706 hp_priv->pnp_dev = dev; 707 - iobase = (void *)(pnp_port_start(dev, 0)); 708 irq = pnp_irq(dev, 0); 709 hp_priv->hw_version = HW_VERSION_82341D; 710 hp_priv->io_region_offset = 0x8; ··· 714 hp_priv->hw_version = HW_VERSION_82341C; 715 hp_priv->io_region_offset = 0x400; 716 } 717 - pr_info("hp_82341: base io 0x%p\n", iobase); 718 for (i = 0; i < hp_82341_num_io_regions; ++i) { 719 - start_addr = (unsigned long)(iobase) + i * hp_priv->io_region_offset; 720 if (!request_region(start_addr, hp_82341_region_iosize, "hp_82341")) { 721 pr_err("hp_82341: failed to allocate io ports 0x%lx-0x%lx\n", 722 start_addr, ··· 725 } 726 hp_priv->iobase[i] = start_addr; 727 } 728 - tms_priv->iobase = (void *)(hp_priv->iobase[2]); 729 if (hp_priv->hw_version == HW_VERSION_82341D) { 730 retval = isapnp_cfg_begin(hp_priv->pnp_dev->card->number, 731 hp_priv->pnp_dev->number);
··· 473 474 static uint8_t hp_82341_read_byte(struct tms9914_priv *priv, unsigned int register_num) 475 { 476 + return inb(priv->iobase + register_num); 477 } 478 479 static void hp_82341_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num) 480 { 481 + outb(data, priv->iobase + register_num); 482 } 483 484 static int hp_82341_find_isapnp_board(struct pnp_dev **dev) ··· 682 { 683 struct hp_82341_priv *hp_priv; 684 struct tms9914_priv *tms_priv; 685 + u32 start_addr; 686 + u32 iobase; 687 int irq; 688 int i; 689 int retval; ··· 704 if (retval < 0) 705 return retval; 706 hp_priv->pnp_dev = dev; 707 + iobase = pnp_port_start(dev, 0); 708 irq = pnp_irq(dev, 0); 709 hp_priv->hw_version = HW_VERSION_82341D; 710 hp_priv->io_region_offset = 0x8; ··· 714 hp_priv->hw_version = HW_VERSION_82341C; 715 hp_priv->io_region_offset = 0x400; 716 } 717 + pr_info("hp_82341: base io 0x%u\n", iobase); 718 for (i = 0; i < hp_82341_num_io_regions; ++i) { 719 + start_addr = iobase + i * hp_priv->io_region_offset; 720 if (!request_region(start_addr, hp_82341_region_iosize, "hp_82341")) { 721 pr_err("hp_82341: failed to allocate io ports 0x%lx-0x%lx\n", 722 start_addr, ··· 725 } 726 hp_priv->iobase[i] = start_addr; 727 } 728 + tms_priv->iobase = hp_priv->iobase[2]; 729 if (hp_priv->hw_version == HW_VERSION_82341D) { 730 retval = isapnp_cfg_begin(hp_priv->pnp_dev->card->number, 731 hp_priv->pnp_dev->number);
+1 -11
drivers/staging/gpib/include/gpibP.h
··· 16 17 #include <linux/fs.h> 18 #include <linux/interrupt.h> 19 20 void gpib_register_driver(gpib_interface_t *interface, struct module *mod); 21 void gpib_unregister_driver(gpib_interface_t *interface); ··· 35 extern gpib_board_t board_array[GPIB_MAX_NUM_BOARDS]; 36 37 extern struct list_head registered_drivers; 38 - 39 - #include <linux/io.h> 40 - 41 - void writeb_wrapper(unsigned int value, void *address); 42 - unsigned int readb_wrapper(void *address); 43 - void outb_wrapper(unsigned int value, void *address); 44 - unsigned int inb_wrapper(void *address); 45 - void writew_wrapper(unsigned int value, void *address); 46 - unsigned int readw_wrapper(void *address); 47 - void outw_wrapper(unsigned int value, void *address); 48 - unsigned int inw_wrapper(void *address); 49 50 #endif // _GPIB_P_H 51
··· 16 17 #include <linux/fs.h> 18 #include <linux/interrupt.h> 19 + #include <linux/io.h> 20 21 void gpib_register_driver(gpib_interface_t *interface, struct module *mod); 22 void gpib_unregister_driver(gpib_interface_t *interface); ··· 34 extern gpib_board_t board_array[GPIB_MAX_NUM_BOARDS]; 35 36 extern struct list_head registered_drivers; 37 38 #endif // _GPIB_P_H 39
+2 -1
drivers/staging/gpib/include/gpib_types.h
··· 31 void *init_data; 32 int init_data_length; 33 /* IO base address to use for non-pnp cards (set by core, driver should make local copy) */ 34 - void *ibbase; 35 /* IRQ to use for non-pnp cards (set by core, driver should make local copy) */ 36 unsigned int ibirq; 37 /* dma channel to use for non-pnp cards (set by core, driver should make local copy) */
··· 31 void *init_data; 32 int init_data_length; 33 /* IO base address to use for non-pnp cards (set by core, driver should make local copy) */ 34 + u32 ibbase; 35 + void __iomem *mmibbase; 36 /* IRQ to use for non-pnp cards (set by core, driver should make local copy) */ 37 unsigned int ibirq; 38 /* dma channel to use for non-pnp cards (set by core, driver should make local copy) */
+4 -1
drivers/staging/gpib/include/nec7210.h
··· 18 19 /* struct used to provide variables local to a nec7210 chip */ 20 struct nec7210_priv { 21 - void *iobase; 22 unsigned int offset; // offset between successive nec7210 io addresses 23 unsigned int dma_channel; 24 u8 *dma_buffer;
··· 18 19 /* struct used to provide variables local to a nec7210 chip */ 20 struct nec7210_priv { 21 + #ifdef CONFIG_HAS_IOPORT 22 + u32 iobase; 23 + #endif 24 + void __iomem *mmiobase; 25 unsigned int offset; // offset between successive nec7210 io addresses 26 unsigned int dma_channel; 27 u8 *dma_buffer;
+4 -1
drivers/staging/gpib/include/tms9914.h
··· 20 21 /* struct used to provide variables local to a tms9914 chip */ 22 struct tms9914_priv { 23 - void *iobase; 24 unsigned int offset; // offset between successive tms9914 io addresses 25 unsigned int dma_channel; 26 // software copy of bits written to interrupt mask registers
··· 20 21 /* struct used to provide variables local to a tms9914 chip */ 22 struct tms9914_priv { 23 + #ifdef CONFIG_HAS_IOPORT 24 + u32 iobase; 25 + #endif 26 + void __iomem *mmiobase; 27 unsigned int offset; // offset between successive tms9914 io addresses 28 unsigned int dma_channel; 29 // software copy of bits written to interrupt mask registers
+1 -1
drivers/staging/gpib/ines/Makefile
··· 1 ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA 2 - obj-m += ines_gpib.o 3 4
··· 1 ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA 2 + obj-$(CONFIG_GPIB_INES) += ines_gpib.o 3 4
+2 -2
drivers/staging/gpib/ines/ines.h
··· 83 /* inb/outb wrappers */ 84 static inline unsigned int ines_inb(struct ines_priv *priv, unsigned int register_number) 85 { 86 - return inb((unsigned long)(priv->nec7210_priv.iobase) + 87 register_number * priv->nec7210_priv.offset); 88 } 89 90 static inline void ines_outb(struct ines_priv *priv, unsigned int value, 91 unsigned int register_number) 92 { 93 - outb(value, (unsigned long)(priv->nec7210_priv.iobase) + 94 register_number * priv->nec7210_priv.offset); 95 } 96
··· 83 /* inb/outb wrappers */ 84 static inline unsigned int ines_inb(struct ines_priv *priv, unsigned int register_number) 85 { 86 + return inb(priv->nec7210_priv.iobase + 87 register_number * priv->nec7210_priv.offset); 88 } 89 90 static inline void ines_outb(struct ines_priv *priv, unsigned int value, 91 unsigned int register_number) 92 { 93 + outb(value, priv->nec7210_priv.iobase + 94 register_number * priv->nec7210_priv.offset); 95 } 96
+11 -11
drivers/staging/gpib/ines/ines_gpib.c
··· 273 struct nec7210_priv *nec_priv = &priv->nec7210_priv; 274 275 if (priv->pci_chip_type == PCI_CHIP_QUANCOM) { 276 - if ((inb((unsigned long)nec_priv->iobase + 277 QUANCOM_IRQ_CONTROL_STATUS_REG) & 278 QUANCOM_IRQ_ASSERTED_BIT)) 279 - outb(QUANCOM_IRQ_ENABLE_BIT, (unsigned long)(nec_priv->iobase) + 280 QUANCOM_IRQ_CONTROL_STATUS_REG); 281 } 282 ··· 780 781 if (pci_request_regions(ines_priv->pci_device, "ines-gpib")) 782 return -1; 783 - nec_priv->iobase = (void *)(pci_resource_start(ines_priv->pci_device, 784 - found_id.gpib_region)); 785 786 ines_priv->pci_chip_type = found_id.pci_chip_type; 787 nec_priv->offset = found_id.io_offset; ··· 840 } 841 break; 842 case PCI_CHIP_QUANCOM: 843 - outb(QUANCOM_IRQ_ENABLE_BIT, (unsigned long)(nec_priv->iobase) + 844 QUANCOM_IRQ_CONTROL_STATUS_REG); 845 break; 846 case PCI_CHIP_QUICKLOGIC5030: ··· 899 ines_priv = board->private_data; 900 nec_priv = &ines_priv->nec7210_priv; 901 902 - if (!request_region((unsigned long)config->ibbase, ines_isa_iosize, "ines_gpib")) { 903 - pr_err("ines_gpib: ioports at 0x%p already in use\n", config->ibbase); 904 return -1; 905 } 906 nec_priv->iobase = config->ibbase; ··· 931 break; 932 case PCI_CHIP_QUANCOM: 933 if (nec_priv->iobase) 934 - outb(0, (unsigned long)(nec_priv->iobase) + 935 QUANCOM_IRQ_CONTROL_STATUS_REG); 936 break; 937 default: ··· 960 free_irq(ines_priv->irq, board); 961 if (nec_priv->iobase) { 962 nec7210_board_reset(nec_priv, board); 963 - release_region((unsigned long)(nec_priv->iobase), ines_isa_iosize); 964 } 965 } 966 ines_free_private(board); ··· 1355 return -1; 1356 } 1357 1358 - nec_priv->iobase = (void *)(unsigned long)curr_dev->resource[0]->start; 1359 1360 nec7210_board_reset(nec_priv, board); 1361 ··· 1410 free_irq(ines_priv->irq, board); 1411 if (nec_priv->iobase) { 1412 nec7210_board_reset(nec_priv, board); 1413 - release_region((unsigned long)(nec_priv->iobase), ines_pcmcia_iosize); 1414 } 1415 } 1416 ines_free_private(board);
··· 273 struct nec7210_priv *nec_priv = &priv->nec7210_priv; 274 275 if (priv->pci_chip_type == PCI_CHIP_QUANCOM) { 276 + if ((inb(nec_priv->iobase + 277 QUANCOM_IRQ_CONTROL_STATUS_REG) & 278 QUANCOM_IRQ_ASSERTED_BIT)) 279 + outb(QUANCOM_IRQ_ENABLE_BIT, nec_priv->iobase + 280 QUANCOM_IRQ_CONTROL_STATUS_REG); 281 } 282 ··· 780 781 if (pci_request_regions(ines_priv->pci_device, "ines-gpib")) 782 return -1; 783 + nec_priv->iobase = pci_resource_start(ines_priv->pci_device, 784 + found_id.gpib_region); 785 786 ines_priv->pci_chip_type = found_id.pci_chip_type; 787 nec_priv->offset = found_id.io_offset; ··· 840 } 841 break; 842 case PCI_CHIP_QUANCOM: 843 + outb(QUANCOM_IRQ_ENABLE_BIT, nec_priv->iobase + 844 QUANCOM_IRQ_CONTROL_STATUS_REG); 845 break; 846 case PCI_CHIP_QUICKLOGIC5030: ··· 899 ines_priv = board->private_data; 900 nec_priv = &ines_priv->nec7210_priv; 901 902 + if (!request_region(config->ibbase, ines_isa_iosize, "ines_gpib")) { 903 + pr_err("ines_gpib: ioports at 0x%x already in use\n", config->ibbase); 904 return -1; 905 } 906 nec_priv->iobase = config->ibbase; ··· 931 break; 932 case PCI_CHIP_QUANCOM: 933 if (nec_priv->iobase) 934 + outb(0, nec_priv->iobase + 935 QUANCOM_IRQ_CONTROL_STATUS_REG); 936 break; 937 default: ··· 960 free_irq(ines_priv->irq, board); 961 if (nec_priv->iobase) { 962 nec7210_board_reset(nec_priv, board); 963 + release_region(nec_priv->iobase, ines_isa_iosize); 964 } 965 } 966 ines_free_private(board); ··· 1355 return -1; 1356 } 1357 1358 + nec_priv->iobase = curr_dev->resource[0]->start; 1359 1360 nec7210_board_reset(nec_priv, board); 1361 ··· 1410 free_irq(ines_priv->irq, board); 1411 if (nec_priv->iobase) { 1412 nec7210_board_reset(nec_priv, board); 1413 + release_region(nec_priv->iobase, ines_pcmcia_iosize); 1414 } 1415 } 1416 ines_free_private(board);
+1 -1
drivers/staging/gpib/lpvo_usb_gpib/Makefile
··· 1 2 - obj-m += lpvo_usb_gpib.o 3
··· 1 2 + obj-$(CONFIG_GPIB_LPVO) += lpvo_usb_gpib.o 3
+9 -9
drivers/staging/gpib/lpvo_usb_gpib/lpvo_usb_gpib.c
··· 99 #define USB_GPIB_DEBUG_ON "\nIBDE\xAA\n" 100 #define USB_GPIB_SET_LISTEN "\nIBDT0\n" 101 #define USB_GPIB_SET_TALK "\nIBDT1\n" 102 - #define USB_GPIB_SET_LINES "\nIBDC\n" 103 - #define USB_GPIB_SET_DATA "\nIBDM\n" 104 #define USB_GPIB_READ_LINES "\nIBD?C\n" 105 #define USB_GPIB_READ_DATA "\nIBD?M\n" 106 #define USB_GPIB_READ_BUS "\nIBD??\n" ··· 210 * (unix time in sec and NANOsec) 211 */ 212 213 - inline int usec_diff(struct timespec64 *a, struct timespec64 *b) 214 { 215 return ((a->tv_sec - b->tv_sec) * 1000000 + 216 (a->tv_nsec - b->tv_nsec) / 1000); ··· 436 static int usb_gpib_attach(gpib_board_t *board, const gpib_board_config_t *config) 437 { 438 int retval, j; 439 - int base = (long)config->ibbase; 440 char *device_path; 441 int match; 442 struct usb_device *udev; ··· 589 size_t *bytes_written) 590 { 591 int i, retval; 592 - char command[6] = "IBc\n"; 593 594 DIA_LOG(1, "enter %p\n", board); 595 ··· 608 } 609 610 /** 611 - * disable_eos() - Disable END on eos byte (END on EOI only) 612 * 613 * @board: the gpib_board data area for this gpib interface 614 * ··· 624 } 625 626 /** 627 - * enable_eos() - Enable END for reads when eos byte is received. 628 * 629 * @board: the gpib_board data area for this gpib interface 630 * @eos_byte: the 'eos' byte ··· 647 } 648 649 /** 650 - * go_to_standby() - De-assert ATN 651 * 652 * @board: the gpib_board data area for this gpib interface 653 */ ··· 664 } 665 666 /** 667 - * interface_clear() - Assert or de-assert IFC 668 * 669 * @board: the gpib_board data area for this gpib interface 670 * assert: 1: assert IFC; 0: de-assert IFC
··· 99 #define USB_GPIB_DEBUG_ON "\nIBDE\xAA\n" 100 #define USB_GPIB_SET_LISTEN "\nIBDT0\n" 101 #define USB_GPIB_SET_TALK "\nIBDT1\n" 102 + #define USB_GPIB_SET_LINES "\nIBDC.\n" 103 + #define USB_GPIB_SET_DATA "\nIBDM.\n" 104 #define USB_GPIB_READ_LINES "\nIBD?C\n" 105 #define USB_GPIB_READ_DATA "\nIBD?M\n" 106 #define USB_GPIB_READ_BUS "\nIBD??\n" ··· 210 * (unix time in sec and NANOsec) 211 */ 212 213 + static inline int usec_diff(struct timespec64 *a, struct timespec64 *b) 214 { 215 return ((a->tv_sec - b->tv_sec) * 1000000 + 216 (a->tv_nsec - b->tv_nsec) / 1000); ··· 436 static int usb_gpib_attach(gpib_board_t *board, const gpib_board_config_t *config) 437 { 438 int retval, j; 439 + u32 base = config->ibbase; 440 char *device_path; 441 int match; 442 struct usb_device *udev; ··· 589 size_t *bytes_written) 590 { 591 int i, retval; 592 + char command[6] = "IBc.\n"; 593 594 DIA_LOG(1, "enter %p\n", board); 595 ··· 608 } 609 610 /** 611 + * usb_gpib_disable_eos() - Disable END on eos byte (END on EOI only) 612 * 613 * @board: the gpib_board data area for this gpib interface 614 * ··· 624 } 625 626 /** 627 + * usb_gpib_enable_eos() - Enable END for reads when eos byte is received. 628 * 629 * @board: the gpib_board data area for this gpib interface 630 * @eos_byte: the 'eos' byte ··· 647 } 648 649 /** 650 + * usb_gpib_go_to_standby() - De-assert ATN 651 * 652 * @board: the gpib_board data area for this gpib interface 653 */ ··· 664 } 665 666 /** 667 + * usb_gpib_interface_clear() - Assert or de-assert IFC 668 * 669 * @board: the gpib_board data area for this gpib interface 670 * assert: 1: assert IFC; 0: de-assert IFC
+8 -8
drivers/staging/gpib/nec7210/nec7210.c
··· 1035 /* wrappers for io */ 1036 uint8_t nec7210_ioport_read_byte(struct nec7210_priv *priv, unsigned int register_num) 1037 { 1038 - return inb((unsigned long)(priv->iobase) + register_num * priv->offset); 1039 } 1040 EXPORT_SYMBOL(nec7210_ioport_read_byte); 1041 ··· 1047 */ 1048 nec7210_locking_ioport_write_byte(priv, data, register_num); 1049 else 1050 - outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset); 1051 } 1052 EXPORT_SYMBOL(nec7210_ioport_write_byte); 1053 ··· 1058 unsigned long flags; 1059 1060 spin_lock_irqsave(&priv->register_page_lock, flags); 1061 - retval = inb((unsigned long)(priv->iobase) + register_num * priv->offset); 1062 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1063 return retval; 1064 } ··· 1072 spin_lock_irqsave(&priv->register_page_lock, flags); 1073 if (register_num == AUXMR) 1074 udelay(1); 1075 - outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset); 1076 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1077 } 1078 EXPORT_SYMBOL(nec7210_locking_ioport_write_byte); ··· 1080 1081 uint8_t nec7210_iomem_read_byte(struct nec7210_priv *priv, unsigned int register_num) 1082 { 1083 - return readb(priv->iobase + register_num * priv->offset); 1084 } 1085 EXPORT_SYMBOL(nec7210_iomem_read_byte); 1086 ··· 1092 */ 1093 nec7210_locking_iomem_write_byte(priv, data, register_num); 1094 else 1095 - writeb(data, priv->iobase + register_num * priv->offset); 1096 } 1097 EXPORT_SYMBOL(nec7210_iomem_write_byte); 1098 ··· 1102 unsigned long flags; 1103 1104 spin_lock_irqsave(&priv->register_page_lock, flags); 1105 - retval = readb(priv->iobase + register_num * priv->offset); 1106 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1107 return retval; 1108 } ··· 1116 spin_lock_irqsave(&priv->register_page_lock, flags); 1117 if (register_num == AUXMR) 1118 udelay(1); 1119 - writeb(data, priv->iobase + register_num * priv->offset); 1120 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1121 } 1122 EXPORT_SYMBOL(nec7210_locking_iomem_write_byte);
··· 1035 /* wrappers for io */ 1036 uint8_t nec7210_ioport_read_byte(struct nec7210_priv *priv, unsigned int register_num) 1037 { 1038 + return inb(priv->iobase + register_num * priv->offset); 1039 } 1040 EXPORT_SYMBOL(nec7210_ioport_read_byte); 1041 ··· 1047 */ 1048 nec7210_locking_ioport_write_byte(priv, data, register_num); 1049 else 1050 + outb(data, priv->iobase + register_num * priv->offset); 1051 } 1052 EXPORT_SYMBOL(nec7210_ioport_write_byte); 1053 ··· 1058 unsigned long flags; 1059 1060 spin_lock_irqsave(&priv->register_page_lock, flags); 1061 + retval = inb(priv->iobase + register_num * priv->offset); 1062 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1063 return retval; 1064 } ··· 1072 spin_lock_irqsave(&priv->register_page_lock, flags); 1073 if (register_num == AUXMR) 1074 udelay(1); 1075 + outb(data, priv->iobase + register_num * priv->offset); 1076 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1077 } 1078 EXPORT_SYMBOL(nec7210_locking_ioport_write_byte); ··· 1080 1081 uint8_t nec7210_iomem_read_byte(struct nec7210_priv *priv, unsigned int register_num) 1082 { 1083 + return readb(priv->mmiobase + register_num * priv->offset); 1084 } 1085 EXPORT_SYMBOL(nec7210_iomem_read_byte); 1086 ··· 1092 */ 1093 nec7210_locking_iomem_write_byte(priv, data, register_num); 1094 else 1095 + writeb(data, priv->mmiobase + register_num * priv->offset); 1096 } 1097 EXPORT_SYMBOL(nec7210_iomem_write_byte); 1098 ··· 1102 unsigned long flags; 1103 1104 spin_lock_irqsave(&priv->register_page_lock, flags); 1105 + retval = readb(priv->mmiobase + register_num * priv->offset); 1106 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1107 return retval; 1108 } ··· 1116 spin_lock_irqsave(&priv->register_page_lock, flags); 1117 if (register_num == AUXMR) 1118 udelay(1); 1119 + writeb(data, priv->mmiobase + register_num * priv->offset); 1120 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1121 } 1122 EXPORT_SYMBOL(nec7210_locking_iomem_write_byte);
+1 -1
drivers/staging/gpib/ni_usb/Makefile
··· 1 2 - obj-m += ni_usb_gpib.o 3 4
··· 1 2 + obj-$(CONFIG_GPIB_NI_USB) += ni_usb_gpib.o 3 4
+1 -1
drivers/staging/gpib/pc2/Makefile
··· 1 2 - obj-m += pc2_gpib.o 3 4 5
··· 1 2 + obj-$(CONFIG_GPIB_PC2) += pc2_gpib.o 3 4 5
+8 -8
drivers/staging/gpib/pc2/pc2_gpib.c
··· 426 nec_priv = &pc2_priv->nec7210_priv; 427 nec_priv->offset = pc2_reg_offset; 428 429 - if (request_region((unsigned long)config->ibbase, pc2_iosize, "pc2") == 0) { 430 pr_err("gpib: ioports are already in use\n"); 431 return -1; 432 } ··· 471 free_irq(pc2_priv->irq, board); 472 if (nec_priv->iobase) { 473 nec7210_board_reset(nec_priv, board); 474 - release_region((unsigned long)(nec_priv->iobase), pc2_iosize); 475 } 476 if (nec_priv->dma_buffer) { 477 dma_free_coherent(board->dev, nec_priv->dma_buffer_length, ··· 498 nec_priv = &pc2_priv->nec7210_priv; 499 nec_priv->offset = pc2a_reg_offset; 500 501 - switch ((unsigned long)(config->ibbase)) { 502 case 0x02e1: 503 case 0x22e1: 504 case 0x42e1: 505 case 0x62e1: 506 break; 507 default: 508 - pr_err("PCIIa base range invalid, must be one of 0x[0246]2e1, but is 0x%p\n", 509 config->ibbase); 510 return -1; 511 } ··· 522 unsigned int err = 0; 523 524 for (i = 0; i < num_registers; i++) { 525 - if (check_region((unsigned long)config->ibbase + i * pc2a_reg_offset, 1)) 526 err++; 527 } 528 if (config->ibirq && check_region(pc2a_clear_intr_iobase + config->ibirq, 1)) ··· 533 } 534 #endif 535 for (i = 0; i < num_registers; i++) { 536 - if (!request_region((unsigned long)config->ibbase + 537 i * pc2a_reg_offset, 1, "pc2a")) { 538 pr_err("gpib: ioports are already in use"); 539 for (j = 0; j < i; j++) 540 - release_region((unsigned long)(config->ibbase) + 541 j * pc2a_reg_offset, 1); 542 return -1; 543 } ··· 608 if (nec_priv->iobase) { 609 nec7210_board_reset(nec_priv, board); 610 for (i = 0; i < num_registers; i++) 611 - release_region((unsigned long)nec_priv->iobase + 612 i * pc2a_reg_offset, 1); 613 } 614 if (pc2_priv->clear_intr_addr)
··· 426 nec_priv = &pc2_priv->nec7210_priv; 427 nec_priv->offset = pc2_reg_offset; 428 429 + if (request_region(config->ibbase, pc2_iosize, "pc2") == 0) { 430 pr_err("gpib: ioports are already in use\n"); 431 return -1; 432 } ··· 471 free_irq(pc2_priv->irq, board); 472 if (nec_priv->iobase) { 473 nec7210_board_reset(nec_priv, board); 474 + release_region(nec_priv->iobase, pc2_iosize); 475 } 476 if (nec_priv->dma_buffer) { 477 dma_free_coherent(board->dev, nec_priv->dma_buffer_length, ··· 498 nec_priv = &pc2_priv->nec7210_priv; 499 nec_priv->offset = pc2a_reg_offset; 500 501 + switch (config->ibbase) { 502 case 0x02e1: 503 case 0x22e1: 504 case 0x42e1: 505 case 0x62e1: 506 break; 507 default: 508 + pr_err("PCIIa base range invalid, must be one of 0x[0246]2e1, but is 0x%d\n", 509 config->ibbase); 510 return -1; 511 } ··· 522 unsigned int err = 0; 523 524 for (i = 0; i < num_registers; i++) { 525 + if (check_region(config->ibbase + i * pc2a_reg_offset, 1)) 526 err++; 527 } 528 if (config->ibirq && check_region(pc2a_clear_intr_iobase + config->ibirq, 1)) ··· 533 } 534 #endif 535 for (i = 0; i < num_registers; i++) { 536 + if (!request_region(config->ibbase + 537 i * pc2a_reg_offset, 1, "pc2a")) { 538 pr_err("gpib: ioports are already in use"); 539 for (j = 0; j < i; j++) 540 + release_region(config->ibbase + 541 j * pc2a_reg_offset, 1); 542 return -1; 543 } ··· 608 if (nec_priv->iobase) { 609 nec7210_board_reset(nec_priv, board); 610 for (i = 0; i < num_registers; i++) 611 + release_region(nec_priv->iobase + 612 i * pc2a_reg_offset, 1); 613 } 614 if (pc2_priv->clear_intr_addr)
+1 -1
drivers/staging/gpib/tms9914/Makefile
··· 1 2 - obj-m += tms9914.o 3 4 5
··· 1 2 + obj-$(CONFIG_GPIB_TMS9914) += tms9914.o 3 4 5
+4 -4
drivers/staging/gpib/tms9914/tms9914.c
··· 866 // wrapper for inb 867 uint8_t tms9914_ioport_read_byte(struct tms9914_priv *priv, unsigned int register_num) 868 { 869 - return inb((unsigned long)(priv->iobase) + register_num * priv->offset); 870 } 871 EXPORT_SYMBOL_GPL(tms9914_ioport_read_byte); 872 873 // wrapper for outb 874 void tms9914_ioport_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num) 875 { 876 - outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset); 877 if (register_num == AUXCR) 878 udelay(1); 879 } ··· 883 // wrapper for readb 884 uint8_t tms9914_iomem_read_byte(struct tms9914_priv *priv, unsigned int register_num) 885 { 886 - return readb(priv->iobase + register_num * priv->offset); 887 } 888 EXPORT_SYMBOL_GPL(tms9914_iomem_read_byte); 889 890 // wrapper for writeb 891 void tms9914_iomem_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num) 892 { 893 - writeb(data, priv->iobase + register_num * priv->offset); 894 if (register_num == AUXCR) 895 udelay(1); 896 }
··· 866 // wrapper for inb 867 uint8_t tms9914_ioport_read_byte(struct tms9914_priv *priv, unsigned int register_num) 868 { 869 + return inb(priv->iobase + register_num * priv->offset); 870 } 871 EXPORT_SYMBOL_GPL(tms9914_ioport_read_byte); 872 873 // wrapper for outb 874 void tms9914_ioport_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num) 875 { 876 + outb(data, priv->iobase + register_num * priv->offset); 877 if (register_num == AUXCR) 878 udelay(1); 879 } ··· 883 // wrapper for readb 884 uint8_t tms9914_iomem_read_byte(struct tms9914_priv *priv, unsigned int register_num) 885 { 886 + return readb(priv->mmiobase + register_num * priv->offset); 887 } 888 EXPORT_SYMBOL_GPL(tms9914_iomem_read_byte); 889 890 // wrapper for writeb 891 void tms9914_iomem_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num) 892 { 893 + writeb(data, priv->mmiobase + register_num * priv->offset); 894 if (register_num == AUXCR) 895 udelay(1); 896 }
+1 -1
drivers/staging/gpib/tnt4882/Makefile
··· 1 ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA 2 - obj-m += tnt4882.o 3 4 tnt4882-objs := tnt4882_gpib.o mite.o 5
··· 1 ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA 2 + obj-$(CONFIG_GPIB_NI_PCI_ISA) += tnt4882.o 3 4 tnt4882-objs := tnt4882_gpib.o mite.o 5
-69
drivers/staging/gpib/tnt4882/mite.c
··· 148 } 149 pr_info("\n"); 150 } 151 - 152 - int mite_bytes_transferred(struct mite_struct *mite, int chan) 153 - { 154 - int dar, fcr; 155 - 156 - dar = readl(mite->mite_io_addr + MITE_DAR + CHAN_OFFSET(chan)); 157 - fcr = readl(mite->mite_io_addr + MITE_FCR + CHAN_OFFSET(chan)) & 0x000000FF; 158 - return dar - fcr; 159 - } 160 - 161 - int mite_dma_tcr(struct mite_struct *mite) 162 - { 163 - int tcr; 164 - int lkar; 165 - 166 - lkar = readl(mite->mite_io_addr + CHAN_OFFSET(0) + MITE_LKAR); 167 - tcr = readl(mite->mite_io_addr + CHAN_OFFSET(0) + MITE_TCR); 168 - MDPRINTK("lkar=0x%08x tcr=%d\n", lkar, tcr); 169 - 170 - return tcr; 171 - } 172 - 173 - void mite_dma_disarm(struct mite_struct *mite) 174 - { 175 - int chor; 176 - 177 - /* disarm */ 178 - chor = CHOR_ABORT; 179 - writel(chor, mite->mite_io_addr + CHAN_OFFSET(0) + MITE_CHOR); 180 - } 181 - 182 - void mite_dump_regs(struct mite_struct *mite) 183 - { 184 - void *addr = 0; 185 - unsigned long temp = 0; 186 - 187 - pr_info("mite address is =0x%p\n", mite->mite_io_addr); 188 - 189 - addr = mite->mite_io_addr + MITE_CHOR + CHAN_OFFSET(0); 190 - pr_info("mite status[CHOR]at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 191 - //mite_decode(mite_CHOR_strings,temp); 192 - addr = mite->mite_io_addr + MITE_CHCR + CHAN_OFFSET(0); 193 - pr_info("mite status[CHCR]at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 194 - //mite_decode(mite_CHCR_strings,temp); 195 - addr = mite->mite_io_addr + MITE_TCR + CHAN_OFFSET(0); 196 - pr_info("mite status[TCR] at 0x%p =0x%08x\n", addr, readl(addr)); 197 - addr = mite->mite_io_addr + MITE_MCR + CHAN_OFFSET(0); 198 - pr_info("mite status[MCR] at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 199 - //mite_decode(mite_MCR_strings,temp); 200 - addr = mite->mite_io_addr + MITE_MAR + CHAN_OFFSET(0); 201 - pr_info("mite status[MAR] at 0x%p =0x%08x\n", addr, readl(addr)); 202 - addr = mite->mite_io_addr + MITE_DCR + CHAN_OFFSET(0); 203 - pr_info("mite status[DCR] at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 204 - //mite_decode(mite_CR_strings,temp); 205 - addr = mite->mite_io_addr + MITE_DAR + CHAN_OFFSET(0); 206 - pr_info("mite status[DAR] at 0x%p =0x%08x\n", addr, readl(addr)); 207 - addr = mite->mite_io_addr + MITE_LKCR + CHAN_OFFSET(0); 208 - pr_info("mite status[LKCR]at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 209 - //mite_decode(mite_CR_strings,temp); 210 - addr = mite->mite_io_addr + MITE_LKAR + CHAN_OFFSET(0); 211 - pr_info("mite status[LKAR]at 0x%p =0x%08x\n", addr, readl(addr)); 212 - 213 - addr = mite->mite_io_addr + MITE_CHSR + CHAN_OFFSET(0); 214 - pr_info("mite status[CHSR]at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 215 - //mite_decode(mite_CHSR_strings,temp); 216 - addr = mite->mite_io_addr + MITE_FCR + CHAN_OFFSET(0); 217 - pr_info("mite status[FCR] at 0x%p =0x%08x\n\n", addr, readl(addr)); 218 - } 219 -
··· 148 } 149 pr_info("\n"); 150 }
+2 -11
drivers/staging/gpib/tnt4882/mite.h
··· 34 35 struct pci_dev *pcidev; 36 unsigned long mite_phys_addr; 37 - void *mite_io_addr; 38 unsigned long daq_phys_addr; 39 - void *daq_io_addr; 40 41 int DMA_CheckNearEnd; 42 ··· 60 int mite_setup(struct mite_struct *mite); 61 void mite_unsetup(struct mite_struct *mite); 62 void mite_list_devices(void); 63 - 64 - int mite_dma_tcr(struct mite_struct *mite); 65 - 66 - void mite_dma_arm(struct mite_struct *mite); 67 - void mite_dma_disarm(struct mite_struct *mite); 68 - 69 - void mite_dump_regs(struct mite_struct *mite); 70 - void mite_setregs(struct mite_struct *mite, unsigned long ll_start, int chan, int dir); 71 - int mite_bytes_transferred(struct mite_struct *mite, int chan); 72 73 #define CHAN_OFFSET(x) (0x100 * (x)) 74
··· 34 35 struct pci_dev *pcidev; 36 unsigned long mite_phys_addr; 37 + void __iomem *mite_io_addr; 38 unsigned long daq_phys_addr; 39 + void __iomem *daq_io_addr; 40 41 int DMA_CheckNearEnd; 42 ··· 60 int mite_setup(struct mite_struct *mite); 61 void mite_unsetup(struct mite_struct *mite); 62 void mite_list_devices(void); 63 64 #define CHAN_OFFSET(x) (0x100 * (x)) 65
+30 -37
drivers/staging/gpib/tnt4882/tnt4882_gpib.c
··· 45 unsigned short imr0_bits; 46 unsigned short imr3_bits; 47 unsigned short auxg_bits; // bits written to auxiliary register G 48 - void (*io_writeb)(unsigned int value, void *address); 49 - void (*io_writew)(unsigned int value, void *address); 50 - unsigned int (*io_readb)(void *address); 51 - unsigned int (*io_readw)(void *address); 52 }; 53 54 // interface functions ··· 100 /* paged io */ 101 static inline unsigned int tnt_paged_readb(struct tnt4882_priv *priv, unsigned long offset) 102 { 103 - priv->io_writeb(AUX_PAGEIN, priv->nec7210_priv.iobase + AUXMR * priv->nec7210_priv.offset); 104 udelay(1); 105 - return priv->io_readb(priv->nec7210_priv.iobase + offset); 106 } 107 108 static inline void tnt_paged_writeb(struct tnt4882_priv *priv, unsigned int value, 109 unsigned long offset) 110 { 111 - priv->io_writeb(AUX_PAGEIN, priv->nec7210_priv.iobase + AUXMR * priv->nec7210_priv.offset); 112 udelay(1); 113 - priv->io_writeb(value, priv->nec7210_priv.iobase + offset); 114 } 115 116 /* readb/writeb wrappers */ 117 static inline unsigned short tnt_readb(struct tnt4882_priv *priv, unsigned long offset) 118 { 119 - void *address = priv->nec7210_priv.iobase + offset; 120 unsigned long flags; 121 unsigned short retval; 122 spinlock_t *register_lock = &priv->nec7210_priv.register_page_lock; ··· 130 switch (priv->nec7210_priv.type) { 131 case TNT4882: 132 case TNT5004: 133 - retval = priv->io_readb(address); 134 break; 135 case NAT4882: 136 retval = tnt_paged_readb(priv, offset - tnt_pagein_offset); ··· 145 } 146 break; 147 default: 148 - retval = priv->io_readb(address); 149 break; 150 } 151 spin_unlock_irqrestore(register_lock, flags); ··· 154 155 static inline void tnt_writeb(struct tnt4882_priv *priv, unsigned short value, unsigned long offset) 156 { 157 - void *address = priv->nec7210_priv.iobase + offset; 158 unsigned long flags; 159 spinlock_t *register_lock = &priv->nec7210_priv.register_page_lock; 160 ··· 166 switch (priv->nec7210_priv.type) { 167 case TNT4882: 168 case TNT5004: 169 - priv->io_writeb(value, address); 170 break; 171 case NAT4882: 172 tnt_paged_writeb(priv, value, offset - tnt_pagein_offset); ··· 179 } 180 break; 181 default: 182 - priv->io_writeb(value, address); 183 break; 184 } 185 spin_unlock_irqrestore(register_lock, flags); ··· 284 while (fifo_word_available(tnt_priv) && count + 2 <= num_bytes) { 285 short word; 286 287 - word = tnt_priv->io_readw(nec_priv->iobase + FIFOB); 288 buffer[count++] = word & 0xff; 289 buffer[count++] = (word >> 8) & 0xff; 290 } ··· 569 word = buffer[count++] & 0xff; 570 if (count < length) 571 word |= (buffer[count++] << 8) & 0xff00; 572 - tnt_priv->io_writew(word, nec_priv->iobase + FIFOB); 573 } 574 // avoid unnecessary HR_NFF interrupts 575 // tnt_priv->imr3_bits |= HR_NFF; ··· 1265 if (tnt4882_allocate_private(board)) 1266 return -ENOMEM; 1267 tnt_priv = board->private_data; 1268 - tnt_priv->io_writeb = writeb_wrapper; 1269 - tnt_priv->io_readb = readb_wrapper; 1270 - tnt_priv->io_writew = writew_wrapper; 1271 - tnt_priv->io_readw = readw_wrapper; 1272 nec_priv = &tnt_priv->nec7210_priv; 1273 nec_priv->type = TNT4882; 1274 nec_priv->read_byte = nec7210_locking_iomem_read_byte; ··· 1316 return retval; 1317 } 1318 1319 - nec_priv->iobase = tnt_priv->mite->daq_io_addr; 1320 1321 // get irq 1322 if (request_irq(mite_irq(tnt_priv->mite), tnt4882_interrupt, isr_flags, ··· 1351 if (tnt_priv) { 1352 nec_priv = &tnt_priv->nec7210_priv; 1353 1354 - if (nec_priv->iobase) 1355 tnt4882_board_reset(tnt_priv, board); 1356 if (tnt_priv->irq) 1357 free_irq(tnt_priv->irq, board); ··· 1392 struct tnt4882_priv *tnt_priv; 1393 struct nec7210_priv *nec_priv; 1394 int isr_flags = 0; 1395 - void *iobase; 1396 int irq; 1397 1398 board->status = 0; ··· 1400 if (tnt4882_allocate_private(board)) 1401 return -ENOMEM; 1402 tnt_priv = board->private_data; 1403 - tnt_priv->io_writeb = outb_wrapper; 1404 - tnt_priv->io_readb = inb_wrapper; 1405 - tnt_priv->io_writew = outw_wrapper; 1406 - tnt_priv->io_readw = inw_wrapper; 1407 nec_priv = &tnt_priv->nec7210_priv; 1408 nec_priv->type = chipset; 1409 nec_priv->read_byte = nec7210_locking_ioport_read_byte; ··· 1415 if (retval < 0) 1416 return retval; 1417 tnt_priv->pnp_dev = dev; 1418 - iobase = (void *)(pnp_port_start(dev, 0)); 1419 irq = pnp_irq(dev, 0); 1420 } else { 1421 iobase = config->ibbase; 1422 irq = config->ibirq; 1423 } 1424 // allocate ioports 1425 - if (!request_region((unsigned long)(iobase), atgpib_iosize, "atgpib")) { 1426 pr_err("tnt4882: failed to allocate ioports\n"); 1427 return -1; 1428 } 1429 - nec_priv->iobase = iobase; 1430 1431 // get irq 1432 if (request_irq(irq, tnt4882_interrupt, isr_flags, "atgpib", board)) { ··· 1468 tnt4882_board_reset(tnt_priv, board); 1469 if (tnt_priv->irq) 1470 free_irq(tnt_priv->irq, board); 1471 if (nec_priv->iobase) 1472 - release_region((unsigned long)(nec_priv->iobase), atgpib_iosize); 1473 if (tnt_priv->pnp_dev) 1474 pnp_device_detach(tnt_priv->pnp_dev); 1475 } ··· 1809 if (tnt4882_allocate_private(board)) 1810 return -ENOMEM; 1811 tnt_priv = board->private_data; 1812 - tnt_priv->io_writeb = outb_wrapper; 1813 - tnt_priv->io_readb = inb_wrapper; 1814 - tnt_priv->io_writew = outw_wrapper; 1815 - tnt_priv->io_readw = inw_wrapper; 1816 nec_priv = &tnt_priv->nec7210_priv; 1817 nec_priv->type = TNT4882; 1818 nec_priv->read_byte = nec7210_locking_ioport_read_byte; ··· 1823 return -EIO; 1824 } 1825 1826 - nec_priv->iobase = (void *)(unsigned long)curr_dev->resource[0]->start; 1827 1828 // get irq 1829 if (request_irq(curr_dev->irq, tnt4882_interrupt, isr_flags, "tnt4882", board)) { ··· 1851 nec_priv = &tnt_priv->nec7210_priv; 1852 if (tnt_priv->irq) 1853 free_irq(tnt_priv->irq, board); 1854 if (nec_priv->iobase) { 1855 tnt4882_board_reset(tnt_priv, board); 1856 - release_region((unsigned long)nec_priv->iobase, pcmcia_gpib_iosize); 1857 } 1858 } 1859 tnt4882_free_private(board);
··· 45 unsigned short imr0_bits; 46 unsigned short imr3_bits; 47 unsigned short auxg_bits; // bits written to auxiliary register G 48 }; 49 50 // interface functions ··· 104 /* paged io */ 105 static inline unsigned int tnt_paged_readb(struct tnt4882_priv *priv, unsigned long offset) 106 { 107 + iowrite8(AUX_PAGEIN, priv->nec7210_priv.mmiobase + AUXMR * priv->nec7210_priv.offset); 108 udelay(1); 109 + return ioread8(priv->nec7210_priv.mmiobase + offset); 110 } 111 112 static inline void tnt_paged_writeb(struct tnt4882_priv *priv, unsigned int value, 113 unsigned long offset) 114 { 115 + iowrite8(AUX_PAGEIN, priv->nec7210_priv.mmiobase + AUXMR * priv->nec7210_priv.offset); 116 udelay(1); 117 + iowrite8(value, priv->nec7210_priv.mmiobase + offset); 118 } 119 120 /* readb/writeb wrappers */ 121 static inline unsigned short tnt_readb(struct tnt4882_priv *priv, unsigned long offset) 122 { 123 + void *address = priv->nec7210_priv.mmiobase + offset; 124 unsigned long flags; 125 unsigned short retval; 126 spinlock_t *register_lock = &priv->nec7210_priv.register_page_lock; ··· 134 switch (priv->nec7210_priv.type) { 135 case TNT4882: 136 case TNT5004: 137 + retval = ioread8(address); 138 break; 139 case NAT4882: 140 retval = tnt_paged_readb(priv, offset - tnt_pagein_offset); ··· 149 } 150 break; 151 default: 152 + retval = ioread8(address); 153 break; 154 } 155 spin_unlock_irqrestore(register_lock, flags); ··· 158 159 static inline void tnt_writeb(struct tnt4882_priv *priv, unsigned short value, unsigned long offset) 160 { 161 + void *address = priv->nec7210_priv.mmiobase + offset; 162 unsigned long flags; 163 spinlock_t *register_lock = &priv->nec7210_priv.register_page_lock; 164 ··· 170 switch (priv->nec7210_priv.type) { 171 case TNT4882: 172 case TNT5004: 173 + iowrite8(value, address); 174 break; 175 case NAT4882: 176 tnt_paged_writeb(priv, value, offset - tnt_pagein_offset); ··· 183 } 184 break; 185 default: 186 + iowrite8(value, address); 187 break; 188 } 189 spin_unlock_irqrestore(register_lock, flags); ··· 288 while (fifo_word_available(tnt_priv) && count + 2 <= num_bytes) { 289 short word; 290 291 + word = ioread16(nec_priv->mmiobase + FIFOB); 292 buffer[count++] = word & 0xff; 293 buffer[count++] = (word >> 8) & 0xff; 294 } ··· 573 word = buffer[count++] & 0xff; 574 if (count < length) 575 word |= (buffer[count++] << 8) & 0xff00; 576 + iowrite16(word, nec_priv->mmiobase + FIFOB); 577 } 578 // avoid unnecessary HR_NFF interrupts 579 // tnt_priv->imr3_bits |= HR_NFF; ··· 1269 if (tnt4882_allocate_private(board)) 1270 return -ENOMEM; 1271 tnt_priv = board->private_data; 1272 nec_priv = &tnt_priv->nec7210_priv; 1273 nec_priv->type = TNT4882; 1274 nec_priv->read_byte = nec7210_locking_iomem_read_byte; ··· 1324 return retval; 1325 } 1326 1327 + nec_priv->mmiobase = tnt_priv->mite->daq_io_addr; 1328 1329 // get irq 1330 if (request_irq(mite_irq(tnt_priv->mite), tnt4882_interrupt, isr_flags, ··· 1359 if (tnt_priv) { 1360 nec_priv = &tnt_priv->nec7210_priv; 1361 1362 + if (nec_priv->mmiobase) 1363 tnt4882_board_reset(tnt_priv, board); 1364 if (tnt_priv->irq) 1365 free_irq(tnt_priv->irq, board); ··· 1400 struct tnt4882_priv *tnt_priv; 1401 struct nec7210_priv *nec_priv; 1402 int isr_flags = 0; 1403 + u32 iobase; 1404 int irq; 1405 1406 board->status = 0; ··· 1408 if (tnt4882_allocate_private(board)) 1409 return -ENOMEM; 1410 tnt_priv = board->private_data; 1411 nec_priv = &tnt_priv->nec7210_priv; 1412 nec_priv->type = chipset; 1413 nec_priv->read_byte = nec7210_locking_ioport_read_byte; ··· 1427 if (retval < 0) 1428 return retval; 1429 tnt_priv->pnp_dev = dev; 1430 + iobase = pnp_port_start(dev, 0); 1431 irq = pnp_irq(dev, 0); 1432 } else { 1433 iobase = config->ibbase; 1434 irq = config->ibirq; 1435 } 1436 // allocate ioports 1437 + if (!request_region(iobase, atgpib_iosize, "atgpib")) { 1438 pr_err("tnt4882: failed to allocate ioports\n"); 1439 return -1; 1440 } 1441 + nec_priv->mmiobase = ioport_map(iobase, atgpib_iosize); 1442 + if (!nec_priv->mmiobase) 1443 + return -1; 1444 1445 // get irq 1446 if (request_irq(irq, tnt4882_interrupt, isr_flags, "atgpib", board)) { ··· 1478 tnt4882_board_reset(tnt_priv, board); 1479 if (tnt_priv->irq) 1480 free_irq(tnt_priv->irq, board); 1481 + if (nec_priv->mmiobase) 1482 + ioport_unmap(nec_priv->mmiobase); 1483 if (nec_priv->iobase) 1484 + release_region(nec_priv->iobase, atgpib_iosize); 1485 if (tnt_priv->pnp_dev) 1486 pnp_device_detach(tnt_priv->pnp_dev); 1487 } ··· 1817 if (tnt4882_allocate_private(board)) 1818 return -ENOMEM; 1819 tnt_priv = board->private_data; 1820 nec_priv = &tnt_priv->nec7210_priv; 1821 nec_priv->type = TNT4882; 1822 nec_priv->read_byte = nec7210_locking_ioport_read_byte; ··· 1835 return -EIO; 1836 } 1837 1838 + nec_priv->mmiobase = ioport_map(curr_dev->resource[0]->start, 1839 + resource_size(curr_dev->resource[0])); 1840 + if (!nec_priv->mmiobase) 1841 + return -1; 1842 1843 // get irq 1844 if (request_irq(curr_dev->irq, tnt4882_interrupt, isr_flags, "tnt4882", board)) { ··· 1860 nec_priv = &tnt_priv->nec7210_priv; 1861 if (tnt_priv->irq) 1862 free_irq(tnt_priv->irq, board); 1863 + if (nec_priv->mmiobase) 1864 + ioport_unmap(nec_priv->mmiobase); 1865 if (nec_priv->iobase) { 1866 tnt4882_board_reset(tnt_priv, board); 1867 + release_region(nec_priv->iobase, pcmcia_gpib_iosize); 1868 } 1869 } 1870 tnt4882_free_private(board);