Merge tag 'staging-6.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging driver fixes from Greg KH:
"Here are some small staging driver fixes that resolve some reported
issues and have been in my tree for too long due to the holiday break.
They resolve the following issues:

- lots of gpib build-time fixes as reported by testers and 0-day

- gpib logical fixes

- mailmap fix

All of these have been in linux-next for a while, with no reported
issues other than the duplicated change"

* tag 'staging-6.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
staging: gpib: mite: remove unused global functions
staging: gpib: refer to correct config symbol in tnt4882 Makefile
mailmap: update Bingwu Zhang's email address
staging: gpib: fix address space mixup
staging: gpib: use ioport_map
staging: gpib: fix pcmcia dependencies
staging: gpib: add module author and description fields
staging: gpib: fix Makefiles
staging: gpib: make global 'usec_diff' functions static
staging: gpib: Modify mismatched function name
staging: gpib: Add lower bound check for secondary address
staging: gpib: Fix erroneous removal of blank before newline

+2
.mailmap
··· 121 121 Benjamin Poirier <benjamin.poirier@gmail.com> <bpoirier@suse.de> 122 122 Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@gmail.com> 123 123 Benjamin Tissoires <bentiss@kernel.org> <benjamin.tissoires@redhat.com> 124 + Bingwu Zhang <xtex@aosc.io> <xtexchooser@duck.com> 125 + Bingwu Zhang <xtex@aosc.io> <xtex@xtexx.eu.org> 124 126 Bjorn Andersson <andersson@kernel.org> <bjorn@kryo.se> 125 127 Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@linaro.org> 126 128 Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com>
+6 -2
drivers/staging/gpib/Kconfig
··· 65 65 depends on ISA_BUS || PCI || PCMCIA 66 66 depends on HAS_IOPORT 67 67 depends on !X86_PAE 68 + depends on PCMCIA || !PCMCIA 69 + depends on HAS_IOPORT_MAP 68 70 select GPIB_COMMON 69 71 select GPIB_NEC7210 70 72 help ··· 91 89 depends on HAS_IOPORT 92 90 depends on ISA_BUS || PCI || PCMCIA 93 91 depends on !X86_PAE 92 + depends on PCMCIA || !PCMCIA 94 93 select GPIB_COMMON 95 94 select GPIB_NEC7210 96 95 help ··· 180 177 config GPIB_INES 181 178 tristate "INES" 182 179 depends on PCI || ISA_BUS || PCMCIA 180 + depends on PCMCIA || !PCMCIA 183 181 depends on HAS_IOPORT 184 182 depends on !X86_PAE 185 183 select GPIB_COMMON ··· 203 199 called cb7210. 204 200 205 201 config GPIB_PCMCIA 206 - bool "PCMCIA/Cardbus support for NI MC and Ines boards" 207 - depends on PCCARD && (GPIB_NI_PCI_ISA || GPIB_CB7210 || GPIB_INES) 202 + def_bool y 203 + depends on PCMCIA && (GPIB_NI_PCI_ISA || GPIB_CB7210 || GPIB_INES) 208 204 help 209 205 Enable PCMCIA/CArdbus support for National Instruments, 210 206 measurement computing boards and Ines boards.
+1 -1
drivers/staging/gpib/agilent_82350b/Makefile
··· 1 1 2 - obj-m += agilent_82350b.o 2 + obj-$(CONFIG_GPIB_AGILENT_82350B) += agilent_82350b.o
+2 -2
drivers/staging/gpib/agilent_82350b/agilent_82350b.c
··· 700 700 GPIB_82350A_REGION)); 701 701 dev_dbg(board->gpib_dev, "%s: gpib base address remapped to 0x%p\n", 702 702 driver_name, a_priv->gpib_base); 703 - tms_priv->iobase = a_priv->gpib_base + TMS9914_BASE_REG; 703 + tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG; 704 704 a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device, 705 705 SRAM_82350A_REGION), 706 706 pci_resource_len(a_priv->pci_device, ··· 724 724 pci_resource_len(a_priv->pci_device, GPIB_REGION)); 725 725 dev_dbg(board->gpib_dev, "%s: gpib base address remapped to 0x%p\n", 726 726 driver_name, a_priv->gpib_base); 727 - tms_priv->iobase = a_priv->gpib_base + TMS9914_BASE_REG; 727 + tms_priv->mmiobase = a_priv->gpib_base + TMS9914_BASE_REG; 728 728 a_priv->sram_base = ioremap(pci_resource_start(a_priv->pci_device, SRAM_REGION), 729 729 pci_resource_len(a_priv->pci_device, SRAM_REGION)); 730 730 dev_dbg(board->gpib_dev, "%s: sram base address remapped to 0x%p\n",
+1 -1
drivers/staging/gpib/agilent_82357a/Makefile
··· 1 1 2 - obj-m += agilent_82357a.o 2 + obj-$(CONFIG_GPIB_AGILENT_82357A) += agilent_82357a.o 3 3 4 4
+1 -1
drivers/staging/gpib/cb7210/Makefile
··· 1 1 ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA 2 - obj-m += cb7210.o 2 + obj-$(CONFIG_GPIB_CB7210) += cb7210.o 3 3 4 4
+6 -6
drivers/staging/gpib/cb7210/cb7210.c
··· 971 971 switch (cb_priv->pci_chip) { 972 972 case PCI_CHIP_AMCC_S5933: 973 973 cb_priv->amcc_iobase = pci_resource_start(cb_priv->pci_device, 0); 974 - nec_priv->iobase = (void *)(pci_resource_start(cb_priv->pci_device, 1)); 974 + nec_priv->iobase = pci_resource_start(cb_priv->pci_device, 1); 975 975 cb_priv->fifo_iobase = pci_resource_start(cb_priv->pci_device, 2); 976 976 break; 977 977 case PCI_CHIP_QUANCOM: 978 - nec_priv->iobase = (void *)(pci_resource_start(cb_priv->pci_device, 0)); 979 - cb_priv->fifo_iobase = (unsigned long)nec_priv->iobase; 978 + nec_priv->iobase = pci_resource_start(cb_priv->pci_device, 0); 979 + cb_priv->fifo_iobase = nec_priv->iobase; 980 980 break; 981 981 default: 982 982 pr_err("cb7210: bug! unhandled pci_chip=%i\n", cb_priv->pci_chip); ··· 1040 1040 return retval; 1041 1041 cb_priv = board->private_data; 1042 1042 nec_priv = &cb_priv->nec7210_priv; 1043 - if (request_region((unsigned long)config->ibbase, cb7210_iosize, "cb7210") == 0) { 1044 - pr_err("gpib: ioports starting at 0x%p are already in use\n", config->ibbase); 1043 + if (request_region(config->ibbase, cb7210_iosize, "cb7210") == 0) { 1044 + pr_err("gpib: ioports starting at 0x%u are already in use\n", config->ibbase); 1045 1045 return -EIO; 1046 1046 } 1047 1047 nec_priv->iobase = config->ibbase; ··· 1471 1471 (unsigned long)curr_dev->resource[0]->start); 1472 1472 return -EIO; 1473 1473 } 1474 - nec_priv->iobase = (void *)(unsigned long)curr_dev->resource[0]->start; 1474 + nec_priv->iobase = curr_dev->resource[0]->start; 1475 1475 cb_priv->fifo_iobase = curr_dev->resource[0]->start; 1476 1476 1477 1477 if (request_irq(curr_dev->irq, cb7210_interrupt, IRQF_SHARED,
+2 -2
drivers/staging/gpib/cb7210/cb7210.h
··· 113 113 HS_STATUS = 0x8, /* HS_STATUS register */ 114 114 }; 115 115 116 - static inline unsigned long nec7210_iobase(const struct cb7210_priv *cb_priv) 116 + static inline u32 nec7210_iobase(const struct cb7210_priv *cb_priv) 117 117 { 118 - return (unsigned long)(cb_priv->nec7210_priv.iobase); 118 + return cb_priv->nec7210_priv.iobase; 119 119 } 120 120 121 121 static inline int cb7210_page_in_bits(unsigned int page)
+1 -1
drivers/staging/gpib/cec/Makefile
··· 1 1 2 - obj-m += cec_gpib.o 2 + obj-$(CONFIG_GPIB_CEC_PCI) += cec_gpib.o 3 3
+2 -2
drivers/staging/gpib/cec/cec_gpib.c
··· 297 297 298 298 cec_priv->plx_iobase = pci_resource_start(cec_priv->pci_device, 1); 299 299 pr_info(" plx9050 base address 0x%lx\n", cec_priv->plx_iobase); 300 - nec_priv->iobase = (void *)(pci_resource_start(cec_priv->pci_device, 3)); 301 - pr_info(" nec7210 base address 0x%p\n", nec_priv->iobase); 300 + nec_priv->iobase = pci_resource_start(cec_priv->pci_device, 3); 301 + pr_info(" nec7210 base address 0x%x\n", nec_priv->iobase); 302 302 303 303 isr_flags |= IRQF_SHARED; 304 304 if (request_irq(cec_priv->pci_device->irq, cec_interrupt, isr_flags, "pci-gpib", board)) {
+2 -52
drivers/staging/gpib/common/gpib_os.c
··· 116 116 return 0; 117 117 } 118 118 119 - void writeb_wrapper(unsigned int value, void *address) 120 - { 121 - writeb(value, address); 122 - }; 123 - EXPORT_SYMBOL(writeb_wrapper); 124 - 125 - void writew_wrapper(unsigned int value, void *address) 126 - { 127 - writew(value, address); 128 - }; 129 - EXPORT_SYMBOL(writew_wrapper); 130 - 131 - unsigned int readb_wrapper(void *address) 132 - { 133 - return readb(address); 134 - }; 135 - EXPORT_SYMBOL(readb_wrapper); 136 - 137 - unsigned int readw_wrapper(void *address) 138 - { 139 - return readw(address); 140 - }; 141 - EXPORT_SYMBOL(readw_wrapper); 142 - 143 - #ifdef CONFIG_HAS_IOPORT 144 - void outb_wrapper(unsigned int value, void *address) 145 - { 146 - outb(value, (unsigned long)(address)); 147 - }; 148 - EXPORT_SYMBOL(outb_wrapper); 149 - 150 - void outw_wrapper(unsigned int value, void *address) 151 - { 152 - outw(value, (unsigned long)(address)); 153 - }; 154 - EXPORT_SYMBOL(outw_wrapper); 155 - 156 - unsigned int inb_wrapper(void *address) 157 - { 158 - return inb((unsigned long)(address)); 159 - }; 160 - EXPORT_SYMBOL(inb_wrapper); 161 - 162 - unsigned int inw_wrapper(void *address) 163 - { 164 - return inw((unsigned long)(address)); 165 - }; 166 - EXPORT_SYMBOL(inw_wrapper); 167 - #endif 168 - 169 119 /* this is a function instead of a constant because of Suse 170 120 * defining HZ to be a function call to get_hz() 171 121 */ ··· 486 536 return -1; 487 537 } 488 538 489 - if (pad > MAX_GPIB_PRIMARY_ADDRESS || sad > MAX_GPIB_SECONDARY_ADDRESS) { 539 + if (pad > MAX_GPIB_PRIMARY_ADDRESS || sad > MAX_GPIB_SECONDARY_ADDRESS || sad < -1) { 490 540 pr_err("gpib: bad address for serial poll"); 491 541 return -1; 492 542 } ··· 1573 1623 1574 1624 if (WARN_ON_ONCE(sizeof(void *) > sizeof(base_addr))) 1575 1625 return -EFAULT; 1576 - config->ibbase = (void *)(unsigned long)(base_addr); 1626 + config->ibbase = base_addr; 1577 1627 1578 1628 return 0; 1579 1629 }
+1 -1
drivers/staging/gpib/eastwood/Makefile
··· 1 1 2 - obj-m += fluke_gpib.o 2 + obj-$(CONFIG_GPIB_FLUKE) += fluke_gpib.o 3 3
+6 -6
drivers/staging/gpib/eastwood/fluke_gpib.c
··· 1011 1011 } 1012 1012 e_priv->gpib_iomem_res = res; 1013 1013 1014 - nec_priv->iobase = ioremap(e_priv->gpib_iomem_res->start, 1014 + nec_priv->mmiobase = ioremap(e_priv->gpib_iomem_res->start, 1015 1015 resource_size(e_priv->gpib_iomem_res)); 1016 - pr_info("gpib: iobase %lx remapped to %p, length=%d\n", 1017 - (unsigned long)e_priv->gpib_iomem_res->start, 1018 - nec_priv->iobase, (int)resource_size(e_priv->gpib_iomem_res)); 1019 - if (!nec_priv->iobase) { 1016 + pr_info("gpib: mmiobase %llx remapped to %p, length=%d\n", 1017 + (u64)e_priv->gpib_iomem_res->start, 1018 + nec_priv->mmiobase, (int)resource_size(e_priv->gpib_iomem_res)); 1019 + if (!nec_priv->mmiobase) { 1020 1020 dev_err(&fluke_gpib_pdev->dev, "Could not map I/O memory\n"); 1021 1021 return -ENOMEM; 1022 1022 } ··· 1107 1107 gpib_free_pseudo_irq(board); 1108 1108 nec_priv = &e_priv->nec7210_priv; 1109 1109 1110 - if (nec_priv->iobase) { 1110 + if (nec_priv->mmiobase) { 1111 1111 fluke_paged_write_byte(e_priv, 0, ISR0_IMR0, ISR0_IMR0_PAGE); 1112 1112 nec7210_board_reset(nec_priv, board); 1113 1113 }
+2 -2
drivers/staging/gpib/eastwood/fluke_gpib.h
··· 72 72 { 73 73 u8 retval; 74 74 75 - retval = readl(nec_priv->iobase + register_num * nec_priv->offset); 75 + retval = readl(nec_priv->mmiobase + register_num * nec_priv->offset); 76 76 return retval; 77 77 } 78 78 ··· 80 80 static inline void fluke_write_byte_nolock(struct nec7210_priv *nec_priv, uint8_t data, 81 81 int register_num) 82 82 { 83 - writel(data, nec_priv->iobase + register_num * nec_priv->offset); 83 + writel(data, nec_priv->mmiobase + register_num * nec_priv->offset); 84 84 } 85 85 86 86 static inline uint8_t fluke_paged_read_byte(struct fluke_priv *e_priv,
+14 -13
drivers/staging/gpib/fmh_gpib/fmh_gpib.c
··· 24 24 #include <linux/slab.h> 25 25 26 26 MODULE_LICENSE("GPL"); 27 + MODULE_DESCRIPTION("GPIB Driver for fmh_gpib_core"); 28 + MODULE_AUTHOR("Frank Mori Hess <fmh6jj@gmail.com>"); 27 29 28 30 static irqreturn_t fmh_gpib_interrupt(int irq, void *arg); 29 31 static int fmh_gpib_attach_holdoff_all(gpib_board_t *board, const gpib_board_config_t *config); ··· 1421 1419 } 1422 1420 e_priv->gpib_iomem_res = res; 1423 1421 1424 - nec_priv->iobase = ioremap(e_priv->gpib_iomem_res->start, 1422 + nec_priv->mmiobase = ioremap(e_priv->gpib_iomem_res->start, 1425 1423 resource_size(e_priv->gpib_iomem_res)); 1426 - if (!nec_priv->iobase) { 1424 + if (!nec_priv->mmiobase) { 1427 1425 dev_err(board->dev, "Could not map I/O memory for gpib\n"); 1428 1426 return -ENOMEM; 1429 1427 } 1430 - dev_info(board->dev, "iobase 0x%lx remapped to %p, length=%ld\n", 1431 - (unsigned long)e_priv->gpib_iomem_res->start, 1432 - nec_priv->iobase, (unsigned long)resource_size(e_priv->gpib_iomem_res)); 1428 + dev_info(board->dev, "iobase %pr remapped to %p\n", 1429 + e_priv->gpib_iomem_res, nec_priv->mmiobase); 1433 1430 1434 1431 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dma_fifos"); 1435 1432 if (!res) { ··· 1508 1507 free_irq(e_priv->irq, board); 1509 1508 if (e_priv->fifo_base) 1510 1509 fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG); 1511 - if (nec_priv->iobase) { 1510 + if (nec_priv->mmiobase) { 1512 1511 write_byte(nec_priv, 0, ISR0_IMR0_REG); 1513 1512 nec7210_board_reset(nec_priv, board); 1514 1513 } 1515 1514 if (e_priv->fifo_base) 1516 1515 iounmap(e_priv->fifo_base); 1517 - if (nec_priv->iobase) 1518 - iounmap(nec_priv->iobase); 1516 + if (nec_priv->mmiobase) 1517 + iounmap(nec_priv->mmiobase); 1519 1518 if (e_priv->dma_port_res) { 1520 1519 release_mem_region(e_priv->dma_port_res->start, 1521 1520 resource_size(e_priv->dma_port_res)); ··· 1565 1564 e_priv->gpib_iomem_res = &pci_device->resource[gpib_control_status_pci_resource_index]; 1566 1565 e_priv->dma_port_res = &pci_device->resource[gpib_fifo_pci_resource_index]; 1567 1566 1568 - nec_priv->iobase = ioremap(pci_resource_start(pci_device, 1567 + nec_priv->mmiobase = ioremap(pci_resource_start(pci_device, 1569 1568 gpib_control_status_pci_resource_index), 1570 1569 pci_resource_len(pci_device, 1571 1570 gpib_control_status_pci_resource_index)); 1572 1571 dev_info(board->dev, "base address for gpib control/status registers remapped to 0x%p\n", 1573 - nec_priv->iobase); 1572 + nec_priv->mmiobase); 1574 1573 1575 1574 if (e_priv->dma_port_res->flags & IORESOURCE_MEM) { 1576 1575 e_priv->fifo_base = ioremap(pci_resource_start(pci_device, ··· 1633 1632 free_irq(e_priv->irq, board); 1634 1633 if (e_priv->fifo_base) 1635 1634 fifos_write(e_priv, 0, FIFO_CONTROL_STATUS_REG); 1636 - if (nec_priv->iobase) { 1635 + if (nec_priv->mmiobase) { 1637 1636 write_byte(nec_priv, 0, ISR0_IMR0_REG); 1638 1637 nec7210_board_reset(nec_priv, board); 1639 1638 } 1640 1639 if (e_priv->fifo_base) 1641 1640 iounmap(e_priv->fifo_base); 1642 - if (nec_priv->iobase) 1643 - iounmap(nec_priv->iobase); 1641 + if (nec_priv->mmiobase) 1642 + iounmap(nec_priv->mmiobase); 1644 1643 if (e_priv->dma_port_res || e_priv->gpib_iomem_res) 1645 1644 pci_release_regions(to_pci_dev(board->dev)); 1646 1645 if (board->dev)
+2 -2
drivers/staging/gpib/fmh_gpib/fmh_gpib.h
··· 127 127 static inline uint8_t gpib_cs_read_byte(struct nec7210_priv *nec_priv, 128 128 unsigned int register_num) 129 129 { 130 - return readb(nec_priv->iobase + register_num * nec_priv->offset); 130 + return readb(nec_priv->mmiobase + register_num * nec_priv->offset); 131 131 } 132 132 133 133 static inline void gpib_cs_write_byte(struct nec7210_priv *nec_priv, uint8_t data, 134 134 unsigned int register_num) 135 135 { 136 - writeb(data, nec_priv->iobase + register_num * nec_priv->offset); 136 + writeb(data, nec_priv->mmiobase + register_num * nec_priv->offset); 137 137 } 138 138 139 139 static inline uint16_t fifos_read(struct fmh_priv *fmh_priv, int register_num)
+1 -1
drivers/staging/gpib/gpio/Makefile
··· 1 1 2 - obj-m += gpib_bitbang.o 2 + obj-$(CONFIG_GPIB_GPIO) += gpib_bitbang.o 3 3 4 4
+1 -1
drivers/staging/gpib/gpio/gpib_bitbang.c
··· 315 315 enum listener_function_state listener_state; 316 316 }; 317 317 318 - inline long usec_diff(struct timespec64 *a, struct timespec64 *b); 318 + static inline long usec_diff(struct timespec64 *a, struct timespec64 *b); 319 319 static void bb_buffer_print(unsigned char *buffer, size_t length, int cmd, int eoi); 320 320 static void set_data_lines(u8 byte); 321 321 static u8 get_data_lines(void);
+1 -1
drivers/staging/gpib/hp_82335/Makefile
··· 1 1 2 - obj-m += hp82335.o 2 + obj-$(CONFIG_GPIB_HP82335) += hp82335.o 3 3 4 4
+11 -10
drivers/staging/gpib/hp_82335/hp82335.c
··· 9 9 */ 10 10 11 11 #include "hp82335.h" 12 + #include <linux/io.h> 12 13 #include <linux/ioport.h> 13 14 #include <linux/sched.h> 14 15 #include <linux/module.h> ··· 234 233 { 235 234 struct tms9914_priv *tms_priv = &hp_priv->tms9914_priv; 236 235 237 - writeb(0, tms_priv->iobase + HPREG_INTR_CLEAR); 236 + writeb(0, tms_priv->mmiobase + HPREG_INTR_CLEAR); 238 237 } 239 238 240 239 int hp82335_attach(gpib_board_t *board, const gpib_board_config_t *config) ··· 242 241 struct hp82335_priv *hp_priv; 243 242 struct tms9914_priv *tms_priv; 244 243 int retval; 245 - const unsigned long upper_iomem_base = (unsigned long)config->ibbase + hp82335_rom_size; 244 + const unsigned long upper_iomem_base = config->ibbase + hp82335_rom_size; 246 245 247 246 board->status = 0; 248 247 ··· 254 253 tms_priv->write_byte = hp82335_write_byte; 255 254 tms_priv->offset = 1; 256 255 257 - switch ((unsigned long)(config->ibbase)) { 256 + switch (config->ibbase) { 258 257 case 0xc4000: 259 258 case 0xc8000: 260 259 case 0xcc000: ··· 272 271 case 0xfc000: 273 272 break; 274 273 default: 275 - pr_err("hp82335: invalid base io address 0x%p\n", config->ibbase); 274 + pr_err("hp82335: invalid base io address 0x%u\n", config->ibbase); 276 275 return -EINVAL; 277 276 } 278 277 if (!request_mem_region(upper_iomem_base, hp82335_upper_iomem_size, "hp82335")) { ··· 281 280 return -EBUSY; 282 281 } 283 282 hp_priv->raw_iobase = upper_iomem_base; 284 - tms_priv->iobase = ioremap(upper_iomem_base, hp82335_upper_iomem_size); 283 + tms_priv->mmiobase = ioremap(upper_iomem_base, hp82335_upper_iomem_size); 285 284 pr_info("hp82335: upper half of 82335 iomem region 0x%lx remapped to 0x%p\n", 286 - hp_priv->raw_iobase, tms_priv->iobase); 285 + hp_priv->raw_iobase, tms_priv->mmiobase); 287 286 288 287 retval = request_irq(config->ibirq, hp82335_interrupt, 0, "hp82335", board); 289 288 if (retval) { ··· 297 296 298 297 hp82335_clear_interrupt(hp_priv); 299 298 300 - writeb(INTR_ENABLE, tms_priv->iobase + HPREG_CCR); 299 + writeb(INTR_ENABLE, tms_priv->mmiobase + HPREG_CCR); 301 300 302 301 tms9914_online(board, tms_priv); 303 302 ··· 313 312 tms_priv = &hp_priv->tms9914_priv; 314 313 if (hp_priv->irq) 315 314 free_irq(hp_priv->irq, board); 316 - if (tms_priv->iobase) { 317 - writeb(0, tms_priv->iobase + HPREG_CCR); 315 + if (tms_priv->mmiobase) { 316 + writeb(0, tms_priv->mmiobase + HPREG_CCR); 318 317 tms9914_board_reset(tms_priv); 319 - iounmap((void *)tms_priv->iobase); 318 + iounmap(tms_priv->mmiobase); 320 319 } 321 320 if (hp_priv->raw_iobase) 322 321 release_mem_region(hp_priv->raw_iobase, hp82335_upper_iomem_size);
+1 -1
drivers/staging/gpib/hp_82341/Makefile
··· 1 1 2 - obj-m += hp_82341.o 2 + obj-$(CONFIG_GPIB_HP82341) += hp_82341.o
+8 -8
drivers/staging/gpib/hp_82341/hp_82341.c
··· 473 473 474 474 static uint8_t hp_82341_read_byte(struct tms9914_priv *priv, unsigned int register_num) 475 475 { 476 - return inb((unsigned long)(priv->iobase) + register_num); 476 + return inb(priv->iobase + register_num); 477 477 } 478 478 479 479 static void hp_82341_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num) 480 480 { 481 - outb(data, (unsigned long)(priv->iobase) + register_num); 481 + outb(data, priv->iobase + register_num); 482 482 } 483 483 484 484 static int hp_82341_find_isapnp_board(struct pnp_dev **dev) ··· 682 682 { 683 683 struct hp_82341_priv *hp_priv; 684 684 struct tms9914_priv *tms_priv; 685 - unsigned long start_addr; 686 - void *iobase; 685 + u32 start_addr; 686 + u32 iobase; 687 687 int irq; 688 688 int i; 689 689 int retval; ··· 704 704 if (retval < 0) 705 705 return retval; 706 706 hp_priv->pnp_dev = dev; 707 - iobase = (void *)(pnp_port_start(dev, 0)); 707 + iobase = pnp_port_start(dev, 0); 708 708 irq = pnp_irq(dev, 0); 709 709 hp_priv->hw_version = HW_VERSION_82341D; 710 710 hp_priv->io_region_offset = 0x8; ··· 714 714 hp_priv->hw_version = HW_VERSION_82341C; 715 715 hp_priv->io_region_offset = 0x400; 716 716 } 717 - pr_info("hp_82341: base io 0x%p\n", iobase); 717 + pr_info("hp_82341: base io 0x%u\n", iobase); 718 718 for (i = 0; i < hp_82341_num_io_regions; ++i) { 719 - start_addr = (unsigned long)(iobase) + i * hp_priv->io_region_offset; 719 + start_addr = iobase + i * hp_priv->io_region_offset; 720 720 if (!request_region(start_addr, hp_82341_region_iosize, "hp_82341")) { 721 721 pr_err("hp_82341: failed to allocate io ports 0x%lx-0x%lx\n", 722 722 start_addr, ··· 725 725 } 726 726 hp_priv->iobase[i] = start_addr; 727 727 } 728 - tms_priv->iobase = (void *)(hp_priv->iobase[2]); 728 + tms_priv->iobase = hp_priv->iobase[2]; 729 729 if (hp_priv->hw_version == HW_VERSION_82341D) { 730 730 retval = isapnp_cfg_begin(hp_priv->pnp_dev->card->number, 731 731 hp_priv->pnp_dev->number);
+1 -11
drivers/staging/gpib/include/gpibP.h
··· 16 16 17 17 #include <linux/fs.h> 18 18 #include <linux/interrupt.h> 19 + #include <linux/io.h> 19 20 20 21 void gpib_register_driver(gpib_interface_t *interface, struct module *mod); 21 22 void gpib_unregister_driver(gpib_interface_t *interface); ··· 35 34 extern gpib_board_t board_array[GPIB_MAX_NUM_BOARDS]; 36 35 37 36 extern struct list_head registered_drivers; 38 - 39 - #include <linux/io.h> 40 - 41 - void writeb_wrapper(unsigned int value, void *address); 42 - unsigned int readb_wrapper(void *address); 43 - void outb_wrapper(unsigned int value, void *address); 44 - unsigned int inb_wrapper(void *address); 45 - void writew_wrapper(unsigned int value, void *address); 46 - unsigned int readw_wrapper(void *address); 47 - void outw_wrapper(unsigned int value, void *address); 48 - unsigned int inw_wrapper(void *address); 49 37 50 38 #endif // _GPIB_P_H 51 39
+2 -1
drivers/staging/gpib/include/gpib_types.h
··· 31 31 void *init_data; 32 32 int init_data_length; 33 33 /* IO base address to use for non-pnp cards (set by core, driver should make local copy) */ 34 - void *ibbase; 34 + u32 ibbase; 35 + void __iomem *mmibbase; 35 36 /* IRQ to use for non-pnp cards (set by core, driver should make local copy) */ 36 37 unsigned int ibirq; 37 38 /* dma channel to use for non-pnp cards (set by core, driver should make local copy) */
+4 -1
drivers/staging/gpib/include/nec7210.h
··· 18 18 19 19 /* struct used to provide variables local to a nec7210 chip */ 20 20 struct nec7210_priv { 21 - void *iobase; 21 + #ifdef CONFIG_HAS_IOPORT 22 + u32 iobase; 23 + #endif 24 + void __iomem *mmiobase; 22 25 unsigned int offset; // offset between successive nec7210 io addresses 23 26 unsigned int dma_channel; 24 27 u8 *dma_buffer;
+4 -1
drivers/staging/gpib/include/tms9914.h
··· 20 20 21 21 /* struct used to provide variables local to a tms9914 chip */ 22 22 struct tms9914_priv { 23 - void *iobase; 23 + #ifdef CONFIG_HAS_IOPORT 24 + u32 iobase; 25 + #endif 26 + void __iomem *mmiobase; 24 27 unsigned int offset; // offset between successive tms9914 io addresses 25 28 unsigned int dma_channel; 26 29 // software copy of bits written to interrupt mask registers
+1 -1
drivers/staging/gpib/ines/Makefile
··· 1 1 ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA 2 - obj-m += ines_gpib.o 2 + obj-$(CONFIG_GPIB_INES) += ines_gpib.o 3 3 4 4
+2 -2
drivers/staging/gpib/ines/ines.h
··· 83 83 /* inb/outb wrappers */ 84 84 static inline unsigned int ines_inb(struct ines_priv *priv, unsigned int register_number) 85 85 { 86 - return inb((unsigned long)(priv->nec7210_priv.iobase) + 86 + return inb(priv->nec7210_priv.iobase + 87 87 register_number * priv->nec7210_priv.offset); 88 88 } 89 89 90 90 static inline void ines_outb(struct ines_priv *priv, unsigned int value, 91 91 unsigned int register_number) 92 92 { 93 - outb(value, (unsigned long)(priv->nec7210_priv.iobase) + 93 + outb(value, priv->nec7210_priv.iobase + 94 94 register_number * priv->nec7210_priv.offset); 95 95 } 96 96
+11 -11
drivers/staging/gpib/ines/ines_gpib.c
··· 273 273 struct nec7210_priv *nec_priv = &priv->nec7210_priv; 274 274 275 275 if (priv->pci_chip_type == PCI_CHIP_QUANCOM) { 276 - if ((inb((unsigned long)nec_priv->iobase + 276 + if ((inb(nec_priv->iobase + 277 277 QUANCOM_IRQ_CONTROL_STATUS_REG) & 278 278 QUANCOM_IRQ_ASSERTED_BIT)) 279 - outb(QUANCOM_IRQ_ENABLE_BIT, (unsigned long)(nec_priv->iobase) + 279 + outb(QUANCOM_IRQ_ENABLE_BIT, nec_priv->iobase + 280 280 QUANCOM_IRQ_CONTROL_STATUS_REG); 281 281 } 282 282 ··· 780 780 781 781 if (pci_request_regions(ines_priv->pci_device, "ines-gpib")) 782 782 return -1; 783 - nec_priv->iobase = (void *)(pci_resource_start(ines_priv->pci_device, 784 - found_id.gpib_region)); 783 + nec_priv->iobase = pci_resource_start(ines_priv->pci_device, 784 + found_id.gpib_region); 785 785 786 786 ines_priv->pci_chip_type = found_id.pci_chip_type; 787 787 nec_priv->offset = found_id.io_offset; ··· 840 840 } 841 841 break; 842 842 case PCI_CHIP_QUANCOM: 843 - outb(QUANCOM_IRQ_ENABLE_BIT, (unsigned long)(nec_priv->iobase) + 843 + outb(QUANCOM_IRQ_ENABLE_BIT, nec_priv->iobase + 844 844 QUANCOM_IRQ_CONTROL_STATUS_REG); 845 845 break; 846 846 case PCI_CHIP_QUICKLOGIC5030: ··· 899 899 ines_priv = board->private_data; 900 900 nec_priv = &ines_priv->nec7210_priv; 901 901 902 - if (!request_region((unsigned long)config->ibbase, ines_isa_iosize, "ines_gpib")) { 903 - pr_err("ines_gpib: ioports at 0x%p already in use\n", config->ibbase); 902 + if (!request_region(config->ibbase, ines_isa_iosize, "ines_gpib")) { 903 + pr_err("ines_gpib: ioports at 0x%x already in use\n", config->ibbase); 904 904 return -1; 905 905 } 906 906 nec_priv->iobase = config->ibbase; ··· 931 931 break; 932 932 case PCI_CHIP_QUANCOM: 933 933 if (nec_priv->iobase) 934 - outb(0, (unsigned long)(nec_priv->iobase) + 934 + outb(0, nec_priv->iobase + 935 935 QUANCOM_IRQ_CONTROL_STATUS_REG); 936 936 break; 937 937 default: ··· 960 960 free_irq(ines_priv->irq, board); 961 961 if (nec_priv->iobase) { 962 962 nec7210_board_reset(nec_priv, board); 963 - release_region((unsigned long)(nec_priv->iobase), ines_isa_iosize); 963 + release_region(nec_priv->iobase, ines_isa_iosize); 964 964 } 965 965 } 966 966 ines_free_private(board); ··· 1355 1355 return -1; 1356 1356 } 1357 1357 1358 - nec_priv->iobase = (void *)(unsigned long)curr_dev->resource[0]->start; 1358 + nec_priv->iobase = curr_dev->resource[0]->start; 1359 1359 1360 1360 nec7210_board_reset(nec_priv, board); 1361 1361 ··· 1410 1410 free_irq(ines_priv->irq, board); 1411 1411 if (nec_priv->iobase) { 1412 1412 nec7210_board_reset(nec_priv, board); 1413 - release_region((unsigned long)(nec_priv->iobase), ines_pcmcia_iosize); 1413 + release_region(nec_priv->iobase, ines_pcmcia_iosize); 1414 1414 } 1415 1415 } 1416 1416 ines_free_private(board);
+1 -1
drivers/staging/gpib/lpvo_usb_gpib/Makefile
··· 1 1 2 - obj-m += lpvo_usb_gpib.o 2 + obj-$(CONFIG_GPIB_LPVO) += lpvo_usb_gpib.o 3 3
+9 -9
drivers/staging/gpib/lpvo_usb_gpib/lpvo_usb_gpib.c
··· 99 99 #define USB_GPIB_DEBUG_ON "\nIBDE\xAA\n" 100 100 #define USB_GPIB_SET_LISTEN "\nIBDT0\n" 101 101 #define USB_GPIB_SET_TALK "\nIBDT1\n" 102 - #define USB_GPIB_SET_LINES "\nIBDC\n" 103 - #define USB_GPIB_SET_DATA "\nIBDM\n" 102 + #define USB_GPIB_SET_LINES "\nIBDC.\n" 103 + #define USB_GPIB_SET_DATA "\nIBDM.\n" 104 104 #define USB_GPIB_READ_LINES "\nIBD?C\n" 105 105 #define USB_GPIB_READ_DATA "\nIBD?M\n" 106 106 #define USB_GPIB_READ_BUS "\nIBD??\n" ··· 210 210 * (unix time in sec and NANOsec) 211 211 */ 212 212 213 - inline int usec_diff(struct timespec64 *a, struct timespec64 *b) 213 + static inline int usec_diff(struct timespec64 *a, struct timespec64 *b) 214 214 { 215 215 return ((a->tv_sec - b->tv_sec) * 1000000 + 216 216 (a->tv_nsec - b->tv_nsec) / 1000); ··· 436 436 static int usb_gpib_attach(gpib_board_t *board, const gpib_board_config_t *config) 437 437 { 438 438 int retval, j; 439 - int base = (long)config->ibbase; 439 + u32 base = config->ibbase; 440 440 char *device_path; 441 441 int match; 442 442 struct usb_device *udev; ··· 589 589 size_t *bytes_written) 590 590 { 591 591 int i, retval; 592 - char command[6] = "IBc\n"; 592 + char command[6] = "IBc.\n"; 593 593 594 594 DIA_LOG(1, "enter %p\n", board); 595 595 ··· 608 608 } 609 609 610 610 /** 611 - * disable_eos() - Disable END on eos byte (END on EOI only) 611 + * usb_gpib_disable_eos() - Disable END on eos byte (END on EOI only) 612 612 * 613 613 * @board: the gpib_board data area for this gpib interface 614 614 * ··· 624 624 } 625 625 626 626 /** 627 - * enable_eos() - Enable END for reads when eos byte is received. 627 + * usb_gpib_enable_eos() - Enable END for reads when eos byte is received. 628 628 * 629 629 * @board: the gpib_board data area for this gpib interface 630 630 * @eos_byte: the 'eos' byte ··· 647 647 } 648 648 649 649 /** 650 - * go_to_standby() - De-assert ATN 650 + * usb_gpib_go_to_standby() - De-assert ATN 651 651 * 652 652 * @board: the gpib_board data area for this gpib interface 653 653 */ ··· 664 664 } 665 665 666 666 /** 667 - * interface_clear() - Assert or de-assert IFC 667 + * usb_gpib_interface_clear() - Assert or de-assert IFC 668 668 * 669 669 * @board: the gpib_board data area for this gpib interface 670 670 * assert: 1: assert IFC; 0: de-assert IFC
+8 -8
drivers/staging/gpib/nec7210/nec7210.c
··· 1035 1035 /* wrappers for io */ 1036 1036 uint8_t nec7210_ioport_read_byte(struct nec7210_priv *priv, unsigned int register_num) 1037 1037 { 1038 - return inb((unsigned long)(priv->iobase) + register_num * priv->offset); 1038 + return inb(priv->iobase + register_num * priv->offset); 1039 1039 } 1040 1040 EXPORT_SYMBOL(nec7210_ioport_read_byte); 1041 1041 ··· 1047 1047 */ 1048 1048 nec7210_locking_ioport_write_byte(priv, data, register_num); 1049 1049 else 1050 - outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset); 1050 + outb(data, priv->iobase + register_num * priv->offset); 1051 1051 } 1052 1052 EXPORT_SYMBOL(nec7210_ioport_write_byte); 1053 1053 ··· 1058 1058 unsigned long flags; 1059 1059 1060 1060 spin_lock_irqsave(&priv->register_page_lock, flags); 1061 - retval = inb((unsigned long)(priv->iobase) + register_num * priv->offset); 1061 + retval = inb(priv->iobase + register_num * priv->offset); 1062 1062 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1063 1063 return retval; 1064 1064 } ··· 1072 1072 spin_lock_irqsave(&priv->register_page_lock, flags); 1073 1073 if (register_num == AUXMR) 1074 1074 udelay(1); 1075 - outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset); 1075 + outb(data, priv->iobase + register_num * priv->offset); 1076 1076 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1077 1077 } 1078 1078 EXPORT_SYMBOL(nec7210_locking_ioport_write_byte); ··· 1080 1080 1081 1081 uint8_t nec7210_iomem_read_byte(struct nec7210_priv *priv, unsigned int register_num) 1082 1082 { 1083 - return readb(priv->iobase + register_num * priv->offset); 1083 + return readb(priv->mmiobase + register_num * priv->offset); 1084 1084 } 1085 1085 EXPORT_SYMBOL(nec7210_iomem_read_byte); 1086 1086 ··· 1092 1092 */ 1093 1093 nec7210_locking_iomem_write_byte(priv, data, register_num); 1094 1094 else 1095 - writeb(data, priv->iobase + register_num * priv->offset); 1095 + writeb(data, priv->mmiobase + register_num * priv->offset); 1096 1096 } 1097 1097 EXPORT_SYMBOL(nec7210_iomem_write_byte); 1098 1098 ··· 1102 1102 unsigned long flags; 1103 1103 1104 1104 spin_lock_irqsave(&priv->register_page_lock, flags); 1105 - retval = readb(priv->iobase + register_num * priv->offset); 1105 + retval = readb(priv->mmiobase + register_num * priv->offset); 1106 1106 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1107 1107 return retval; 1108 1108 } ··· 1116 1116 spin_lock_irqsave(&priv->register_page_lock, flags); 1117 1117 if (register_num == AUXMR) 1118 1118 udelay(1); 1119 - writeb(data, priv->iobase + register_num * priv->offset); 1119 + writeb(data, priv->mmiobase + register_num * priv->offset); 1120 1120 spin_unlock_irqrestore(&priv->register_page_lock, flags); 1121 1121 } 1122 1122 EXPORT_SYMBOL(nec7210_locking_iomem_write_byte);
+1 -1
drivers/staging/gpib/ni_usb/Makefile
··· 1 1 2 - obj-m += ni_usb_gpib.o 2 + obj-$(CONFIG_GPIB_NI_USB) += ni_usb_gpib.o 3 3 4 4
+1 -1
drivers/staging/gpib/pc2/Makefile
··· 1 1 2 - obj-m += pc2_gpib.o 2 + obj-$(CONFIG_GPIB_PC2) += pc2_gpib.o 3 3 4 4 5 5
+8 -8
drivers/staging/gpib/pc2/pc2_gpib.c
··· 426 426 nec_priv = &pc2_priv->nec7210_priv; 427 427 nec_priv->offset = pc2_reg_offset; 428 428 429 - if (request_region((unsigned long)config->ibbase, pc2_iosize, "pc2") == 0) { 429 + if (request_region(config->ibbase, pc2_iosize, "pc2") == 0) { 430 430 pr_err("gpib: ioports are already in use\n"); 431 431 return -1; 432 432 } ··· 471 471 free_irq(pc2_priv->irq, board); 472 472 if (nec_priv->iobase) { 473 473 nec7210_board_reset(nec_priv, board); 474 - release_region((unsigned long)(nec_priv->iobase), pc2_iosize); 474 + release_region(nec_priv->iobase, pc2_iosize); 475 475 } 476 476 if (nec_priv->dma_buffer) { 477 477 dma_free_coherent(board->dev, nec_priv->dma_buffer_length, ··· 498 498 nec_priv = &pc2_priv->nec7210_priv; 499 499 nec_priv->offset = pc2a_reg_offset; 500 500 501 - switch ((unsigned long)(config->ibbase)) { 501 + switch (config->ibbase) { 502 502 case 0x02e1: 503 503 case 0x22e1: 504 504 case 0x42e1: 505 505 case 0x62e1: 506 506 break; 507 507 default: 508 - pr_err("PCIIa base range invalid, must be one of 0x[0246]2e1, but is 0x%p\n", 508 + pr_err("PCIIa base range invalid, must be one of 0x[0246]2e1, but is 0x%d\n", 509 509 config->ibbase); 510 510 return -1; 511 511 } ··· 522 522 unsigned int err = 0; 523 523 524 524 for (i = 0; i < num_registers; i++) { 525 - if (check_region((unsigned long)config->ibbase + i * pc2a_reg_offset, 1)) 525 + if (check_region(config->ibbase + i * pc2a_reg_offset, 1)) 526 526 err++; 527 527 } 528 528 if (config->ibirq && check_region(pc2a_clear_intr_iobase + config->ibirq, 1)) ··· 533 533 } 534 534 #endif 535 535 for (i = 0; i < num_registers; i++) { 536 - if (!request_region((unsigned long)config->ibbase + 536 + if (!request_region(config->ibbase + 537 537 i * pc2a_reg_offset, 1, "pc2a")) { 538 538 pr_err("gpib: ioports are already in use"); 539 539 for (j = 0; j < i; j++) 540 - release_region((unsigned long)(config->ibbase) + 540 + release_region(config->ibbase + 541 541 j * pc2a_reg_offset, 1); 542 542 return -1; 543 543 } ··· 608 608 if (nec_priv->iobase) { 609 609 nec7210_board_reset(nec_priv, board); 610 610 for (i = 0; i < num_registers; i++) 611 - release_region((unsigned long)nec_priv->iobase + 611 + release_region(nec_priv->iobase + 612 612 i * pc2a_reg_offset, 1); 613 613 } 614 614 if (pc2_priv->clear_intr_addr)
+1 -1
drivers/staging/gpib/tms9914/Makefile
··· 1 1 2 - obj-m += tms9914.o 2 + obj-$(CONFIG_GPIB_TMS9914) += tms9914.o 3 3 4 4 5 5
+4 -4
drivers/staging/gpib/tms9914/tms9914.c
··· 866 866 // wrapper for inb 867 867 uint8_t tms9914_ioport_read_byte(struct tms9914_priv *priv, unsigned int register_num) 868 868 { 869 - return inb((unsigned long)(priv->iobase) + register_num * priv->offset); 869 + return inb(priv->iobase + register_num * priv->offset); 870 870 } 871 871 EXPORT_SYMBOL_GPL(tms9914_ioport_read_byte); 872 872 873 873 // wrapper for outb 874 874 void tms9914_ioport_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num) 875 875 { 876 - outb(data, (unsigned long)(priv->iobase) + register_num * priv->offset); 876 + outb(data, priv->iobase + register_num * priv->offset); 877 877 if (register_num == AUXCR) 878 878 udelay(1); 879 879 } ··· 883 883 // wrapper for readb 884 884 uint8_t tms9914_iomem_read_byte(struct tms9914_priv *priv, unsigned int register_num) 885 885 { 886 - return readb(priv->iobase + register_num * priv->offset); 886 + return readb(priv->mmiobase + register_num * priv->offset); 887 887 } 888 888 EXPORT_SYMBOL_GPL(tms9914_iomem_read_byte); 889 889 890 890 // wrapper for writeb 891 891 void tms9914_iomem_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num) 892 892 { 893 - writeb(data, priv->iobase + register_num * priv->offset); 893 + writeb(data, priv->mmiobase + register_num * priv->offset); 894 894 if (register_num == AUXCR) 895 895 udelay(1); 896 896 }
+1 -1
drivers/staging/gpib/tnt4882/Makefile
··· 1 1 ccflags-$(CONFIG_GPIB_PCMCIA) := -DGPIB_PCMCIA 2 - obj-m += tnt4882.o 2 + obj-$(CONFIG_GPIB_NI_PCI_ISA) += tnt4882.o 3 3 4 4 tnt4882-objs := tnt4882_gpib.o mite.o 5 5
-69
drivers/staging/gpib/tnt4882/mite.c
··· 148 148 } 149 149 pr_info("\n"); 150 150 } 151 - 152 - int mite_bytes_transferred(struct mite_struct *mite, int chan) 153 - { 154 - int dar, fcr; 155 - 156 - dar = readl(mite->mite_io_addr + MITE_DAR + CHAN_OFFSET(chan)); 157 - fcr = readl(mite->mite_io_addr + MITE_FCR + CHAN_OFFSET(chan)) & 0x000000FF; 158 - return dar - fcr; 159 - } 160 - 161 - int mite_dma_tcr(struct mite_struct *mite) 162 - { 163 - int tcr; 164 - int lkar; 165 - 166 - lkar = readl(mite->mite_io_addr + CHAN_OFFSET(0) + MITE_LKAR); 167 - tcr = readl(mite->mite_io_addr + CHAN_OFFSET(0) + MITE_TCR); 168 - MDPRINTK("lkar=0x%08x tcr=%d\n", lkar, tcr); 169 - 170 - return tcr; 171 - } 172 - 173 - void mite_dma_disarm(struct mite_struct *mite) 174 - { 175 - int chor; 176 - 177 - /* disarm */ 178 - chor = CHOR_ABORT; 179 - writel(chor, mite->mite_io_addr + CHAN_OFFSET(0) + MITE_CHOR); 180 - } 181 - 182 - void mite_dump_regs(struct mite_struct *mite) 183 - { 184 - void *addr = 0; 185 - unsigned long temp = 0; 186 - 187 - pr_info("mite address is =0x%p\n", mite->mite_io_addr); 188 - 189 - addr = mite->mite_io_addr + MITE_CHOR + CHAN_OFFSET(0); 190 - pr_info("mite status[CHOR]at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 191 - //mite_decode(mite_CHOR_strings,temp); 192 - addr = mite->mite_io_addr + MITE_CHCR + CHAN_OFFSET(0); 193 - pr_info("mite status[CHCR]at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 194 - //mite_decode(mite_CHCR_strings,temp); 195 - addr = mite->mite_io_addr + MITE_TCR + CHAN_OFFSET(0); 196 - pr_info("mite status[TCR] at 0x%p =0x%08x\n", addr, readl(addr)); 197 - addr = mite->mite_io_addr + MITE_MCR + CHAN_OFFSET(0); 198 - pr_info("mite status[MCR] at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 199 - //mite_decode(mite_MCR_strings,temp); 200 - addr = mite->mite_io_addr + MITE_MAR + CHAN_OFFSET(0); 201 - pr_info("mite status[MAR] at 0x%p =0x%08x\n", addr, readl(addr)); 202 - addr = mite->mite_io_addr + MITE_DCR + CHAN_OFFSET(0); 203 - pr_info("mite status[DCR] at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 204 - //mite_decode(mite_CR_strings,temp); 205 - addr = mite->mite_io_addr + MITE_DAR + CHAN_OFFSET(0); 206 - pr_info("mite status[DAR] at 0x%p =0x%08x\n", addr, readl(addr)); 207 - addr = mite->mite_io_addr + MITE_LKCR + CHAN_OFFSET(0); 208 - pr_info("mite status[LKCR]at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 209 - //mite_decode(mite_CR_strings,temp); 210 - addr = mite->mite_io_addr + MITE_LKAR + CHAN_OFFSET(0); 211 - pr_info("mite status[LKAR]at 0x%p =0x%08x\n", addr, readl(addr)); 212 - 213 - addr = mite->mite_io_addr + MITE_CHSR + CHAN_OFFSET(0); 214 - pr_info("mite status[CHSR]at 0x%p =0x%08lx\n", addr, temp = readl(addr)); 215 - //mite_decode(mite_CHSR_strings,temp); 216 - addr = mite->mite_io_addr + MITE_FCR + CHAN_OFFSET(0); 217 - pr_info("mite status[FCR] at 0x%p =0x%08x\n\n", addr, readl(addr)); 218 - } 219 -
+2 -11
drivers/staging/gpib/tnt4882/mite.h
··· 34 34 35 35 struct pci_dev *pcidev; 36 36 unsigned long mite_phys_addr; 37 - void *mite_io_addr; 37 + void __iomem *mite_io_addr; 38 38 unsigned long daq_phys_addr; 39 - void *daq_io_addr; 39 + void __iomem *daq_io_addr; 40 40 41 41 int DMA_CheckNearEnd; 42 42 ··· 60 60 int mite_setup(struct mite_struct *mite); 61 61 void mite_unsetup(struct mite_struct *mite); 62 62 void mite_list_devices(void); 63 - 64 - int mite_dma_tcr(struct mite_struct *mite); 65 - 66 - void mite_dma_arm(struct mite_struct *mite); 67 - void mite_dma_disarm(struct mite_struct *mite); 68 - 69 - void mite_dump_regs(struct mite_struct *mite); 70 - void mite_setregs(struct mite_struct *mite, unsigned long ll_start, int chan, int dir); 71 - int mite_bytes_transferred(struct mite_struct *mite, int chan); 72 63 73 64 #define CHAN_OFFSET(x) (0x100 * (x)) 74 65
+30 -37
drivers/staging/gpib/tnt4882/tnt4882_gpib.c
··· 45 45 unsigned short imr0_bits; 46 46 unsigned short imr3_bits; 47 47 unsigned short auxg_bits; // bits written to auxiliary register G 48 - void (*io_writeb)(unsigned int value, void *address); 49 - void (*io_writew)(unsigned int value, void *address); 50 - unsigned int (*io_readb)(void *address); 51 - unsigned int (*io_readw)(void *address); 52 48 }; 53 49 54 50 // interface functions ··· 100 104 /* paged io */ 101 105 static inline unsigned int tnt_paged_readb(struct tnt4882_priv *priv, unsigned long offset) 102 106 { 103 - priv->io_writeb(AUX_PAGEIN, priv->nec7210_priv.iobase + AUXMR * priv->nec7210_priv.offset); 107 + iowrite8(AUX_PAGEIN, priv->nec7210_priv.mmiobase + AUXMR * priv->nec7210_priv.offset); 104 108 udelay(1); 105 - return priv->io_readb(priv->nec7210_priv.iobase + offset); 109 + return ioread8(priv->nec7210_priv.mmiobase + offset); 106 110 } 107 111 108 112 static inline void tnt_paged_writeb(struct tnt4882_priv *priv, unsigned int value, 109 113 unsigned long offset) 110 114 { 111 - priv->io_writeb(AUX_PAGEIN, priv->nec7210_priv.iobase + AUXMR * priv->nec7210_priv.offset); 115 + iowrite8(AUX_PAGEIN, priv->nec7210_priv.mmiobase + AUXMR * priv->nec7210_priv.offset); 112 116 udelay(1); 113 - priv->io_writeb(value, priv->nec7210_priv.iobase + offset); 117 + iowrite8(value, priv->nec7210_priv.mmiobase + offset); 114 118 } 115 119 116 120 /* readb/writeb wrappers */ 117 121 static inline unsigned short tnt_readb(struct tnt4882_priv *priv, unsigned long offset) 118 122 { 119 - void *address = priv->nec7210_priv.iobase + offset; 123 + void *address = priv->nec7210_priv.mmiobase + offset; 120 124 unsigned long flags; 121 125 unsigned short retval; 122 126 spinlock_t *register_lock = &priv->nec7210_priv.register_page_lock; ··· 130 134 switch (priv->nec7210_priv.type) { 131 135 case TNT4882: 132 136 case TNT5004: 133 - retval = priv->io_readb(address); 137 + retval = ioread8(address); 134 138 break; 135 139 case NAT4882: 136 140 retval = tnt_paged_readb(priv, offset - tnt_pagein_offset); ··· 145 149 } 146 150 break; 147 151 default: 148 - retval = priv->io_readb(address); 152 + retval = ioread8(address); 149 153 break; 150 154 } 151 155 spin_unlock_irqrestore(register_lock, flags); ··· 154 158 155 159 static inline void tnt_writeb(struct tnt4882_priv *priv, unsigned short value, unsigned long offset) 156 160 { 157 - void *address = priv->nec7210_priv.iobase + offset; 161 + void *address = priv->nec7210_priv.mmiobase + offset; 158 162 unsigned long flags; 159 163 spinlock_t *register_lock = &priv->nec7210_priv.register_page_lock; 160 164 ··· 166 170 switch (priv->nec7210_priv.type) { 167 171 case TNT4882: 168 172 case TNT5004: 169 - priv->io_writeb(value, address); 173 + iowrite8(value, address); 170 174 break; 171 175 case NAT4882: 172 176 tnt_paged_writeb(priv, value, offset - tnt_pagein_offset); ··· 179 183 } 180 184 break; 181 185 default: 182 - priv->io_writeb(value, address); 186 + iowrite8(value, address); 183 187 break; 184 188 } 185 189 spin_unlock_irqrestore(register_lock, flags); ··· 284 288 while (fifo_word_available(tnt_priv) && count + 2 <= num_bytes) { 285 289 short word; 286 290 287 - word = tnt_priv->io_readw(nec_priv->iobase + FIFOB); 291 + word = ioread16(nec_priv->mmiobase + FIFOB); 288 292 buffer[count++] = word & 0xff; 289 293 buffer[count++] = (word >> 8) & 0xff; 290 294 } ··· 569 573 word = buffer[count++] & 0xff; 570 574 if (count < length) 571 575 word |= (buffer[count++] << 8) & 0xff00; 572 - tnt_priv->io_writew(word, nec_priv->iobase + FIFOB); 576 + iowrite16(word, nec_priv->mmiobase + FIFOB); 573 577 } 574 578 // avoid unnecessary HR_NFF interrupts 575 579 // tnt_priv->imr3_bits |= HR_NFF; ··· 1265 1269 if (tnt4882_allocate_private(board)) 1266 1270 return -ENOMEM; 1267 1271 tnt_priv = board->private_data; 1268 - tnt_priv->io_writeb = writeb_wrapper; 1269 - tnt_priv->io_readb = readb_wrapper; 1270 - tnt_priv->io_writew = writew_wrapper; 1271 - tnt_priv->io_readw = readw_wrapper; 1272 1272 nec_priv = &tnt_priv->nec7210_priv; 1273 1273 nec_priv->type = TNT4882; 1274 1274 nec_priv->read_byte = nec7210_locking_iomem_read_byte; ··· 1316 1324 return retval; 1317 1325 } 1318 1326 1319 - nec_priv->iobase = tnt_priv->mite->daq_io_addr; 1327 + nec_priv->mmiobase = tnt_priv->mite->daq_io_addr; 1320 1328 1321 1329 // get irq 1322 1330 if (request_irq(mite_irq(tnt_priv->mite), tnt4882_interrupt, isr_flags, ··· 1351 1359 if (tnt_priv) { 1352 1360 nec_priv = &tnt_priv->nec7210_priv; 1353 1361 1354 - if (nec_priv->iobase) 1362 + if (nec_priv->mmiobase) 1355 1363 tnt4882_board_reset(tnt_priv, board); 1356 1364 if (tnt_priv->irq) 1357 1365 free_irq(tnt_priv->irq, board); ··· 1392 1400 struct tnt4882_priv *tnt_priv; 1393 1401 struct nec7210_priv *nec_priv; 1394 1402 int isr_flags = 0; 1395 - void *iobase; 1403 + u32 iobase; 1396 1404 int irq; 1397 1405 1398 1406 board->status = 0; ··· 1400 1408 if (tnt4882_allocate_private(board)) 1401 1409 return -ENOMEM; 1402 1410 tnt_priv = board->private_data; 1403 - tnt_priv->io_writeb = outb_wrapper; 1404 - tnt_priv->io_readb = inb_wrapper; 1405 - tnt_priv->io_writew = outw_wrapper; 1406 - tnt_priv->io_readw = inw_wrapper; 1407 1411 nec_priv = &tnt_priv->nec7210_priv; 1408 1412 nec_priv->type = chipset; 1409 1413 nec_priv->read_byte = nec7210_locking_ioport_read_byte; ··· 1415 1427 if (retval < 0) 1416 1428 return retval; 1417 1429 tnt_priv->pnp_dev = dev; 1418 - iobase = (void *)(pnp_port_start(dev, 0)); 1430 + iobase = pnp_port_start(dev, 0); 1419 1431 irq = pnp_irq(dev, 0); 1420 1432 } else { 1421 1433 iobase = config->ibbase; 1422 1434 irq = config->ibirq; 1423 1435 } 1424 1436 // allocate ioports 1425 - if (!request_region((unsigned long)(iobase), atgpib_iosize, "atgpib")) { 1437 + if (!request_region(iobase, atgpib_iosize, "atgpib")) { 1426 1438 pr_err("tnt4882: failed to allocate ioports\n"); 1427 1439 return -1; 1428 1440 } 1429 - nec_priv->iobase = iobase; 1441 + nec_priv->mmiobase = ioport_map(iobase, atgpib_iosize); 1442 + if (!nec_priv->mmiobase) 1443 + return -1; 1430 1444 1431 1445 // get irq 1432 1446 if (request_irq(irq, tnt4882_interrupt, isr_flags, "atgpib", board)) { ··· 1468 1478 tnt4882_board_reset(tnt_priv, board); 1469 1479 if (tnt_priv->irq) 1470 1480 free_irq(tnt_priv->irq, board); 1481 + if (nec_priv->mmiobase) 1482 + ioport_unmap(nec_priv->mmiobase); 1471 1483 if (nec_priv->iobase) 1472 - release_region((unsigned long)(nec_priv->iobase), atgpib_iosize); 1484 + release_region(nec_priv->iobase, atgpib_iosize); 1473 1485 if (tnt_priv->pnp_dev) 1474 1486 pnp_device_detach(tnt_priv->pnp_dev); 1475 1487 } ··· 1809 1817 if (tnt4882_allocate_private(board)) 1810 1818 return -ENOMEM; 1811 1819 tnt_priv = board->private_data; 1812 - tnt_priv->io_writeb = outb_wrapper; 1813 - tnt_priv->io_readb = inb_wrapper; 1814 - tnt_priv->io_writew = outw_wrapper; 1815 - tnt_priv->io_readw = inw_wrapper; 1816 1820 nec_priv = &tnt_priv->nec7210_priv; 1817 1821 nec_priv->type = TNT4882; 1818 1822 nec_priv->read_byte = nec7210_locking_ioport_read_byte; ··· 1823 1835 return -EIO; 1824 1836 } 1825 1837 1826 - nec_priv->iobase = (void *)(unsigned long)curr_dev->resource[0]->start; 1838 + nec_priv->mmiobase = ioport_map(curr_dev->resource[0]->start, 1839 + resource_size(curr_dev->resource[0])); 1840 + if (!nec_priv->mmiobase) 1841 + return -1; 1827 1842 1828 1843 // get irq 1829 1844 if (request_irq(curr_dev->irq, tnt4882_interrupt, isr_flags, "tnt4882", board)) { ··· 1851 1860 nec_priv = &tnt_priv->nec7210_priv; 1852 1861 if (tnt_priv->irq) 1853 1862 free_irq(tnt_priv->irq, board); 1863 + if (nec_priv->mmiobase) 1864 + ioport_unmap(nec_priv->mmiobase); 1854 1865 if (nec_priv->iobase) { 1855 1866 tnt4882_board_reset(tnt_priv, board); 1856 - release_region((unsigned long)nec_priv->iobase, pcmcia_gpib_iosize); 1867 + release_region(nec_priv->iobase, pcmcia_gpib_iosize); 1857 1868 } 1858 1869 } 1859 1870 tnt4882_free_private(board);