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phy: qcom-qmp: pcs-usb: Add v7 register offsets
The X1E80100 platform bumps the HW version of QMP phy to v7 for USB.
Add the new PCS USB specific offsets in a dedicated header file.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231122-phy-qualcomm-v6-v6-20-v7-new-offsets-v3-4-dfd1c375ef61@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Abel Vesa
and committed by
Vinod Koul
8d4f9f80
7b98cf0e
+17
+17
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v7.h
+17
drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v7.h
···
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2023, Linaro Limited
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*/
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#ifndef QCOM_PHY_QMP_PCS_USB_V7_H_
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#define QCOM_PHY_QMP_PCS_USB_V7_H_
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#define QPHY_V7_PCS_USB3_POWER_STATE_CONFIG1 0x00
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#define QPHY_V7_PCS_USB3_AUTONOMOUS_MODE_CTRL 0x08
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#define QPHY_V7_PCS_USB3_LFPS_RXTERM_IRQ_CLEAR 0x14
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#define QPHY_V7_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
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#define QPHY_V7_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
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#define QPHY_V7_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
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#define QPHY_V7_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44
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#endif