···35#include <linux/clk.h>36#include <linux/cpufreq.h>3738-#include <mach/hardware.h>39#include <asm/irq.h>40#include <asm/io.h>4142-#include <mach/regs-gpio.h>43#include <asm/plat-s3c/regs-iic.h>44#include <asm/plat-s3c/iic.h>45···61 unsigned int msg_ptr;6263 unsigned int tx_setup;06465 enum s3c24xx_i2c_state state;66 unsigned long clkrate;···69 void __iomem *regs;70 struct clk *clk;71 struct device *dev;72- struct resource *irq;73 struct resource *ioarea;74 struct i2c_adapter adap;75···77#endif78};7980-/* default platform data to use if not supplied in the platform_device81-*/82-83-static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform = {84- .flags = 0,85- .slave_addr = 0x10,86- .bus_freq = 100*1000,87- .max_freq = 400*1000,88- .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,89-};9091/* s3c24xx_i2c_is2440()92 *···89 struct platform_device *pdev = to_platform_device(i2c->dev);9091 return !strcmp(pdev->name, "s3c2440-i2c");92-}93-94-95-/* s3c24xx_i2c_get_platformdata96- *97- * get the platform data associated with the given device, or return98- * the default if there is none99-*/100-101-static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev)102-{103- if (dev->platform_data != NULL)104- return (struct s3c2410_platform_i2c *)dev->platform_data;105-106- return &s3c24xx_i2c_default_platform;107}108109/* s3c24xx_i2c_master_complete···103104 i2c->msg_ptr = 0;105 i2c->msg = NULL;106- i2c->msg_idx ++;107 i2c->msg_num = 0;108 if (ret)109 i2c->msg_idx = ret;···114static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)115{116 unsigned long tmp;117-118 tmp = readl(i2c->regs + S3C2410_IICCON);119 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);120-121}122123static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)124{125 unsigned long tmp;126-127 tmp = readl(i2c->regs + S3C2410_IICCON);128 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);129-130}131132/* irq enable/disable functions */···132static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)133{134 unsigned long tmp;135-136 tmp = readl(i2c->regs + S3C2410_IICCON);137 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);138}···140static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)141{142 unsigned long tmp;143-144 tmp = readl(i2c->regs + S3C2410_IICCON);145 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);146}···148149/* s3c24xx_i2c_message_start150 *151- * put the start of a message onto the bus 152*/153154-static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c, 155 struct i2c_msg *msg)156{157 unsigned int addr = (msg->addr & 0x7f) << 1;···170 if (msg->flags & I2C_M_REV_DIR_ADDR)171 addr ^= 1;172173- // todo - check for wether ack wanted or not174 s3c24xx_i2c_enable_ack(i2c);175176 iiccon = readl(i2c->regs + S3C2410_IICCON);177 writel(stat, i2c->regs + S3C2410_IICSTAT);178-179 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);180 writeb(addr, i2c->regs + S3C2410_IICDS);181-182 /* delay here to ensure the data byte has gotten onto the bus183 * before the transaction is started */184···186187 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);188 writel(iiccon, i2c->regs + S3C2410_IICCON);189-190- stat |= S3C2410_IICSTAT_START;191 writel(stat, i2c->regs + S3C2410_IICSTAT);192}193···198 dev_dbg(i2c->dev, "STOP\n");199200 /* stop the transfer */201- iicstat &= ~ S3C2410_IICSTAT_START;202 writel(iicstat, i2c->regs + S3C2410_IICSTAT);203-204 i2c->state = STATE_STOP;205-206 s3c24xx_i2c_master_complete(i2c, ret);207 s3c24xx_i2c_disable_irq(i2c);208}···212213/* is_lastmsg()214 *215- * returns TRUE if the current message is the last in the set 216*/217218static inline int is_lastmsg(struct s3c24xx_i2c *i2c)···260261 case STATE_STOP:262 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);263- s3c24xx_i2c_disable_irq(i2c); 264 goto out_ack;265266 case STATE_START:267 /* last thing we did was send a start condition on the268 * bus, or started a new i2c message269 */270-271 if (iicstat & S3C2410_IICSTAT_LASTBIT &&272 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {273 /* ack was not received... */···293 if (i2c->state == STATE_READ)294 goto prepare_read;295296- /* fall through to the write state, as we will need to 297 * send a byte as well */298299 case STATE_WRITE:···310 }311 }312313- retry_write:314315 if (!is_msgend(i2c)) {316 byte = i2c->msg->buf[i2c->msg_ptr++];···330 dev_dbg(i2c->dev, "WRITE: Next Message\n");331332 i2c->msg_ptr = 0;333- i2c->msg_idx ++;334 i2c->msg++;335-336 /* check to see if we need to do another message */337 if (i2c->msg->flags & I2C_M_NOSTART) {338···346347 goto retry_write;348 } else {349-350 /* send the new start */351 s3c24xx_i2c_message_start(i2c, i2c->msg);352 i2c->state = STATE_START;···359 break;360361 case STATE_READ:362- /* we have a byte of data in the data register, do 363 * something with it, and then work out wether we are364 * going to do any more read/write365 */···367 byte = readb(i2c->regs + S3C2410_IICDS);368 i2c->msg->buf[i2c->msg_ptr++] = byte;369370- prepare_read:371 if (is_msglast(i2c)) {372 /* last byte of buffer */373374 if (is_lastmsg(i2c))375 s3c24xx_i2c_disable_ack(i2c);376-377 } else if (is_msgend(i2c)) {378 /* ok, we've read the entire buffer, see if there379 * is anything else we need to do */···399 /* acknowlegde the IRQ and get back on with the work */400401 out_ack:402- tmp = readl(i2c->regs + S3C2410_IICCON); 403 tmp &= ~S3C2410_IICCON_IRQPEND;404 writel(tmp, i2c->regs + S3C2410_IICCON);405 out:···420 status = readl(i2c->regs + S3C2410_IICSTAT);421422 if (status & S3C2410_IICSTAT_ARBITR) {423- // deal with arbitration loss424 dev_err(i2c->dev, "deal with arbitration loss\n");425 }426427 if (i2c->state == STATE_IDLE) {428 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");429430- tmp = readl(i2c->regs + S3C2410_IICCON); 431 tmp &= ~S3C2410_IICCON_IRQPEND;432 writel(tmp, i2c->regs + S3C2410_IICCON);433 goto out;434 }435-436 /* pretty much this leaves us with the fact that we've437 * transmitted or received whatever byte we last sent */438···455456 while (timeout-- > 0) {457 iicstat = readl(i2c->regs + S3C2410_IICSTAT);458-459 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))460 return 0;461462 msleep(1);463 }464-465- dev_dbg(i2c->dev, "timeout: GPEDAT is %08x\n",466- __raw_readl(S3C2410_GPEDAT));467468 return -ETIMEDOUT;469}···470 * this starts an i2c transfer471*/472473-static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int num)0474{475 unsigned long timeout;476 int ret;···497 s3c24xx_i2c_enable_irq(i2c);498 s3c24xx_i2c_message_start(i2c, msgs);499 spin_unlock_irq(&i2c->lock);500-501 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);502503 ret = i2c->msg_idx;504505- /* having these next two as dev_err() makes life very 506 * noisy when doing an i2cdetect */507508 if (timeout == 0)···559 .functionality = s3c24xx_i2c_func,560};561562-static struct s3c24xx_i2c s3c24xx_i2c = {563- .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_i2c.lock),564- .wait = __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c.wait),565- .tx_setup = 50,566- .adap = {567- .name = "s3c2410-i2c",568- .owner = THIS_MODULE,569- .algo = &s3c24xx_i2c_algorithm,570- .retries = 2,571- .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,572- },573-};574-575/* s3c24xx_i2c_calcdivisor576 *577 * return the divisor settings for a given frequency···598{599 int diff = freq - wanted;600601- return (diff >= -2 && diff <= 2);602}603604/* s3c24xx_i2c_clockrate···610611static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)612{613- struct s3c2410_platform_i2c *pdata;614 unsigned long clkin = clk_get_rate(i2c->clk);615 unsigned int divs, div1;616 u32 iiccon;···618 int start, end;619620 i2c->clkrate = clkin;621-622- pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);623 clkin /= 1000; /* clkin now in KHz */624-625 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",626 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);627···727728/* s3c24xx_i2c_init729 *730- * initialise the controller, set the IO lines and frequency 731*/732733static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)···738739 /* get the plafrom data */740741- pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);742743 /* inititalise the gpio */744745- s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA);746- s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);747748 /* write slave address */749-750 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);751752 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);···784785static int s3c24xx_i2c_probe(struct platform_device *pdev)786{787- struct s3c24xx_i2c *i2c = &s3c24xx_i2c;788 struct s3c2410_platform_i2c *pdata;789 struct resource *res;790 int ret;791792- pdata = s3c24xx_i2c_get_platformdata(&pdev->dev);00000000000000000000793794 /* find the clock and enable it */795···851 goto err_ioarea;852 }853854- dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res);0855856 /* setup info block for the i2c core */857···866 goto err_iomap;867868 /* find the IRQ for this unit (note, this relies on the init call to869- * ensure no current IRQs pending 870 */871872- res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);873- if (res == NULL) {874 dev_err(&pdev->dev, "cannot find IRQ\n");875- ret = -ENOENT;876 goto err_iomap;877 }878879- ret = request_irq(res->start, s3c24xx_i2c_irq, IRQF_DISABLED,880- pdev->name, i2c);881882 if (ret != 0) {883- dev_err(&pdev->dev, "cannot claim IRQ\n");884 goto err_iomap;885 }886-887- i2c->irq = res;888-889- dev_dbg(&pdev->dev, "irq resource %p (%lu)\n", res,890- (unsigned long)res->start);891892 ret = s3c24xx_i2c_register_cpufreq(i2c);893 if (ret < 0) {···912 s3c24xx_i2c_deregister_cpufreq(i2c);913914 err_irq:915- free_irq(i2c->irq->start, i2c);916917 err_iomap:918 iounmap(i2c->regs);···926 clk_put(i2c->clk);927928 err_noclk:0929 return ret;930}931···942 s3c24xx_i2c_deregister_cpufreq(i2c);943944 i2c_del_adapter(&i2c->adap);945- free_irq(i2c->irq->start, i2c);946947 clk_disable(i2c->clk);948 clk_put(i2c->clk);···951952 release_resource(i2c->ioarea);953 kfree(i2c->ioarea);0954955 return 0;956}
···35#include <linux/clk.h>36#include <linux/cpufreq.h>37038#include <asm/irq.h>39#include <asm/io.h>40041#include <asm/plat-s3c/regs-iic.h>42#include <asm/plat-s3c/iic.h>43···63 unsigned int msg_ptr;6465 unsigned int tx_setup;66+ unsigned int irq;6768 enum s3c24xx_i2c_state state;69 unsigned long clkrate;···70 void __iomem *regs;71 struct clk *clk;72 struct device *dev;073 struct resource *ioarea;74 struct i2c_adapter adap;75···79#endif80};8182+/* default platform data removed, dev should always carry data. */0000000008384/* s3c24xx_i2c_is2440()85 *···100 struct platform_device *pdev = to_platform_device(i2c->dev);101102 return !strcmp(pdev->name, "s3c2440-i2c");000000000000000103}104105/* s3c24xx_i2c_master_complete···129130 i2c->msg_ptr = 0;131 i2c->msg = NULL;132+ i2c->msg_idx++;133 i2c->msg_num = 0;134 if (ret)135 i2c->msg_idx = ret;···140static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)141{142 unsigned long tmp;143+144 tmp = readl(i2c->regs + S3C2410_IICCON);145 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);0146}147148static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)149{150 unsigned long tmp;151+152 tmp = readl(i2c->regs + S3C2410_IICCON);153 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);0154}155156/* irq enable/disable functions */···160static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)161{162 unsigned long tmp;163+164 tmp = readl(i2c->regs + S3C2410_IICCON);165 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);166}···168static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)169{170 unsigned long tmp;171+172 tmp = readl(i2c->regs + S3C2410_IICCON);173 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);174}···176177/* s3c24xx_i2c_message_start178 *179+ * put the start of a message onto the bus180*/181182+static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,183 struct i2c_msg *msg)184{185 unsigned int addr = (msg->addr & 0x7f) << 1;···198 if (msg->flags & I2C_M_REV_DIR_ADDR)199 addr ^= 1;200201+ /* todo - check for wether ack wanted or not */202 s3c24xx_i2c_enable_ack(i2c);203204 iiccon = readl(i2c->regs + S3C2410_IICCON);205 writel(stat, i2c->regs + S3C2410_IICSTAT);206+207 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);208 writeb(addr, i2c->regs + S3C2410_IICDS);209+210 /* delay here to ensure the data byte has gotten onto the bus211 * before the transaction is started */212···214215 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);216 writel(iiccon, i2c->regs + S3C2410_IICCON);217+218+ stat |= S3C2410_IICSTAT_START;219 writel(stat, i2c->regs + S3C2410_IICSTAT);220}221···226 dev_dbg(i2c->dev, "STOP\n");227228 /* stop the transfer */229+ iicstat &= ~S3C2410_IICSTAT_START;230 writel(iicstat, i2c->regs + S3C2410_IICSTAT);231+232 i2c->state = STATE_STOP;233+234 s3c24xx_i2c_master_complete(i2c, ret);235 s3c24xx_i2c_disable_irq(i2c);236}···240241/* is_lastmsg()242 *243+ * returns TRUE if the current message is the last in the set244*/245246static inline int is_lastmsg(struct s3c24xx_i2c *i2c)···288289 case STATE_STOP:290 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);291+ s3c24xx_i2c_disable_irq(i2c);292 goto out_ack;293294 case STATE_START:295 /* last thing we did was send a start condition on the296 * bus, or started a new i2c message297 */298+299 if (iicstat & S3C2410_IICSTAT_LASTBIT &&300 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {301 /* ack was not received... */···321 if (i2c->state == STATE_READ)322 goto prepare_read;323324+ /* fall through to the write state, as we will need to325 * send a byte as well */326327 case STATE_WRITE:···338 }339 }340341+ retry_write:342343 if (!is_msgend(i2c)) {344 byte = i2c->msg->buf[i2c->msg_ptr++];···358 dev_dbg(i2c->dev, "WRITE: Next Message\n");359360 i2c->msg_ptr = 0;361+ i2c->msg_idx++;362 i2c->msg++;363+364 /* check to see if we need to do another message */365 if (i2c->msg->flags & I2C_M_NOSTART) {366···374375 goto retry_write;376 } else {0377 /* send the new start */378 s3c24xx_i2c_message_start(i2c, i2c->msg);379 i2c->state = STATE_START;···388 break;389390 case STATE_READ:391+ /* we have a byte of data in the data register, do392 * something with it, and then work out wether we are393 * going to do any more read/write394 */···396 byte = readb(i2c->regs + S3C2410_IICDS);397 i2c->msg->buf[i2c->msg_ptr++] = byte;398399+ prepare_read:400 if (is_msglast(i2c)) {401 /* last byte of buffer */402403 if (is_lastmsg(i2c))404 s3c24xx_i2c_disable_ack(i2c);405+406 } else if (is_msgend(i2c)) {407 /* ok, we've read the entire buffer, see if there408 * is anything else we need to do */···428 /* acknowlegde the IRQ and get back on with the work */429430 out_ack:431+ tmp = readl(i2c->regs + S3C2410_IICCON);432 tmp &= ~S3C2410_IICCON_IRQPEND;433 writel(tmp, i2c->regs + S3C2410_IICCON);434 out:···449 status = readl(i2c->regs + S3C2410_IICSTAT);450451 if (status & S3C2410_IICSTAT_ARBITR) {452+ /* deal with arbitration loss */453 dev_err(i2c->dev, "deal with arbitration loss\n");454 }455456 if (i2c->state == STATE_IDLE) {457 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");458459+ tmp = readl(i2c->regs + S3C2410_IICCON);460 tmp &= ~S3C2410_IICCON_IRQPEND;461 writel(tmp, i2c->regs + S3C2410_IICCON);462 goto out;463 }464+465 /* pretty much this leaves us with the fact that we've466 * transmitted or received whatever byte we last sent */467···484485 while (timeout-- > 0) {486 iicstat = readl(i2c->regs + S3C2410_IICSTAT);487+488 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))489 return 0;490491 msleep(1);492 }000493494 return -ETIMEDOUT;495}···502 * this starts an i2c transfer503*/504505+static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,506+ struct i2c_msg *msgs, int num)507{508 unsigned long timeout;509 int ret;···528 s3c24xx_i2c_enable_irq(i2c);529 s3c24xx_i2c_message_start(i2c, msgs);530 spin_unlock_irq(&i2c->lock);531+532 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);533534 ret = i2c->msg_idx;535536+ /* having these next two as dev_err() makes life very537 * noisy when doing an i2cdetect */538539 if (timeout == 0)···590 .functionality = s3c24xx_i2c_func,591};5920000000000000593/* s3c24xx_i2c_calcdivisor594 *595 * return the divisor settings for a given frequency···642{643 int diff = freq - wanted;644645+ return diff >= -2 && diff <= 2;646}647648/* s3c24xx_i2c_clockrate···654655static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)656{657+ struct s3c2410_platform_i2c *pdata = i2c->dev->platform_data;658 unsigned long clkin = clk_get_rate(i2c->clk);659 unsigned int divs, div1;660 u32 iiccon;···662 int start, end;663664 i2c->clkrate = clkin;00665 clkin /= 1000; /* clkin now in KHz */666+667 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",668 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);669···773774/* s3c24xx_i2c_init775 *776+ * initialise the controller, set the IO lines and frequency777*/778779static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)···784785 /* get the plafrom data */786787+ pdata = i2c->dev->platform_data;788789 /* inititalise the gpio */790791+ if (pdata->cfg_gpio)792+ pdata->cfg_gpio(to_platform_device(i2c->dev));793794 /* write slave address */795+796 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);797798 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);···830831static int s3c24xx_i2c_probe(struct platform_device *pdev)832{833+ struct s3c24xx_i2c *i2c;834 struct s3c2410_platform_i2c *pdata;835 struct resource *res;836 int ret;837838+ pdata = pdev->dev.platform_data;839+ if (!pdata) {840+ dev_err(&pdev->dev, "no platform data\n");841+ return -EINVAL;842+ }843+844+ i2c = kzalloc(sizeof(struct s3c24xx_i2c), GFP_KERNEL);845+ if (!i2c) {846+ dev_err(&pdev->dev, "no memory for state\n");847+ return -ENOMEM;848+ }849+850+ strlcpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name));851+ i2c->adap.owner = THIS_MODULE;852+ i2c->adap.algo = &s3c24xx_i2c_algorithm;853+ i2c->adap.retries = 2;854+ i2c->adap.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;855+ i2c->tx_setup = 50;856+857+ spin_lock_init(&i2c->lock);858+ init_waitqueue_head(&i2c->wait);859860 /* find the clock and enable it */861···877 goto err_ioarea;878 }879880+ dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",881+ i2c->regs, i2c->ioarea, res);882883 /* setup info block for the i2c core */884···891 goto err_iomap;892893 /* find the IRQ for this unit (note, this relies on the init call to894+ * ensure no current IRQs pending895 */896897+ i2c->irq = ret = platform_get_irq(pdev, 0);898+ if (ret <= 0) {899 dev_err(&pdev->dev, "cannot find IRQ\n");0900 goto err_iomap;901 }902903+ ret = request_irq(i2c->irq, s3c24xx_i2c_irq, IRQF_DISABLED,904+ dev_name(&pdev->dev), i2c);905906 if (ret != 0) {907+ dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);908 goto err_iomap;909 }00000910911 ret = s3c24xx_i2c_register_cpufreq(i2c);912 if (ret < 0) {···943 s3c24xx_i2c_deregister_cpufreq(i2c);944945 err_irq:946+ free_irq(i2c->irq, i2c);947948 err_iomap:949 iounmap(i2c->regs);···957 clk_put(i2c->clk);958959 err_noclk:960+ kfree(i2c);961 return ret;962}963···972 s3c24xx_i2c_deregister_cpufreq(i2c);973974 i2c_del_adapter(&i2c->adap);975+ free_irq(i2c->irq, i2c);976977 clk_disable(i2c->clk);978 clk_put(i2c->clk);···981982 release_resource(i2c->ioarea);983 kfree(i2c->ioarea);984+ kfree(i2c);985986 return 0;987}