···3535#include <linux/clk.h>3636#include <linux/cpufreq.h>37373838-#include <mach/hardware.h>3938#include <asm/irq.h>4039#include <asm/io.h>41404242-#include <mach/regs-gpio.h>4341#include <asm/plat-s3c/regs-iic.h>4442#include <asm/plat-s3c/iic.h>4543···6163 unsigned int msg_ptr;62646365 unsigned int tx_setup;6666+ unsigned int irq;64676568 enum s3c24xx_i2c_state state;6669 unsigned long clkrate;···6970 void __iomem *regs;7071 struct clk *clk;7172 struct device *dev;7272- struct resource *irq;7373 struct resource *ioarea;7474 struct i2c_adapter adap;7575···7779#endif7880};79818080-/* default platform data to use if not supplied in the platform_device8181-*/8282-8383-static struct s3c2410_platform_i2c s3c24xx_i2c_default_platform = {8484- .flags = 0,8585- .slave_addr = 0x10,8686- .bus_freq = 100*1000,8787- .max_freq = 400*1000,8888- .sda_delay = S3C2410_IICLC_SDA_DELAY5 | S3C2410_IICLC_FILTER_ON,8989-};8282+/* default platform data removed, dev should always carry data. */90839184/* s3c24xx_i2c_is2440()9285 *···89100 struct platform_device *pdev = to_platform_device(i2c->dev);9010191102 return !strcmp(pdev->name, "s3c2440-i2c");9292-}9393-9494-9595-/* s3c24xx_i2c_get_platformdata9696- *9797- * get the platform data associated with the given device, or return9898- * the default if there is none9999-*/100100-101101-static inline struct s3c2410_platform_i2c *s3c24xx_i2c_get_platformdata(struct device *dev)102102-{103103- if (dev->platform_data != NULL)104104- return (struct s3c2410_platform_i2c *)dev->platform_data;105105-106106- return &s3c24xx_i2c_default_platform;107103}108104109105/* s3c24xx_i2c_master_complete···103129104130 i2c->msg_ptr = 0;105131 i2c->msg = NULL;106106- i2c->msg_idx ++;132132+ i2c->msg_idx++;107133 i2c->msg_num = 0;108134 if (ret)109135 i2c->msg_idx = ret;···114140static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c)115141{116142 unsigned long tmp;117117-143143+118144 tmp = readl(i2c->regs + S3C2410_IICCON);119145 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);120120-121146}122147123148static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c)124149{125150 unsigned long tmp;126126-151151+127152 tmp = readl(i2c->regs + S3C2410_IICCON);128153 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);129129-130154}131155132156/* irq enable/disable functions */···132160static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c)133161{134162 unsigned long tmp;135135-163163+136164 tmp = readl(i2c->regs + S3C2410_IICCON);137165 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);138166}···140168static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c)141169{142170 unsigned long tmp;143143-171171+144172 tmp = readl(i2c->regs + S3C2410_IICCON);145173 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);146174}···148176149177/* s3c24xx_i2c_message_start150178 *151151- * put the start of a message onto the bus 179179+ * put the start of a message onto the bus152180*/153181154154-static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c, 182182+static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c,155183 struct i2c_msg *msg)156184{157185 unsigned int addr = (msg->addr & 0x7f) << 1;···170198 if (msg->flags & I2C_M_REV_DIR_ADDR)171199 addr ^= 1;172200173173- // todo - check for wether ack wanted or not201201+ /* todo - check for wether ack wanted or not */174202 s3c24xx_i2c_enable_ack(i2c);175203176204 iiccon = readl(i2c->regs + S3C2410_IICCON);177205 writel(stat, i2c->regs + S3C2410_IICSTAT);178178-206206+179207 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr);180208 writeb(addr, i2c->regs + S3C2410_IICDS);181181-209209+182210 /* delay here to ensure the data byte has gotten onto the bus183211 * before the transaction is started */184212···186214187215 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon);188216 writel(iiccon, i2c->regs + S3C2410_IICCON);189189-190190- stat |= S3C2410_IICSTAT_START;217217+218218+ stat |= S3C2410_IICSTAT_START;191219 writel(stat, i2c->regs + S3C2410_IICSTAT);192220}193221···198226 dev_dbg(i2c->dev, "STOP\n");199227200228 /* stop the transfer */201201- iicstat &= ~ S3C2410_IICSTAT_START;229229+ iicstat &= ~S3C2410_IICSTAT_START;202230 writel(iicstat, i2c->regs + S3C2410_IICSTAT);203203-231231+204232 i2c->state = STATE_STOP;205205-233233+206234 s3c24xx_i2c_master_complete(i2c, ret);207235 s3c24xx_i2c_disable_irq(i2c);208236}···212240213241/* is_lastmsg()214242 *215215- * returns TRUE if the current message is the last in the set 243243+ * returns TRUE if the current message is the last in the set216244*/217245218246static inline int is_lastmsg(struct s3c24xx_i2c *i2c)···260288261289 case STATE_STOP:262290 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__);263263- s3c24xx_i2c_disable_irq(i2c); 291291+ s3c24xx_i2c_disable_irq(i2c);264292 goto out_ack;265293266294 case STATE_START:267295 /* last thing we did was send a start condition on the268296 * bus, or started a new i2c message269297 */270270-298298+271299 if (iicstat & S3C2410_IICSTAT_LASTBIT &&272300 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {273301 /* ack was not received... */···293321 if (i2c->state == STATE_READ)294322 goto prepare_read;295323296296- /* fall through to the write state, as we will need to 324324+ /* fall through to the write state, as we will need to297325 * send a byte as well */298326299327 case STATE_WRITE:···310338 }311339 }312340313313- retry_write:341341+ retry_write:314342315343 if (!is_msgend(i2c)) {316344 byte = i2c->msg->buf[i2c->msg_ptr++];···330358 dev_dbg(i2c->dev, "WRITE: Next Message\n");331359332360 i2c->msg_ptr = 0;333333- i2c->msg_idx ++;361361+ i2c->msg_idx++;334362 i2c->msg++;335335-363363+336364 /* check to see if we need to do another message */337365 if (i2c->msg->flags & I2C_M_NOSTART) {338366···346374347375 goto retry_write;348376 } else {349349-350377 /* send the new start */351378 s3c24xx_i2c_message_start(i2c, i2c->msg);352379 i2c->state = STATE_START;···359388 break;360389361390 case STATE_READ:362362- /* we have a byte of data in the data register, do 391391+ /* we have a byte of data in the data register, do363392 * something with it, and then work out wether we are364393 * going to do any more read/write365394 */···367396 byte = readb(i2c->regs + S3C2410_IICDS);368397 i2c->msg->buf[i2c->msg_ptr++] = byte;369398370370- prepare_read:399399+ prepare_read:371400 if (is_msglast(i2c)) {372401 /* last byte of buffer */373402374403 if (is_lastmsg(i2c))375404 s3c24xx_i2c_disable_ack(i2c);376376-405405+377406 } else if (is_msgend(i2c)) {378407 /* ok, we've read the entire buffer, see if there379408 * is anything else we need to do */···399428 /* acknowlegde the IRQ and get back on with the work */400429401430 out_ack:402402- tmp = readl(i2c->regs + S3C2410_IICCON); 431431+ tmp = readl(i2c->regs + S3C2410_IICCON);403432 tmp &= ~S3C2410_IICCON_IRQPEND;404433 writel(tmp, i2c->regs + S3C2410_IICCON);405434 out:···420449 status = readl(i2c->regs + S3C2410_IICSTAT);421450422451 if (status & S3C2410_IICSTAT_ARBITR) {423423- // deal with arbitration loss452452+ /* deal with arbitration loss */424453 dev_err(i2c->dev, "deal with arbitration loss\n");425454 }426455427456 if (i2c->state == STATE_IDLE) {428457 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n");429458430430- tmp = readl(i2c->regs + S3C2410_IICCON); 459459+ tmp = readl(i2c->regs + S3C2410_IICCON);431460 tmp &= ~S3C2410_IICCON_IRQPEND;432461 writel(tmp, i2c->regs + S3C2410_IICCON);433462 goto out;434463 }435435-464464+436465 /* pretty much this leaves us with the fact that we've437466 * transmitted or received whatever byte we last sent */438467···455484456485 while (timeout-- > 0) {457486 iicstat = readl(i2c->regs + S3C2410_IICSTAT);458458-487487+459488 if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))460489 return 0;461490462491 msleep(1);463492 }464464-465465- dev_dbg(i2c->dev, "timeout: GPEDAT is %08x\n",466466- __raw_readl(S3C2410_GPEDAT));467493468494 return -ETIMEDOUT;469495}···470502 * this starts an i2c transfer471503*/472504473473-static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, struct i2c_msg *msgs, int num)505505+static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c,506506+ struct i2c_msg *msgs, int num)474507{475508 unsigned long timeout;476509 int ret;···497528 s3c24xx_i2c_enable_irq(i2c);498529 s3c24xx_i2c_message_start(i2c, msgs);499530 spin_unlock_irq(&i2c->lock);500500-531531+501532 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);502533503534 ret = i2c->msg_idx;504535505505- /* having these next two as dev_err() makes life very 536536+ /* having these next two as dev_err() makes life very506537 * noisy when doing an i2cdetect */507538508539 if (timeout == 0)···559590 .functionality = s3c24xx_i2c_func,560591};561592562562-static struct s3c24xx_i2c s3c24xx_i2c = {563563- .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_i2c.lock),564564- .wait = __WAIT_QUEUE_HEAD_INITIALIZER(s3c24xx_i2c.wait),565565- .tx_setup = 50,566566- .adap = {567567- .name = "s3c2410-i2c",568568- .owner = THIS_MODULE,569569- .algo = &s3c24xx_i2c_algorithm,570570- .retries = 2,571571- .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,572572- },573573-};574574-575593/* s3c24xx_i2c_calcdivisor576594 *577595 * return the divisor settings for a given frequency···598642{599643 int diff = freq - wanted;600644601601- return (diff >= -2 && diff <= 2);645645+ return diff >= -2 && diff <= 2;602646}603647604648/* s3c24xx_i2c_clockrate···610654611655static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)612656{613613- struct s3c2410_platform_i2c *pdata;657657+ struct s3c2410_platform_i2c *pdata = i2c->dev->platform_data;614658 unsigned long clkin = clk_get_rate(i2c->clk);615659 unsigned int divs, div1;616660 u32 iiccon;···618662 int start, end;619663620664 i2c->clkrate = clkin;621621-622622- pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);623665 clkin /= 1000; /* clkin now in KHz */624624-666666+625667 dev_dbg(i2c->dev, "pdata %p, freq %lu %lu..%lu\n",626668 pdata, pdata->bus_freq, pdata->min_freq, pdata->max_freq);627669···727773728774/* s3c24xx_i2c_init729775 *730730- * initialise the controller, set the IO lines and frequency 776776+ * initialise the controller, set the IO lines and frequency731777*/732778733779static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)···738784739785 /* get the plafrom data */740786741741- pdata = s3c24xx_i2c_get_platformdata(i2c->adap.dev.parent);787787+ pdata = i2c->dev->platform_data;742788743789 /* inititalise the gpio */744790745745- s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA);746746- s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL);791791+ if (pdata->cfg_gpio)792792+ pdata->cfg_gpio(to_platform_device(i2c->dev));747793748794 /* write slave address */749749-795795+750796 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);751797752798 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr);···784830785831static int s3c24xx_i2c_probe(struct platform_device *pdev)786832{787787- struct s3c24xx_i2c *i2c = &s3c24xx_i2c;833833+ struct s3c24xx_i2c *i2c;788834 struct s3c2410_platform_i2c *pdata;789835 struct resource *res;790836 int ret;791837792792- pdata = s3c24xx_i2c_get_platformdata(&pdev->dev);838838+ pdata = pdev->dev.platform_data;839839+ if (!pdata) {840840+ dev_err(&pdev->dev, "no platform data\n");841841+ return -EINVAL;842842+ }843843+844844+ i2c = kzalloc(sizeof(struct s3c24xx_i2c), GFP_KERNEL);845845+ if (!i2c) {846846+ dev_err(&pdev->dev, "no memory for state\n");847847+ return -ENOMEM;848848+ }849849+850850+ strlcpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name));851851+ i2c->adap.owner = THIS_MODULE;852852+ i2c->adap.algo = &s3c24xx_i2c_algorithm;853853+ i2c->adap.retries = 2;854854+ i2c->adap.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;855855+ i2c->tx_setup = 50;856856+857857+ spin_lock_init(&i2c->lock);858858+ init_waitqueue_head(&i2c->wait);793859794860 /* find the clock and enable it */795861···851877 goto err_ioarea;852878 }853879854854- dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", i2c->regs, i2c->ioarea, res);880880+ dev_dbg(&pdev->dev, "registers %p (%p, %p)\n",881881+ i2c->regs, i2c->ioarea, res);855882856883 /* setup info block for the i2c core */857884···866891 goto err_iomap;867892868893 /* find the IRQ for this unit (note, this relies on the init call to869869- * ensure no current IRQs pending 894894+ * ensure no current IRQs pending870895 */871896872872- res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);873873- if (res == NULL) {897897+ i2c->irq = ret = platform_get_irq(pdev, 0);898898+ if (ret <= 0) {874899 dev_err(&pdev->dev, "cannot find IRQ\n");875875- ret = -ENOENT;876900 goto err_iomap;877901 }878902879879- ret = request_irq(res->start, s3c24xx_i2c_irq, IRQF_DISABLED,880880- pdev->name, i2c);903903+ ret = request_irq(i2c->irq, s3c24xx_i2c_irq, IRQF_DISABLED,904904+ dev_name(&pdev->dev), i2c);881905882906 if (ret != 0) {883883- dev_err(&pdev->dev, "cannot claim IRQ\n");907907+ dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq);884908 goto err_iomap;885909 }886886-887887- i2c->irq = res;888888-889889- dev_dbg(&pdev->dev, "irq resource %p (%lu)\n", res,890890- (unsigned long)res->start);891910892911 ret = s3c24xx_i2c_register_cpufreq(i2c);893912 if (ret < 0) {···912943 s3c24xx_i2c_deregister_cpufreq(i2c);913944914945 err_irq:915915- free_irq(i2c->irq->start, i2c);946946+ free_irq(i2c->irq, i2c);916947917948 err_iomap:918949 iounmap(i2c->regs);···926957 clk_put(i2c->clk);927958928959 err_noclk:960960+ kfree(i2c);929961 return ret;930962}931963···942972 s3c24xx_i2c_deregister_cpufreq(i2c);943973944974 i2c_del_adapter(&i2c->adap);945945- free_irq(i2c->irq->start, i2c);975975+ free_irq(i2c->irq, i2c);946976947977 clk_disable(i2c->clk);948978 clk_put(i2c->clk);···951981952982 release_resource(i2c->ioarea);953983 kfree(i2c->ioarea);984984+ kfree(i2c);954985955986 return 0;956987}