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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
[PATCH] serverworks: add support for new southbridge IDE
BCM5785 (HT1000) is a Opteron Southbridge from Serverworks/Broadcom that
incorporates a single channel ATA100 IDE controller that is functionally
identical to the Serverworks CSB6 IDE controller. This patch adds support
for the new PCI device ID and also the support for this controller.
Signed-off-by: Narendra Sankar <nsankar@broadcom.com>
Acked-by: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@elka.pw.edu.pl>
authored by Narendra Sankar and committed by Bartlomiej Zolnierkiewicz 84f57fbc 2f09a7f4
+23
drivers/ide/pci/serverworks.c
+23
drivers/ide/pci/serverworks.c
···
21
*
22
* CSB6: `Champion South Bridge' IDE Interface (optional: third channel)
23
*
24
* Documentation:
25
* Available under NDA only. Errata info very hard to get.
26
*
···
74
if (!svwks_revision)
75
pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision);
76
77
if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
78
u32 reg = 0;
79
if (isa_dev)
···
114
case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
115
case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
116
case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
117
return 1;
118
default:
119
break;
···
444
btr |= (svwks_revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2;
445
pci_write_config_byte(dev, 0x5A, btr);
446
}
447
448
return (dev->irq) ? dev->irq : 0;
449
}
···
642
.channels = 1, /* 2 */
643
.autodma = AUTODMA,
644
.bootable = ON_BOARD,
645
}
646
};
647
···
675
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
676
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
677
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
678
{ 0, },
679
};
680
MODULE_DEVICE_TABLE(pci, svwks_pci_tbl);
···
21
*
22
* CSB6: `Champion South Bridge' IDE Interface (optional: third channel)
23
*
24
+
* HT1000: AKA BCM5785 - Hypertransport Southbridge for Opteron systems. IDE
25
+
* controller same as the CSB6. Single channel ATA100 only.
26
+
*
27
* Documentation:
28
* Available under NDA only. Errata info very hard to get.
29
*
···
71
if (!svwks_revision)
72
pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision);
73
74
+
if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
75
+
return 2;
76
if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
77
u32 reg = 0;
78
if (isa_dev)
···
109
case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
110
case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
111
case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
112
+
case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
113
return 1;
114
default:
115
break;
···
438
btr |= (svwks_revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2;
439
pci_write_config_byte(dev, 0x5A, btr);
440
}
441
+
/* Setup HT1000 SouthBridge Controller - Single Channel Only */
442
+
else if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) {
443
+
pci_read_config_byte(dev, 0x5A, &btr);
444
+
btr &= ~0x40;
445
+
btr |= 0x3;
446
+
pci_write_config_byte(dev, 0x5A, btr);
447
+
}
448
449
return (dev->irq) ? dev->irq : 0;
450
}
···
629
.channels = 1, /* 2 */
630
.autodma = AUTODMA,
631
.bootable = ON_BOARD,
632
+
},{ /* 4 */
633
+
.name = "SvrWks HT1000",
634
+
.init_setup = init_setup_svwks,
635
+
.init_chipset = init_chipset_svwks,
636
+
.init_hwif = init_hwif_svwks,
637
+
.init_dma = init_dma_svwks,
638
+
.channels = 1, /* 2 */
639
+
.autodma = AUTODMA,
640
+
.bootable = ON_BOARD,
641
}
642
};
643
···
653
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
654
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
655
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
656
+
{ PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
657
{ 0, },
658
};
659
MODULE_DEVICE_TABLE(pci, svwks_pci_tbl);
+1
include/linux/pci_ids.h
+1
include/linux/pci_ids.h
···
1580
#define PCI_DEVICE_ID_SERVERWORKS_OSB4IDE 0x0211
1581
#define PCI_DEVICE_ID_SERVERWORKS_CSB5IDE 0x0212
1582
#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213
1583
#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217
1584
#define PCI_DEVICE_ID_SERVERWORKS_OSB4USB 0x0220
1585
#define PCI_DEVICE_ID_SERVERWORKS_CSB5USB PCI_DEVICE_ID_SERVERWORKS_OSB4USB
···
1580
#define PCI_DEVICE_ID_SERVERWORKS_OSB4IDE 0x0211
1581
#define PCI_DEVICE_ID_SERVERWORKS_CSB5IDE 0x0212
1582
#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213
1583
+
#define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214
1584
#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217
1585
#define PCI_DEVICE_ID_SERVERWORKS_OSB4USB 0x0220
1586
#define PCI_DEVICE_ID_SERVERWORKS_CSB5USB PCI_DEVICE_ID_SERVERWORKS_OSB4USB