[PATCH] serverworks: add support for new southbridge IDE

BCM5785 (HT1000) is a Opteron Southbridge from Serverworks/Broadcom that
incorporates a single channel ATA100 IDE controller that is functionally
identical to the Serverworks CSB6 IDE controller. This patch adds support
for the new PCI device ID and also the support for this controller.

Signed-off-by: Narendra Sankar <nsankar@broadcom.com>
Acked-by: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@elka.pw.edu.pl>

authored by Narendra Sankar and committed by Bartlomiej Zolnierkiewicz 84f57fbc 2f09a7f4

+24
+23
drivers/ide/pci/serverworks.c
··· 21 21 * 22 22 * CSB6: `Champion South Bridge' IDE Interface (optional: third channel) 23 23 * 24 + * HT1000: AKA BCM5785 - Hypertransport Southbridge for Opteron systems. IDE 25 + * controller same as the CSB6. Single channel ATA100 only. 26 + * 24 27 * Documentation: 25 28 * Available under NDA only. Errata info very hard to get. 26 29 * ··· 74 71 if (!svwks_revision) 75 72 pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision); 76 73 74 + if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) 75 + return 2; 77 76 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { 78 77 u32 reg = 0; 79 78 if (isa_dev) ··· 114 109 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE: 115 110 case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE: 116 111 case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2: 112 + case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE: 117 113 return 1; 118 114 default: 119 115 break; ··· 444 438 btr |= (svwks_revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2; 445 439 pci_write_config_byte(dev, 0x5A, btr); 446 440 } 441 + /* Setup HT1000 SouthBridge Controller - Single Channel Only */ 442 + else if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) { 443 + pci_read_config_byte(dev, 0x5A, &btr); 444 + btr &= ~0x40; 445 + btr |= 0x3; 446 + pci_write_config_byte(dev, 0x5A, btr); 447 + } 447 448 448 449 return (dev->irq) ? dev->irq : 0; 449 450 } ··· 642 629 .channels = 1, /* 2 */ 643 630 .autodma = AUTODMA, 644 631 .bootable = ON_BOARD, 632 + },{ /* 4 */ 633 + .name = "SvrWks HT1000", 634 + .init_setup = init_setup_svwks, 635 + .init_chipset = init_chipset_svwks, 636 + .init_hwif = init_hwif_svwks, 637 + .init_dma = init_dma_svwks, 638 + .channels = 1, /* 2 */ 639 + .autodma = AUTODMA, 640 + .bootable = ON_BOARD, 645 641 } 646 642 }; 647 643 ··· 675 653 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, 676 654 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, 677 655 { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3}, 656 + { PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4}, 678 657 { 0, }, 679 658 }; 680 659 MODULE_DEVICE_TABLE(pci, svwks_pci_tbl);
+1
include/linux/pci_ids.h
··· 1580 1580 #define PCI_DEVICE_ID_SERVERWORKS_OSB4IDE 0x0211 1581 1581 #define PCI_DEVICE_ID_SERVERWORKS_CSB5IDE 0x0212 1582 1582 #define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213 1583 + #define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214 1583 1584 #define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217 1584 1585 #define PCI_DEVICE_ID_SERVERWORKS_OSB4USB 0x0220 1585 1586 #define PCI_DEVICE_ID_SERVERWORKS_CSB5USB PCI_DEVICE_ID_SERVERWORKS_OSB4USB