Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
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linux
arm64: Mark the Applied Micro X-Gene SATA controller as DMA coherent
Since the default DMA ops for arm64 are non-coherent, mark the X-Gene
controller explicitly as dma-coherent to avoid additional cache
maintenance.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Loc Ho <lho@apm.com>
+3
Documentation/devicetree/bindings/ata/apm-xgene.txt
+3
Documentation/devicetree/bindings/ata/apm-xgene.txt
···
24
* "sata-phy" for the SATA 6.0Gbps PHY
25
26
Optional properties:
27
- status : Shall be "ok" if enabled or "disabled" if disabled.
28
Default is "ok".
29
···
56
<0x0 0x1f22e000 0x0 0x1000>,
57
<0x0 0x1f227000 0x0 0x1000>;
58
interrupts = <0x0 0x87 0x4>;
59
status = "ok";
60
clocks = <&sataclk 0>;
61
phys = <&phy2 0>;
···
71
<0x0 0x1f23e000 0x0 0x1000>,
72
<0x0 0x1f237000 0x0 0x1000>;
73
interrupts = <0x0 0x88 0x4>;
74
status = "ok";
75
clocks = <&sataclk 0>;
76
phys = <&phy3 0>;
···
24
* "sata-phy" for the SATA 6.0Gbps PHY
25
26
Optional properties:
27
+
- dma-coherent : Present if dma operations are coherent
28
- status : Shall be "ok" if enabled or "disabled" if disabled.
29
Default is "ok".
30
···
55
<0x0 0x1f22e000 0x0 0x1000>,
56
<0x0 0x1f227000 0x0 0x1000>;
57
interrupts = <0x0 0x87 0x4>;
58
+
dma-coherent;
59
status = "ok";
60
clocks = <&sataclk 0>;
61
phys = <&phy2 0>;
···
69
<0x0 0x1f23e000 0x0 0x1000>,
70
<0x0 0x1f237000 0x0 0x1000>;
71
interrupts = <0x0 0x88 0x4>;
72
+
dma-coherent;
73
status = "ok";
74
clocks = <&sataclk 0>;
75
phys = <&phy3 0>;
+3
arch/arm64/boot/dts/apm-storm.dtsi
+3
arch/arm64/boot/dts/apm-storm.dtsi
···
307
<0x0 0x1f21e000 0x0 0x1000>,
308
<0x0 0x1f217000 0x0 0x1000>;
309
interrupts = <0x0 0x86 0x4>;
310
status = "disabled";
311
clocks = <&sata01clk 0>;
312
phys = <&phy1 0>;
···
322
<0x0 0x1f22e000 0x0 0x1000>,
323
<0x0 0x1f227000 0x0 0x1000>;
324
interrupts = <0x0 0x87 0x4>;
325
status = "ok";
326
clocks = <&sata23clk 0>;
327
phys = <&phy2 0>;
···
336
<0x0 0x1f23d000 0x0 0x1000>,
337
<0x0 0x1f23e000 0x0 0x1000>;
338
interrupts = <0x0 0x88 0x4>;
339
status = "ok";
340
clocks = <&sata45clk 0>;
341
phys = <&phy3 0>;
···
307
<0x0 0x1f21e000 0x0 0x1000>,
308
<0x0 0x1f217000 0x0 0x1000>;
309
interrupts = <0x0 0x86 0x4>;
310
+
dma-coherent;
311
status = "disabled";
312
clocks = <&sata01clk 0>;
313
phys = <&phy1 0>;
···
321
<0x0 0x1f22e000 0x0 0x1000>,
322
<0x0 0x1f227000 0x0 0x1000>;
323
interrupts = <0x0 0x87 0x4>;
324
+
dma-coherent;
325
status = "ok";
326
clocks = <&sata23clk 0>;
327
phys = <&phy2 0>;
···
334
<0x0 0x1f23d000 0x0 0x1000>,
335
<0x0 0x1f23e000 0x0 0x1000>;
336
interrupts = <0x0 0x88 0x4>;
337
+
dma-coherent;
338
status = "ok";
339
clocks = <&sata45clk 0>;
340
phys = <&phy3 0>;