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arm64: dts: allwinner: Use the new r_intc binding

The binding of R_INTC was updated to allow specifying interrupts other
than the external NMI, since routing those interrupts through the R_INTC
driver allows using them for wakeup.

Update the device trees to use the new binding.

Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

authored by

Samuel Holland and committed by
Chen-Yu Tsai 73088dfe 994e5818

+19 -20
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-amarula-relic.dts
··· 173 173 compatible = "x-powers,axp803"; 174 174 reg = <0x3a3>; 175 175 interrupt-parent = <&r_intc>; 176 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 176 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 177 177 x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ 178 178 }; 179 179 };
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts
··· 191 191 compatible = "x-powers,axp803"; 192 192 reg = <0x3a3>; 193 193 interrupt-parent = <&r_intc>; 194 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 194 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 195 195 x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ 196 196 }; 197 197 };
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
··· 152 152 compatible = "x-powers,axp803"; 153 153 reg = <0x3a3>; 154 154 interrupt-parent = <&r_intc>; 155 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 155 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 156 156 }; 157 157 }; 158 158
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
··· 185 185 compatible = "x-powers,axp803"; 186 186 reg = <0x3a3>; 187 187 interrupt-parent = <&r_intc>; 188 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 188 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 189 189 x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ 190 190 }; 191 191 };
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
··· 192 192 compatible = "x-powers,axp803"; 193 193 reg = <0x3a3>; 194 194 interrupt-parent = <&r_intc>; 195 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 195 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 196 196 x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ 197 197 }; 198 198 };
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
··· 139 139 compatible = "x-powers,axp803"; 140 140 reg = <0x3a3>; 141 141 interrupt-parent = <&r_intc>; 142 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 142 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 143 143 }; 144 144 }; 145 145
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-pinebook.dts
··· 245 245 compatible = "x-powers,axp803"; 246 246 reg = <0x3a3>; 247 247 interrupt-parent = <&r_intc>; 248 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 248 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 249 249 }; 250 250 }; 251 251
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
··· 296 296 compatible = "x-powers,axp803"; 297 297 reg = <0x3a3>; 298 298 interrupt-parent = <&r_intc>; 299 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 299 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 300 300 }; 301 301 }; 302 302
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts
··· 266 266 compatible = "x-powers,axp803"; 267 267 reg = <0x3a3>; 268 268 interrupt-parent = <&r_intc>; 269 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 269 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 270 270 x-powers,drive-vbus-en; 271 271 }; 272 272 };
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi
··· 45 45 compatible = "x-powers,axp803"; 46 46 reg = <0x3a3>; 47 47 interrupt-parent = <&r_intc>; 48 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 48 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 49 49 }; 50 50 }; 51 51
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64-teres-i.dts
··· 205 205 compatible = "x-powers,axp803"; 206 206 reg = <0x3a3>; 207 207 interrupt-parent = <&r_intc>; 208 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 208 + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 209 209 wakeup-source; 210 210 }; 211 211 };
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
··· 1219 1219 compatible = "allwinner,sun50i-a64-r-intc", 1220 1220 "allwinner,sun6i-a31-r-intc"; 1221 1221 interrupt-controller; 1222 - #interrupt-cells = <2>; 1222 + #interrupt-cells = <3>; 1223 1223 reg = <0x01f00c00 0x400>; 1224 1224 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 1225 1225 };
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
··· 182 182 compatible = "x-powers,axp805", "x-powers,axp806"; 183 183 reg = <0x36>; 184 184 interrupt-parent = <&r_intc>; 185 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 185 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; 186 186 interrupt-controller; 187 187 #interrupt-cells = <1>; 188 188 x-powers,self-working-mode;
+1 -1
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
··· 119 119 compatible = "x-powers,axp805", "x-powers,axp806"; 120 120 reg = <0x36>; 121 121 interrupt-parent = <&r_intc>; 122 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 122 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; 123 123 interrupt-controller; 124 124 #interrupt-cells = <1>; 125 125 x-powers,self-working-mode;
+2 -2
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
··· 168 168 compatible = "x-powers,axp805", "x-powers,axp806"; 169 169 reg = <0x36>; 170 170 interrupt-parent = <&r_intc>; 171 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 171 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; 172 172 interrupt-controller; 173 173 #interrupt-cells = <1>; 174 174 x-powers,self-working-mode; ··· 281 281 compatible = "nxp,pcf8563"; 282 282 reg = <0x51>; 283 283 interrupt-parent = <&r_intc>; 284 - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; 284 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>; 285 285 #clock-cells = <0>; 286 286 }; 287 287 };
+2 -3
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
··· 927 927 }; 928 928 929 929 r_intc: interrupt-controller@7021000 { 930 - compatible = "allwinner,sun50i-h6-r-intc", 931 - "allwinner,sun6i-a31-r-intc"; 930 + compatible = "allwinner,sun50i-h6-r-intc"; 932 931 interrupt-controller; 933 - #interrupt-cells = <2>; 932 + #interrupt-cells = <3>; 934 933 reg = <0x07021000 0x400>; 935 934 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 936 935 };