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linux
phy: qcom-qmp: Add missing register definitions for PCS V5
Add missing register offsets for PCS V5 registers.
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: devi priya <quic_devipriy@quicinc.com>
Link: https://lore.kernel.org/r/20240516032436.2681828-4-quic_devipriy@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
devi priya
and committed by
Vinod Koul
71ae2acf
f1aaa788
+14
+14
drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h
+14
drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h
···
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#define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG2 0x0c
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#define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG4 0x14
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#define QPHY_V5_PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x20
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#define QPHY_V5_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_L 0x44
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#define QPHY_V5_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_H 0x48
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#define QPHY_V5_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_L 0x4c
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#define QPHY_V5_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_H 0x50
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#define QPHY_V5_PCS_PCIE_INT_AUX_CLK_CONFIG1 0x54
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#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG1 0x5c
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#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG2 0x60
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#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG4 0x68
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#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG2 0x7c
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#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG4 0x84
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#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG5 0x88
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#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG6 0x8c
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#define QPHY_V5_PCS_PCIE_OSC_DTCT_ACTIONS 0x94
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#define QPHY_V5_PCS_PCIE_EQ_CONFIG1 0xa4
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#define QPHY_V5_PCS_PCIE_EQ_CONFIG2 0xa8
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#define QPHY_V5_PCS_PCIE_PRESET_P10_PRE 0xc0
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#define QPHY_V5_PCS_PCIE_PRESET_P10_POST 0xe4
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#endif