phy: qcom-qmp: Add missing offsets for Qserdes PLL registers.

Add missing register offsets for Qserdes PLL.

Reviewed-by: Abel Vesa <[e-mail]>
Signed-off-by: devi priya <[e-mail]>
Link: https://lore.kernel.org/r/[e-mail]
Signed-off-by: Vinod Koul <[e-mail]>

drivers/phy/qualcomm/phy-qcom-qmp-qserdes-pll.h

···
 
 /* QMP V2 PHY for PCIE gen3 ports - QSERDES PLL registers */
 #define QSERDES_PLL_BG_TIMER				0x00c
+#define QSERDES_PLL_SSC_EN_CENTER			0x010
+#define QSERDES_PLL_SSC_ADJ_PER1			0x014
+#define QSERDES_PLL_SSC_ADJ_PER2			0x018
 #define QSERDES_PLL_SSC_PER1				0x01c
 #define QSERDES_PLL_SSC_PER2				0x020
 #define QSERDES_PLL_SSC_STEP_SIZE1_MODE0		0x024