Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/panel: raydium-rm692e5: transition to mipi_dsi wrapped functions

Use functions introduced in commit 966e397e4f60 ("drm/mipi-dsi:
Introduce mipi_dsi_*_write_seq_multi()") and commit f79d6d28d8fe
("drm/mipi-dsi: wrap more functions for streamline handling") for the
raydium-rm692e5 panel.

Additionally, the error handling in rm692e5_prepare() is changed to
properly power the panel off in the case of a wider range of
initialization commands failing than before.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Tejas Vipin <tejasvipin76@gmail.com>
Link: https://lore.kernel.org/r/20240620181051.102173-1-tejasvipin76@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240620181051.102173-1-tejasvipin76@gmail.com

authored by

Tejas Vipin and committed by
Neil Armstrong
699f411d 47e851ec

+94 -134
+94 -134
drivers/gpu/drm/panel/panel-raydium-rm692e5.c
··· 40 40 usleep_range(10000, 11000); 41 41 } 42 42 43 - static int rm692e5_on(struct rm692e5_panel *ctx) 43 + static void rm692e5_on(struct mipi_dsi_multi_context *dsi_ctx) 44 44 { 45 - struct mipi_dsi_device *dsi = ctx->dsi; 46 - struct device *dev = &dsi->dev; 47 - int ret; 45 + dsi_ctx->dsi->mode_flags |= MIPI_DSI_MODE_LPM; 48 46 49 - dsi->mode_flags |= MIPI_DSI_MODE_LPM; 47 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfe, 0x41); 48 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xd6, 0x00); 49 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfe, 0x16); 50 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x8a, 0x87); 51 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfe, 0x71); 52 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x82, 0x01); 53 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xc6, 0x00); 54 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xc7, 0x2c); 55 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xc8, 0x64); 56 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xc9, 0x3c); 57 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xca, 0x80); 58 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xcb, 0x02); 59 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xcc, 0x02); 60 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfe, 0x38); 61 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x18, 0x13); 62 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfe, 0xf4); 63 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x00, 0xff); 64 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x01, 0xff); 65 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x02, 0xcf); 66 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x03, 0xbc); 67 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x04, 0xb9); 68 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x05, 0x99); 69 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x06, 0x02); 70 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x07, 0x0a); 71 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x08, 0xe0); 72 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x09, 0x4c); 73 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0a, 0xeb); 74 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0b, 0xe8); 75 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0c, 0x32); 76 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0d, 0x07); 77 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfe, 0xf4); 78 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0d, 0xc0); 79 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0e, 0xff); 80 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x0f, 0xff); 81 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x10, 0x33); 82 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x11, 0x6f); 83 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x12, 0x6e); 84 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x13, 0xa6); 85 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x14, 0x80); 86 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x15, 0x02); 87 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x16, 0x38); 88 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x17, 0xd3); 89 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x18, 0x3a); 90 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x19, 0xba); 91 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x1a, 0xcc); 92 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x1b, 0x01); 50 93 51 - mipi_dsi_generic_write_seq(dsi, 0xfe, 0x41); 52 - mipi_dsi_generic_write_seq(dsi, 0xd6, 0x00); 53 - mipi_dsi_generic_write_seq(dsi, 0xfe, 0x16); 54 - mipi_dsi_generic_write_seq(dsi, 0x8a, 0x87); 55 - mipi_dsi_generic_write_seq(dsi, 0xfe, 0x71); 56 - mipi_dsi_generic_write_seq(dsi, 0x82, 0x01); 57 - mipi_dsi_generic_write_seq(dsi, 0xc6, 0x00); 58 - mipi_dsi_generic_write_seq(dsi, 0xc7, 0x2c); 59 - mipi_dsi_generic_write_seq(dsi, 0xc8, 0x64); 60 - mipi_dsi_generic_write_seq(dsi, 0xc9, 0x3c); 61 - mipi_dsi_generic_write_seq(dsi, 0xca, 0x80); 62 - mipi_dsi_generic_write_seq(dsi, 0xcb, 0x02); 63 - mipi_dsi_generic_write_seq(dsi, 0xcc, 0x02); 64 - mipi_dsi_generic_write_seq(dsi, 0xfe, 0x38); 65 - mipi_dsi_generic_write_seq(dsi, 0x18, 0x13); 66 - mipi_dsi_generic_write_seq(dsi, 0xfe, 0xf4); 67 - mipi_dsi_generic_write_seq(dsi, 0x00, 0xff); 68 - mipi_dsi_generic_write_seq(dsi, 0x01, 0xff); 69 - mipi_dsi_generic_write_seq(dsi, 0x02, 0xcf); 70 - mipi_dsi_generic_write_seq(dsi, 0x03, 0xbc); 71 - mipi_dsi_generic_write_seq(dsi, 0x04, 0xb9); 72 - mipi_dsi_generic_write_seq(dsi, 0x05, 0x99); 73 - mipi_dsi_generic_write_seq(dsi, 0x06, 0x02); 74 - mipi_dsi_generic_write_seq(dsi, 0x07, 0x0a); 75 - mipi_dsi_generic_write_seq(dsi, 0x08, 0xe0); 76 - mipi_dsi_generic_write_seq(dsi, 0x09, 0x4c); 77 - mipi_dsi_generic_write_seq(dsi, 0x0a, 0xeb); 78 - mipi_dsi_generic_write_seq(dsi, 0x0b, 0xe8); 79 - mipi_dsi_generic_write_seq(dsi, 0x0c, 0x32); 80 - mipi_dsi_generic_write_seq(dsi, 0x0d, 0x07); 81 - mipi_dsi_generic_write_seq(dsi, 0xfe, 0xf4); 82 - mipi_dsi_generic_write_seq(dsi, 0x0d, 0xc0); 83 - mipi_dsi_generic_write_seq(dsi, 0x0e, 0xff); 84 - mipi_dsi_generic_write_seq(dsi, 0x0f, 0xff); 85 - mipi_dsi_generic_write_seq(dsi, 0x10, 0x33); 86 - mipi_dsi_generic_write_seq(dsi, 0x11, 0x6f); 87 - mipi_dsi_generic_write_seq(dsi, 0x12, 0x6e); 88 - mipi_dsi_generic_write_seq(dsi, 0x13, 0xa6); 89 - mipi_dsi_generic_write_seq(dsi, 0x14, 0x80); 90 - mipi_dsi_generic_write_seq(dsi, 0x15, 0x02); 91 - mipi_dsi_generic_write_seq(dsi, 0x16, 0x38); 92 - mipi_dsi_generic_write_seq(dsi, 0x17, 0xd3); 93 - mipi_dsi_generic_write_seq(dsi, 0x18, 0x3a); 94 - mipi_dsi_generic_write_seq(dsi, 0x19, 0xba); 95 - mipi_dsi_generic_write_seq(dsi, 0x1a, 0xcc); 96 - mipi_dsi_generic_write_seq(dsi, 0x1b, 0x01); 94 + mipi_dsi_dcs_nop_multi(dsi_ctx); 97 95 98 - ret = mipi_dsi_dcs_nop(dsi); 99 - if (ret < 0) { 100 - dev_err(dev, "Failed to nop: %d\n", ret); 101 - return ret; 102 - } 103 - msleep(32); 96 + mipi_dsi_msleep(dsi_ctx, 32); 104 97 105 - mipi_dsi_generic_write_seq(dsi, 0xfe, 0x38); 106 - mipi_dsi_generic_write_seq(dsi, 0x18, 0x13); 107 - mipi_dsi_generic_write_seq(dsi, 0xfe, 0xd1); 108 - mipi_dsi_generic_write_seq(dsi, 0xd3, 0x00); 109 - mipi_dsi_generic_write_seq(dsi, 0xd0, 0x00); 110 - mipi_dsi_generic_write_seq(dsi, 0xd2, 0x00); 111 - mipi_dsi_generic_write_seq(dsi, 0xd4, 0x00); 112 - mipi_dsi_generic_write_seq(dsi, 0xb4, 0x01); 113 - mipi_dsi_generic_write_seq(dsi, 0xfe, 0xf9); 114 - mipi_dsi_generic_write_seq(dsi, 0x00, 0xaf); 115 - mipi_dsi_generic_write_seq(dsi, 0x1d, 0x37); 116 - mipi_dsi_generic_write_seq(dsi, 0x44, 0x0a, 0x7b); 117 - mipi_dsi_generic_write_seq(dsi, 0xfe, 0x00); 118 - mipi_dsi_generic_write_seq(dsi, 0xfa, 0x01); 119 - mipi_dsi_generic_write_seq(dsi, 0xc2, 0x08); 120 - mipi_dsi_generic_write_seq(dsi, 0x35, 0x00); 121 - mipi_dsi_generic_write_seq(dsi, 0x51, 0x05, 0x42); 98 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfe, 0x38); 99 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x18, 0x13); 100 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfe, 0xd1); 101 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xd3, 0x00); 102 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xd0, 0x00); 103 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xd2, 0x00); 104 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xd4, 0x00); 105 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xb4, 0x01); 106 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfe, 0xf9); 107 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x00, 0xaf); 108 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x1d, 0x37); 109 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x44, 0x0a, 0x7b); 110 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfe, 0x00); 111 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xfa, 0x01); 112 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0xc2, 0x08); 113 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x35, 0x00); 114 + mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x51, 0x05, 0x42); 122 115 123 - ret = mipi_dsi_dcs_exit_sleep_mode(dsi); 124 - if (ret < 0) { 125 - dev_err(dev, "Failed to exit sleep mode: %d\n", ret); 126 - return ret; 127 - } 128 - msleep(100); 129 - 130 - ret = mipi_dsi_dcs_set_display_on(dsi); 131 - if (ret < 0) { 132 - dev_err(dev, "Failed to set display on: %d\n", ret); 133 - return ret; 134 - } 135 - 136 - return 0; 116 + mipi_dsi_dcs_exit_sleep_mode_multi(dsi_ctx); 117 + mipi_dsi_msleep(dsi_ctx, 100); 118 + mipi_dsi_dcs_set_display_on_multi(dsi_ctx); 137 119 } 138 120 139 121 static int rm692e5_disable(struct drm_panel *panel) 140 122 { 141 123 struct rm692e5_panel *ctx = to_rm692e5_panel(panel); 142 124 struct mipi_dsi_device *dsi = ctx->dsi; 143 - struct device *dev = &dsi->dev; 144 - int ret; 125 + struct mipi_dsi_multi_context dsi_ctx = { .dsi = dsi }; 145 126 146 127 dsi->mode_flags &= ~MIPI_DSI_MODE_LPM; 147 128 148 - mipi_dsi_generic_write_seq(dsi, 0xfe, 0x00); 129 + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfe, 0x00); 149 130 150 - ret = mipi_dsi_dcs_set_display_off(dsi); 151 - if (ret < 0) { 152 - dev_err(dev, "Failed to set display off: %d\n", ret); 153 - return ret; 154 - } 131 + mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); 155 132 156 - ret = mipi_dsi_dcs_enter_sleep_mode(dsi); 157 - if (ret < 0) { 158 - dev_err(dev, "Failed to enter sleep mode: %d\n", ret); 159 - return ret; 160 - } 161 - msleep(100); 133 + mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); 162 134 163 - return 0; 135 + mipi_dsi_msleep(&dsi_ctx, 100); 136 + 137 + return dsi_ctx.accum_err; 164 138 } 165 139 166 140 static int rm692e5_prepare(struct drm_panel *panel) 167 141 { 168 142 struct rm692e5_panel *ctx = to_rm692e5_panel(panel); 169 143 struct drm_dsc_picture_parameter_set pps; 170 - struct device *dev = &ctx->dsi->dev; 171 - int ret; 144 + struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; 172 145 173 - ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies); 174 - if (ret < 0) { 175 - dev_err(dev, "Failed to enable regulators: %d\n", ret); 176 - return ret; 177 - } 146 + dsi_ctx.accum_err = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies); 147 + if (dsi_ctx.accum_err) 148 + return dsi_ctx.accum_err; 178 149 179 150 rm692e5_reset(ctx); 180 151 181 - ret = rm692e5_on(ctx); 182 - if (ret < 0) { 183 - dev_err(dev, "Failed to initialize panel: %d\n", ret); 184 - gpiod_set_value_cansleep(ctx->reset_gpio, 1); 185 - regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); 186 - return ret; 187 - } 152 + rm692e5_on(&dsi_ctx); 188 153 189 154 drm_dsc_pps_payload_pack(&pps, &ctx->dsc); 190 155 191 - ret = mipi_dsi_picture_parameter_set(ctx->dsi, &pps); 192 - if (ret < 0) { 193 - dev_err(panel->dev, "failed to transmit PPS: %d\n", ret); 194 - return ret; 195 - } 156 + mipi_dsi_picture_parameter_set_multi(&dsi_ctx, &pps); 157 + mipi_dsi_compression_mode_ext_multi(&dsi_ctx, true, MIPI_DSI_COMPRESSION_DSC, 0); 158 + mipi_dsi_msleep(&dsi_ctx, 28); 196 159 197 - ret = mipi_dsi_compression_mode(ctx->dsi, true); 198 - if (ret < 0) { 199 - dev_err(dev, "failed to enable compression mode: %d\n", ret); 200 - return ret; 201 - } 202 - 203 - msleep(28); 204 - 205 - mipi_dsi_generic_write_seq(ctx->dsi, 0xfe, 0x40); 160 + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfe, 0x40); 206 161 207 162 /* 0x05 -> 90Hz, 0x00 -> 60Hz */ 208 - mipi_dsi_generic_write_seq(ctx->dsi, 0xbd, 0x05); 163 + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xbd, 0x05); 209 164 210 - mipi_dsi_generic_write_seq(ctx->dsi, 0xfe, 0x00); 165 + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xfe, 0x00); 211 166 212 - return 0; 167 + if (dsi_ctx.accum_err) { 168 + gpiod_set_value_cansleep(ctx->reset_gpio, 1); 169 + regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies); 170 + } 171 + 172 + return dsi_ctx.accum_err; 213 173 } 214 174 215 175 static int rm692e5_unprepare(struct drm_panel *panel)