tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ARM: dts: Armadeus Systems APF6 family support (i.MX6)
Add support to the Armadeus Systems APF6 Solo / Dual / Quad SoM and
the Armadeus Systems APF6Dev carrier board.
For more details see:
http://www.armadeus.com/english/products-processor_boards-apf6.html
http://www.armadeus.com/english/products-development_boards-apf6_dev.html
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
authored by
Sébastien Szymanski
and committed by
Shawn Guo
673254d5
aa5fec2d
+763
+2
arch/arm/boot/dts/Makefile
+2
arch/arm/boot/dts/Makefile
···
254
254
imx53-tx53-x13x.dtb \
255
255
imx53-voipac-bsb.dtb
256
256
dtb-$(CONFIG_SOC_IMX6Q) += \
257
+
imx6dl-apf6dev.dtb \
257
258
imx6dl-aristainetos_4.dtb \
258
259
imx6dl-aristainetos_7.dtb \
259
260
imx6dl-cubox-i.dtb \
···
279
278
imx6dl-udoo.dtb \
280
279
imx6dl-wandboard.dtb \
281
280
imx6dl-wandboard-revb1.dtb \
281
+
imx6q-apf6dev.dtb \
282
282
imx6q-arm2.dtb \
283
283
imx6q-cm-fx6.dtb \
284
284
imx6q-cubox-i.dtb \
+60
arch/arm/boot/dts/imx6dl-apf6dev.dts
+60
arch/arm/boot/dts/imx6dl-apf6dev.dts
···
1
+
/*
2
+
* Copyright 2015 Armadeus Systems
3
+
*
4
+
* This file is dual-licensed: you can use it either under the terms
5
+
* of the GPL or the X11 license, at your option. Note that this dual
6
+
* licensing only applies to this file, and not this project as a
7
+
* whole.
8
+
*
9
+
* a) This file is free software; you can redistribute it and/or
10
+
* modify it under the terms of the GNU General Public License as
11
+
* published by the Free Software Foundation; either version 2 of
12
+
* the License, or (at your option) any later version.
13
+
*
14
+
* This file is distributed in the hope that it will be useful,
15
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
16
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17
+
* GNU General Public License for more details.
18
+
*
19
+
* You should have received a copy of the GNU General Public
20
+
* License along with this file; if not, write to the Free
21
+
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22
+
* MA 02110-1301 USA
23
+
*
24
+
* Or, alternatively,
25
+
*
26
+
* b) Permission is hereby granted, free of charge, to any person
27
+
* obtaining a copy of this software and associated documentation
28
+
* files (the "Software"), to deal in the Software without
29
+
* restriction, including without limitation the rights to use,
30
+
* copy, modify, merge, publish, distribute, sublicense, and/or
31
+
* sell copies of the Software, and to permit persons to whom the
32
+
* Software is furnished to do so, subject to the following
33
+
* conditions:
34
+
*
35
+
* The above copyright notice and this permission notice shall be
36
+
* included in all copies or substantial portions of the Software.
37
+
*
38
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39
+
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40
+
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41
+
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42
+
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43
+
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44
+
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45
+
* OTHER DEALINGS IN THE SOFTWARE.
46
+
*/
47
+
48
+
/dts-v1/;
49
+
#include "imx6dl.dtsi"
50
+
#include "imx6qdl-apf6.dtsi"
51
+
#include "imx6qdl-apf6dev.dtsi"
52
+
53
+
/ {
54
+
model = "Armadeus APF6 Solo Module on APF6Dev Board";
55
+
compatible = "armadeus,imx6dl-apf6dev", "armadeus,imx6dl-apf6", "fsl,imx6dl";
56
+
57
+
memory {
58
+
reg = <0x10000000 0x20000000>;
59
+
};
60
+
};
+64
arch/arm/boot/dts/imx6q-apf6dev.dts
+64
arch/arm/boot/dts/imx6q-apf6dev.dts
···
1
+
/*
2
+
* Copyright 2015 Armadeus Systems
3
+
*
4
+
* This file is dual-licensed: you can use it either under the terms
5
+
* of the GPL or the X11 license, at your option. Note that this dual
6
+
* licensing only applies to this file, and not this project as a
7
+
* whole.
8
+
*
9
+
* a) This file is free software; you can redistribute it and/or
10
+
* modify it under the terms of the GNU General Public License as
11
+
* published by the Free Software Foundation; either version 2 of
12
+
* the License, or (at your option) any later version.
13
+
*
14
+
* This file is distributed in the hope that it will be useful,
15
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
16
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17
+
* GNU General Public License for more details.
18
+
*
19
+
* You should have received a copy of the GNU General Public
20
+
* License along with this file; if not, write to the Free
21
+
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22
+
* MA 02110-1301 USA
23
+
*
24
+
* Or, alternatively,
25
+
*
26
+
* b) Permission is hereby granted, free of charge, to any person
27
+
* obtaining a copy of this software and associated documentation
28
+
* files (the "Software"), to deal in the Software without
29
+
* restriction, including without limitation the rights to use,
30
+
* copy, modify, merge, publish, distribute, sublicense, and/or
31
+
* sell copies of the Software, and to permit persons to whom the
32
+
* Software is furnished to do so, subject to the following
33
+
* conditions:
34
+
*
35
+
* The above copyright notice and this permission notice shall be
36
+
* included in all copies or substantial portions of the Software.
37
+
*
38
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39
+
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40
+
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41
+
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42
+
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43
+
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44
+
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45
+
* OTHER DEALINGS IN THE SOFTWARE.
46
+
*/
47
+
48
+
/dts-v1/;
49
+
#include "imx6q.dtsi"
50
+
#include "imx6qdl-apf6.dtsi"
51
+
#include "imx6qdl-apf6dev.dtsi"
52
+
53
+
/ {
54
+
model = "Armadeus APF6 Quad / Dual Module on APF6Dev Board";
55
+
compatible = "armadeus,imx6q-apf6dev", "armadeus,imx6q-apf6", "fsl,imx6q";
56
+
57
+
memory {
58
+
reg = <0x10000000 0x40000000>;
59
+
};
60
+
};
61
+
62
+
&sata {
63
+
status = "okay";
64
+
};
+158
arch/arm/boot/dts/imx6qdl-apf6.dtsi
+158
arch/arm/boot/dts/imx6qdl-apf6.dtsi
···
1
+
/*
2
+
* Copyright 2015 Armadeus Systems
3
+
*
4
+
* This file is dual-licensed: you can use it either under the terms
5
+
* of the GPL or the X11 license, at your option. Note that this dual
6
+
* licensing only applies to this file, and not this project as a
7
+
* whole.
8
+
*
9
+
* a) This file is free software; you can redistribute it and/or
10
+
* modify it under the terms of the GNU General Public License as
11
+
* published by the Free Software Foundation; either version 2 of
12
+
* the License, or (at your option) any later version.
13
+
*
14
+
* This file is distributed in the hope that it will be useful,
15
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
16
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17
+
* GNU General Public License for more details.
18
+
*
19
+
* You should have received a copy of the GNU General Public
20
+
* License along with this file; if not, write to the Free
21
+
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22
+
* MA 02110-1301 USA
23
+
*
24
+
* Or, alternatively,
25
+
*
26
+
* b) Permission is hereby granted, free of charge, to any person
27
+
* obtaining a copy of this software and associated documentation
28
+
* files (the "Software"), to deal in the Software without
29
+
* restriction, including without limitation the rights to use,
30
+
* copy, modify, merge, publish, distribute, sublicense, and/or
31
+
* sell copies of the Software, and to permit persons to whom the
32
+
* Software is furnished to do so, subject to the following
33
+
* conditions:
34
+
*
35
+
* The above copyright notice and this permission notice shall be
36
+
* included in all copies or substantial portions of the Software.
37
+
*
38
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39
+
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40
+
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41
+
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42
+
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43
+
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44
+
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45
+
* OTHER DEALINGS IN THE SOFTWARE.
46
+
*/
47
+
48
+
#include <dt-bindings/gpio/gpio.h>
49
+
#include <dt-bindings/interrupt-controller/irq.h>
50
+
51
+
&fec {
52
+
pinctrl-names = "default";
53
+
pinctrl-0 = <&pinctrl_enet>;
54
+
phy-mode = "rgmii";
55
+
phy-reset-duration = <10>;
56
+
phy-reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
57
+
status = "okay";
58
+
};
59
+
60
+
/* Bluetooth */
61
+
&uart2 {
62
+
pinctrl-names = "default";
63
+
pinctrl-0 = <&pinctrl_uart2>;
64
+
status = "okay";
65
+
};
66
+
67
+
/* Wi-Fi */
68
+
&usdhc1 {
69
+
pinctrl-names = "default";
70
+
pinctrl-0 = <&pinctrl_usdhc1>;
71
+
non-removable;
72
+
status = "okay";
73
+
74
+
#address-cells = <1>;
75
+
#size-cells = <0>;
76
+
wlcore: wlcore@2 {
77
+
compatible = "ti,wl1271";
78
+
reg = <2>;
79
+
interrupt-parent = <&gpio2>;
80
+
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
81
+
ref-clock-frequency = <38400000>;
82
+
tcxo-clock-frequency = <38400000>;
83
+
};
84
+
};
85
+
86
+
/* eMMC */
87
+
&usdhc3 {
88
+
pinctrl-names = "default";
89
+
pinctrl-0 = <&pinctrl_usdhc3>;
90
+
bus-width = <8>;
91
+
no-1-8-v;
92
+
non-removable;
93
+
status = "okay";
94
+
};
95
+
96
+
&iomuxc {
97
+
apf6 {
98
+
pinctrl_enet: enetgrp {
99
+
fsl,pins = <
100
+
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
101
+
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
102
+
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
103
+
MX6QDL_PAD_ENET_RX_ER__GPIO1_IO24 0x130b0
104
+
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x130b0
105
+
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
106
+
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
107
+
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
108
+
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
109
+
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
110
+
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
111
+
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x13030
112
+
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
113
+
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
114
+
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1f030
115
+
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1f030
116
+
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
117
+
>;
118
+
};
119
+
120
+
pinctrl_uart2: uart2grp {
121
+
fsl,pins = <
122
+
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b0
123
+
MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b0
124
+
MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b0
125
+
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b0
126
+
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x130b0 /* BT_EN */
127
+
>;
128
+
};
129
+
130
+
pinctrl_usdhc1: usdhc1grp {
131
+
fsl,pins = <
132
+
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
133
+
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
134
+
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
135
+
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
136
+
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
137
+
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
138
+
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0 /* WL_EN */
139
+
MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* WL_IRQ */
140
+
>;
141
+
};
142
+
143
+
pinctrl_usdhc3: usdhc3grp {
144
+
fsl,pins = <
145
+
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
146
+
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
147
+
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
148
+
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
149
+
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
150
+
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
151
+
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
152
+
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
153
+
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
154
+
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
155
+
>;
156
+
};
157
+
};
158
+
};
+479
arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
+479
arch/arm/boot/dts/imx6qdl-apf6dev.dtsi
···
1
+
/*
2
+
* Copyright 2015 Armadeus Systems
3
+
*
4
+
* This file is dual-licensed: you can use it either under the terms
5
+
* of the GPL or the X11 license, at your option. Note that this dual
6
+
* licensing only applies to this file, and not this project as a
7
+
* whole.
8
+
*
9
+
* a) This file is free software; you can redistribute it and/or
10
+
* modify it under the terms of the GNU General Public License as
11
+
* published by the Free Software Foundation; either version 2 of
12
+
* the License, or (at your option) any later version.
13
+
*
14
+
* This file is distributed in the hope that it will be useful,
15
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
16
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17
+
* GNU General Public License for more details.
18
+
*
19
+
* You should have received a copy of the GNU General Public
20
+
* License along with this file; if not, write to the Free
21
+
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22
+
* MA 02110-1301 USA
23
+
*
24
+
* Or, alternatively,
25
+
*
26
+
* b) Permission is hereby granted, free of charge, to any person
27
+
* obtaining a copy of this software and associated documentation
28
+
* files (the "Software"), to deal in the Software without
29
+
* restriction, including without limitation the rights to use,
30
+
* copy, modify, merge, publish, distribute, sublicense, and/or
31
+
* sell copies of the Software, and to permit persons to whom the
32
+
* Software is furnished to do so, subject to the following
33
+
* conditions:
34
+
*
35
+
* The above copyright notice and this permission notice shall be
36
+
* included in all copies or substantial portions of the Software.
37
+
*
38
+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39
+
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40
+
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41
+
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42
+
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43
+
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44
+
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45
+
* OTHER DEALINGS IN THE SOFTWARE.
46
+
*/
47
+
48
+
#include <dt-bindings/gpio/gpio.h>
49
+
#include <dt-bindings/input/input.h>
50
+
#include <dt-bindings/interrupt-controller/irq.h>
51
+
52
+
/ {
53
+
chosen {
54
+
stdout-path = &uart4;
55
+
};
56
+
57
+
display@di0 {
58
+
compatible = "fsl,imx-parallel-display";
59
+
interface-pix-fmt = "bgr666";
60
+
pinctrl-names = "default";
61
+
pinctrl-0 = <&pinctrl_ipu1_disp1>;
62
+
63
+
display-timings {
64
+
lw700 {
65
+
clock-frequency = <33000033>;
66
+
hactive = <800>;
67
+
vactive = <480>;
68
+
hback-porch = <96>;
69
+
hfront-porch = <96>;
70
+
vback-porch = <20>;
71
+
vfront-porch = <21>;
72
+
hsync-len = <64>;
73
+
vsync-len = <4>;
74
+
hsync-active = <1>;
75
+
vsync-active = <1>;
76
+
de-active = <1>;
77
+
pixelclk-active = <1>;
78
+
};
79
+
};
80
+
81
+
port {
82
+
display_in: endpoint {
83
+
remote-endpoint = <&ipu1_di0_disp0>;
84
+
};
85
+
};
86
+
};
87
+
88
+
gpio-keys {
89
+
compatible = "gpio-keys";
90
+
pinctrl-names = "default";
91
+
pinctrl-0 = <&pinctrl_gpio_keys>;
92
+
93
+
user-button {
94
+
label = "User button";
95
+
gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
96
+
linux,code = <BTN_MISC>;
97
+
gpio-key,wakeup;
98
+
};
99
+
};
100
+
101
+
leds {
102
+
compatible = "gpio-leds";
103
+
pinctrl-names = "default";
104
+
pinctrl-0 = <&pinctrl_gpio_leds>;
105
+
106
+
user-led {
107
+
label = "User LED";
108
+
gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
109
+
linux,default-trigger = "heartbeat";
110
+
default-state = "on";
111
+
};
112
+
};
113
+
114
+
regulators {
115
+
compatible = "simple-bus";
116
+
117
+
reg_3p3v: 3p3v {
118
+
compatible = "regulator-fixed";
119
+
regulator-name = "3P3V";
120
+
regulator-min-microvolt = <3300000>;
121
+
regulator-max-microvolt = <3300000>;
122
+
regulator-always-on;
123
+
};
124
+
125
+
reg_usbh1_vbus: usb-h1-vbus {
126
+
compatible = "regulator-fixed";
127
+
regulator-name = "usb_h1_vbus";
128
+
regulator-min-microvolt = <5000000>;
129
+
regulator-max-microvolt = <5000000>;
130
+
regulator-always-on;
131
+
};
132
+
133
+
reg_usb_otg_vbus: usb-otg-vbus {
134
+
compatible = "regulator-fixed";
135
+
regulator-name = "usb_otg_vbus";
136
+
regulator-min-microvolt = <5000000>;
137
+
regulator-max-microvolt = <5000000>;
138
+
regulator-always-on;
139
+
};
140
+
};
141
+
142
+
sound {
143
+
compatible = "fsl,imx6-armadeus-sgtl5000",
144
+
"fsl,imx-audio-sgtl5000";
145
+
model = "imx6-armadeus-sgtl5000";
146
+
ssi-controller = <&ssi1>;
147
+
audio-codec = <&codec>;
148
+
audio-routing =
149
+
"MIC_IN", "Mic Jack",
150
+
"Mic Jack", "Mic Bias",
151
+
"Headphone Jack", "HP_OUT";
152
+
mux-int-port = <1>;
153
+
mux-ext-port = <3>;
154
+
};
155
+
156
+
sound-spdif {
157
+
compatible = "fsl,imx-audio-spdif";
158
+
model = "imx-spdif";
159
+
spdif-controller = <&spdif>;
160
+
spdif-out;
161
+
};
162
+
};
163
+
164
+
&audmux {
165
+
pinctrl-names = "default";
166
+
pinctrl-0 = <&pinctrl_audmux>;
167
+
status = "okay";
168
+
};
169
+
170
+
&can2 {
171
+
pinctrl-names = "default";
172
+
pinctrl-0 = <&pinctrl_flexcan2>;
173
+
status = "okay";
174
+
};
175
+
176
+
&ecspi1 {
177
+
pinctrl-names = "default";
178
+
pinctrl-0 = <&pinctrl_ecspi1>;
179
+
fsl,spi-num-chipselects = <3>;
180
+
cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>,
181
+
<&gpio4 10 GPIO_ACTIVE_LOW>,
182
+
<&gpio4 11 GPIO_ACTIVE_LOW>;
183
+
status = "okay";
184
+
};
185
+
186
+
&hdmi {
187
+
ddc-i2c-bus = <&i2c3>;
188
+
status = "okay";
189
+
};
190
+
191
+
&i2c1 {
192
+
clock-frequency = <400000>;
193
+
pinctrl-names = "default";
194
+
pinctrl-0 = <&pinctrl_i2c1>;
195
+
status = "okay";
196
+
197
+
touchscreen@48 {
198
+
compatible = "semtech,sx8654";
199
+
reg = <0x48>;
200
+
pinctrl-names = "default";
201
+
pinctrl-0 = <&pinctrl_touchscreen>;
202
+
interrupt-parent = <&gpio6>;
203
+
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
204
+
};
205
+
};
206
+
207
+
&i2c2 {
208
+
clock-frequency = <400000>;
209
+
pinctrl-names = "default";
210
+
pinctrl-0 = <&pinctrl_i2c2>;
211
+
status = "okay";
212
+
213
+
codec: sgtl5000@0a {
214
+
compatible = "fsl,sgtl5000";
215
+
reg = <0x0a>;
216
+
clocks = <&clks 201>;
217
+
VDDA-supply = <®_3p3v>;
218
+
VDDIO-supply = <®_3p3v>;
219
+
};
220
+
};
221
+
222
+
&i2c3 {
223
+
clock-frequency = <400000>;
224
+
pinctrl-names = "default";
225
+
pinctrl-0 = <&pinctrl_i2c3>;
226
+
status = "okay";
227
+
};
228
+
229
+
&ipu1_di0_disp0 {
230
+
remote-endpoint = <&display_in>;
231
+
};
232
+
233
+
&pcie {
234
+
pinctrl-names = "default";
235
+
pinctrl-0 = <&pinctrl_pcie>;
236
+
reset-gpio = <&gpio6 2 GPIO_ACTIVE_HIGH>;
237
+
status = "okay";
238
+
};
239
+
240
+
&pwm3 {
241
+
pinctrl-names = "default";
242
+
pinctrl-0 = <&pinctrl_pwm3>;
243
+
status = "okay";
244
+
};
245
+
246
+
/* GPS */
247
+
&uart1 {
248
+
pinctrl-names = "default";
249
+
pinctrl-0 = <&pinctrl_uart1>;
250
+
status = "okay";
251
+
};
252
+
253
+
/* GSM */
254
+
&uart3 {
255
+
pinctrl-names = "default";
256
+
pinctrl-0 = <&pinctrl_uart3 &pinctrl_gsm>;
257
+
fsl,uart-has-rtscts;
258
+
status = "okay";
259
+
};
260
+
261
+
/* console */
262
+
&uart4 {
263
+
pinctrl-names = "default";
264
+
pinctrl-0 = <&pinctrl_uart4>;
265
+
status = "okay";
266
+
};
267
+
268
+
&usbh1 {
269
+
vbus-supply = <®_usbh1_vbus>;
270
+
phy_type = "utmi";
271
+
status = "okay";
272
+
};
273
+
274
+
&usbotg {
275
+
pinctrl-names = "default";
276
+
pinctrl-0 = <&pinctrl_usbotg>;
277
+
vbus-supply = <®_usb_otg_vbus>;
278
+
dr_mode = "otg";
279
+
status = "okay";
280
+
};
281
+
282
+
/* microSD */
283
+
&usdhc2 {
284
+
pinctrl-names = "default";
285
+
pinctrl-0 = <&pinctrl_usdhc2>;
286
+
cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
287
+
no-1-8-v;
288
+
status = "okay";
289
+
};
290
+
291
+
&spdif {
292
+
pinctrl-names = "default";
293
+
pinctrl-0 = <&pinctrl_spdif>;
294
+
status = "okay";
295
+
};
296
+
297
+
&ssi1 {
298
+
status = "okay";
299
+
};
300
+
301
+
&iomuxc {
302
+
pinctrl-names = "default";
303
+
pinctrl-0 = <&pinctrl_gpios>;
304
+
305
+
apf6dev {
306
+
pinctrl_audmux: audmuxgrp {
307
+
fsl,pins = <
308
+
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x1b0b0
309
+
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x1b0b0
310
+
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
311
+
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x1b0b0
312
+
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
313
+
>;
314
+
};
315
+
316
+
pinctrl_ecspi1: ecspi1grp {
317
+
fsl,pins = <
318
+
MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
319
+
MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
320
+
MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
321
+
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
322
+
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
323
+
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
324
+
>;
325
+
};
326
+
327
+
pinctrl_flexcan2: flexcan2grp {
328
+
fsl,pins = <
329
+
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
330
+
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
331
+
>;
332
+
};
333
+
334
+
pinctrl_gpio_keys: gpiokeysgrp {
335
+
fsl,pins = <
336
+
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
337
+
>;
338
+
};
339
+
340
+
pinctrl_gpio_leds: gpioledsgrp {
341
+
fsl,pins = <
342
+
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x130b0
343
+
>;
344
+
};
345
+
346
+
pinctrl_gpios: gpiosgrp {
347
+
fsl,pins = <
348
+
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x100b1
349
+
MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x100b1
350
+
MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x100b1
351
+
MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x100b1
352
+
MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x100b1
353
+
MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x100b1
354
+
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x100b1
355
+
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x100b1
356
+
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x100b1
357
+
>;
358
+
};
359
+
360
+
pinctrl_gsm: gsmgrp {
361
+
fsl,pins = <
362
+
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x130b0 /* GSM_POKIN */
363
+
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x130b0 /* GSM_PWR_EN */
364
+
>;
365
+
};
366
+
367
+
pinctrl_i2c1: i2c1grp {
368
+
fsl,pins = <
369
+
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
370
+
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
371
+
>;
372
+
};
373
+
374
+
pinctrl_i2c2: i2c2grp {
375
+
fsl,pins = <
376
+
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
377
+
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
378
+
>;
379
+
};
380
+
381
+
pinctrl_i2c3: i2c3grp {
382
+
fsl,pins = <
383
+
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
384
+
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
385
+
>;
386
+
};
387
+
388
+
pinctrl_ipu1_disp1: ipu1disp1grp {
389
+
fsl,pins = <
390
+
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x100b1
391
+
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x100b1
392
+
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100b1
393
+
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x100b1
394
+
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x100b1
395
+
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x100b1
396
+
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x100b1
397
+
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x100b1
398
+
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x100b1
399
+
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x100b1
400
+
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x100b1
401
+
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x100b1
402
+
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x100b1
403
+
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x100b1
404
+
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x100b1
405
+
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x100b1
406
+
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x100b1
407
+
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x100b1
408
+
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x100b1
409
+
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x100b1
410
+
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x100b1
411
+
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x100b1
412
+
>;
413
+
};
414
+
415
+
pinctrl_pcie: pciegrp {
416
+
fsl,pins = <
417
+
MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x130b0
418
+
>;
419
+
};
420
+
421
+
pinctrl_pwm3: pwm3grp {
422
+
fsl,pins = <
423
+
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
424
+
>;
425
+
};
426
+
427
+
pinctrl_uart1: uart1grp {
428
+
fsl,pins = <
429
+
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b0
430
+
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b0
431
+
>;
432
+
};
433
+
434
+
pinctrl_uart3: uart3grp {
435
+
fsl,pins = <
436
+
MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b0
437
+
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0
438
+
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0
439
+
MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b0
440
+
>;
441
+
};
442
+
443
+
pinctrl_uart4: uart4grp {
444
+
fsl,pins = <
445
+
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b0
446
+
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b0
447
+
>;
448
+
};
449
+
450
+
pinctrl_usbotg: usbotggrp {
451
+
fsl,pins = <
452
+
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1b0b0
453
+
>;
454
+
};
455
+
456
+
pinctrl_usdhc2: usdhc2grp {
457
+
fsl,pins = <
458
+
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
459
+
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
460
+
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
461
+
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
462
+
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
463
+
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
464
+
>;
465
+
};
466
+
467
+
pinctrl_spdif: spdifgrp {
468
+
fsl,pins = <
469
+
MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
470
+
>;
471
+
};
472
+
473
+
pinctrl_touchscreen: touchscreengrp {
474
+
fsl,pins = <
475
+
MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b0
476
+
>;
477
+
};
478
+
};
479
+
};