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ARM: dts: vf610: Nomenclature fixup for PTC12 pin used in RMII mode.

This commit includes a minor nomenclature fixup for boards based on the
Freescale VF610 SoC and which make use of the alternate "RMII1_RXD1"
functionality for pin PTC12. This brings the macro name in-line with
both the datasheet and other similar macros.

Signed-off-by: Cory Tusar <cory.tusar@pid1solutions.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

authored by

Cory Tusar and committed by
Shawn Guo aa5fec2d dca97cee

+4 -4
+1 -1
arch/arm/boot/dts/vf-colibri.dtsi
··· 140 140 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 141 141 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 142 142 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 143 - VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1 143 + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 144 144 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 145 145 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 146 146 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
+1 -1
arch/arm/boot/dts/vf610-cosmic.dts
··· 68 68 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 69 69 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 70 70 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 71 - VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1 71 + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 72 72 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 73 73 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 74 74 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2
+1 -1
arch/arm/boot/dts/vf610-pinfunc.h
··· 369 369 #define VF610_PAD_PTC11__MLB_DATA 0x0E0 0x358 ALT6 0x1 370 370 #define VF610_PAD_PTC11__DEBUG_OUT 0x0E0 0x000 ALT7 0x0 371 371 #define VF610_PAD_PTC12__GPIO_57 0x0E4 0x000 ALT0 0x0 372 - #define VF610_PAD_PTC12__ENET_RMII_RXD1 0x0E4 0x000 ALT1 0x0 372 + #define VF610_PAD_PTC12__ENET_RMII1_RXD1 0x0E4 0x000 ALT1 0x0 373 373 #define VF610_PAD_PTC12__ESAI_SDO1 0x0E4 0x318 ALT3 0x1 374 374 #define VF610_PAD_PTC12__SAI2_TX_BCLK 0x0E4 0x370 ALT5 0x1 375 375 #define VF610_PAD_PTC12__DEBUG_OUT3 0x0E4 0x000 ALT7 0x0
+1 -1
arch/arm/boot/dts/vf610-twr.dts
··· 221 221 VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 222 222 VF610_PAD_PTC10__ENET_RMII1_MDIO 0x30d3 223 223 VF610_PAD_PTC11__ENET_RMII1_CRS 0x30d1 224 - VF610_PAD_PTC12__ENET_RMII_RXD1 0x30d1 224 + VF610_PAD_PTC12__ENET_RMII1_RXD1 0x30d1 225 225 VF610_PAD_PTC13__ENET_RMII1_RXD0 0x30d1 226 226 VF610_PAD_PTC14__ENET_RMII1_RXER 0x30d1 227 227 VF610_PAD_PTC15__ENET_RMII1_TXD1 0x30d2